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Fix MEMR status not set during halt acknowledge

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pjht 2024-02-03 17:17:16 -06:00
parent 23d4723a31
commit a4fe9e50da
Signed by: pjht
GPG Key ID: 7B5F6AFBEC7EE78E
1 changed files with 1 additions and 1 deletions
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src/cpu.rs
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@ -53,7 +53,7 @@ impl MemCycle {
Self::In(_) => Status::WO | Status::INP,
Self::Out(_, _) => Status::OUT,
Self::Inta(_) => Status::INTA | Status::WO | Status::M1,
Self::Hlta => Status::HLTA | Status::WO | Status::M1,
Self::Hlta => Status::HLTA | Status::WO | Status::M1 | Status::MEMR,
Self::IntaHlt(_) => Status::INTA | Status::HLTA | Status::WO | Status::M1,
}
}