diff --git a/src/cpu.rs b/src/cpu.rs
index b83c3c4..fda80df 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -53,7 +53,7 @@ impl MemCycle {
             Self::In(_) => Status::WO | Status::INP,
             Self::Out(_, _) => Status::OUT,
             Self::Inta(_) => Status::INTA | Status::WO | Status::M1,
-            Self::Hlta => Status::HLTA | Status::WO | Status::M1,
+            Self::Hlta => Status::HLTA | Status::WO | Status::M1 | Status::MEMR,
             Self::IntaHlt(_) => Status::INTA | Status::HLTA | Status::WO | Status::M1,
         }
     }