From a4fe9e50da6d3d684db7172f48d3903cda37d927 Mon Sep 17 00:00:00 2001
From: pjht <pterpstra@pterpstra.com>
Date: Sat, 3 Feb 2024 17:17:16 -0600
Subject: [PATCH] Fix MEMR status not set during halt acknowledge

---
 src/cpu.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cpu.rs b/src/cpu.rs
index b83c3c4..fda80df 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -53,7 +53,7 @@ impl MemCycle {
             Self::In(_) => Status::WO | Status::INP,
             Self::Out(_, _) => Status::OUT,
             Self::Inta(_) => Status::INTA | Status::WO | Status::M1,
-            Self::Hlta => Status::HLTA | Status::WO | Status::M1,
+            Self::Hlta => Status::HLTA | Status::WO | Status::M1 | Status::MEMR,
             Self::IntaHlt(_) => Status::INTA | Status::HLTA | Status::WO | Status::M1,
         }
     }