a17ccfa621
Functions in answer: - `Ty::is_freeze` - `Ty::is_sized` - `Ty::is_unpin` - `Ty::is_copy_modulo_regions`
438 lines
19 KiB
Rust
438 lines
19 KiB
Rust
use rustc_ast::InlineAsmTemplatePiece;
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use rustc_data_structures::fx::FxHashSet;
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use rustc_hir as hir;
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use rustc_middle::ty::{self, Article, FloatTy, IntTy, Ty, TyCtxt, TypeVisitable, UintTy};
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use rustc_session::lint;
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use rustc_span::{Symbol, DUMMY_SP};
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use rustc_target::asm::{InlineAsmReg, InlineAsmRegClass, InlineAsmRegOrRegClass, InlineAsmType};
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pub struct InlineAsmCtxt<'a, 'tcx> {
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tcx: TyCtxt<'tcx>,
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param_env: ty::ParamEnv<'tcx>,
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get_operand_ty: Box<dyn Fn(&'tcx hir::Expr<'tcx>) -> Ty<'tcx> + 'a>,
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}
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impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> {
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pub fn new_global_asm(tcx: TyCtxt<'tcx>) -> Self {
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InlineAsmCtxt {
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tcx,
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param_env: ty::ParamEnv::empty(),
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get_operand_ty: Box::new(|e| bug!("asm operand in global asm: {e:?}")),
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}
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}
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pub fn new_in_fn(
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tcx: TyCtxt<'tcx>,
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param_env: ty::ParamEnv<'tcx>,
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get_operand_ty: impl Fn(&'tcx hir::Expr<'tcx>) -> Ty<'tcx> + 'a,
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) -> Self {
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InlineAsmCtxt { tcx, param_env, get_operand_ty: Box::new(get_operand_ty) }
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}
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// FIXME(compiler-errors): This could use `<$ty as Pointee>::Metadata == ()`
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fn is_thin_ptr_ty(&self, ty: Ty<'tcx>) -> bool {
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// Type still may have region variables, but `Sized` does not depend
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// on those, so just erase them before querying.
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if ty.is_sized(self.tcx, self.param_env) {
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return true;
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}
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if let ty::Foreign(..) = ty.kind() {
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return true;
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}
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false
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}
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fn check_asm_operand_type(
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&self,
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idx: usize,
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reg: InlineAsmRegOrRegClass,
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expr: &'tcx hir::Expr<'tcx>,
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template: &[InlineAsmTemplatePiece],
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is_input: bool,
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tied_input: Option<(&'tcx hir::Expr<'tcx>, Option<InlineAsmType>)>,
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target_features: &FxHashSet<Symbol>,
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) -> Option<InlineAsmType> {
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let ty = (self.get_operand_ty)(expr);
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if ty.has_non_region_infer() {
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bug!("inference variable in asm operand ty: {:?} {:?}", expr, ty);
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}
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let asm_ty_isize = match self.tcx.sess.target.pointer_width {
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16 => InlineAsmType::I16,
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32 => InlineAsmType::I32,
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64 => InlineAsmType::I64,
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_ => unreachable!(),
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};
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let asm_ty = match *ty.kind() {
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// `!` is allowed for input but not for output (issue #87802)
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ty::Never if is_input => return None,
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ty::Error(_) => return None,
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ty::Int(IntTy::I8) | ty::Uint(UintTy::U8) => Some(InlineAsmType::I8),
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ty::Int(IntTy::I16) | ty::Uint(UintTy::U16) => Some(InlineAsmType::I16),
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ty::Int(IntTy::I32) | ty::Uint(UintTy::U32) => Some(InlineAsmType::I32),
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ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => Some(InlineAsmType::I64),
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ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => Some(InlineAsmType::I128),
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ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => Some(asm_ty_isize),
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ty::Float(FloatTy::F32) => Some(InlineAsmType::F32),
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ty::Float(FloatTy::F64) => Some(InlineAsmType::F64),
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ty::FnPtr(_) => Some(asm_ty_isize),
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ty::RawPtr(ty::TypeAndMut { ty, mutbl: _ }) if self.is_thin_ptr_ty(ty) => {
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Some(asm_ty_isize)
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}
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ty::Adt(adt, substs) if adt.repr().simd() => {
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let fields = &adt.non_enum_variant().fields;
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let elem_ty = fields[0].ty(self.tcx, substs);
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match elem_ty.kind() {
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ty::Never | ty::Error(_) => return None,
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ty::Int(IntTy::I8) | ty::Uint(UintTy::U8) => {
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Some(InlineAsmType::VecI8(fields.len() as u64))
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}
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ty::Int(IntTy::I16) | ty::Uint(UintTy::U16) => {
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Some(InlineAsmType::VecI16(fields.len() as u64))
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}
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ty::Int(IntTy::I32) | ty::Uint(UintTy::U32) => {
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Some(InlineAsmType::VecI32(fields.len() as u64))
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}
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ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => {
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Some(InlineAsmType::VecI64(fields.len() as u64))
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}
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ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => {
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Some(InlineAsmType::VecI128(fields.len() as u64))
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}
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ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => {
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Some(match self.tcx.sess.target.pointer_width {
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16 => InlineAsmType::VecI16(fields.len() as u64),
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32 => InlineAsmType::VecI32(fields.len() as u64),
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64 => InlineAsmType::VecI64(fields.len() as u64),
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_ => unreachable!(),
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})
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}
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ty::Float(FloatTy::F32) => Some(InlineAsmType::VecF32(fields.len() as u64)),
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ty::Float(FloatTy::F64) => Some(InlineAsmType::VecF64(fields.len() as u64)),
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_ => None,
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}
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}
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ty::Infer(_) => unreachable!(),
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_ => None,
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};
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let Some(asm_ty) = asm_ty else {
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let msg = &format!("cannot use value of type `{ty}` for inline assembly");
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let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
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err.note(
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"only integers, floats, SIMD vectors, pointers and function pointers \
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can be used as arguments for inline assembly",
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);
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err.emit();
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return None;
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};
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// Check that the type implements Copy. The only case where this can
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// possibly fail is for SIMD types which don't #[derive(Copy)].
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if !ty.is_copy_modulo_regions(self.tcx, self.param_env) {
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let msg = "arguments for inline assembly must be copyable";
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let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
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err.note(&format!("`{ty}` does not implement the Copy trait"));
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err.emit();
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}
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// Ideally we wouldn't need to do this, but LLVM's register allocator
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// really doesn't like it when tied operands have different types.
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//
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// This is purely an LLVM limitation, but we have to live with it since
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// there is no way to hide this with implicit conversions.
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//
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// For the purposes of this check we only look at the `InlineAsmType`,
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// which means that pointers and integers are treated as identical (modulo
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// size).
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if let Some((in_expr, Some(in_asm_ty))) = tied_input {
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if in_asm_ty != asm_ty {
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let msg = "incompatible types for asm inout argument";
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let mut err = self.tcx.sess.struct_span_err(vec![in_expr.span, expr.span], msg);
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let in_expr_ty = (self.get_operand_ty)(in_expr);
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err.span_label(in_expr.span, &format!("type `{in_expr_ty}`"));
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err.span_label(expr.span, &format!("type `{ty}`"));
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err.note(
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"asm inout arguments must have the same type, \
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unless they are both pointers or integers of the same size",
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);
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err.emit();
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}
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// All of the later checks have already been done on the input, so
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// let's not emit errors and warnings twice.
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return Some(asm_ty);
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}
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// Check the type against the list of types supported by the selected
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// register class.
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let asm_arch = self.tcx.sess.asm_arch.unwrap();
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let reg_class = reg.reg_class();
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let supported_tys = reg_class.supported_types(asm_arch);
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let Some((_, feature)) = supported_tys.iter().find(|&&(t, _)| t == asm_ty) else {
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let msg = &format!("type `{ty}` cannot be used with this register class");
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let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
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let supported_tys: Vec<_> =
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supported_tys.iter().map(|(t, _)| t.to_string()).collect();
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err.note(&format!(
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"register class `{}` supports these types: {}",
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reg_class.name(),
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supported_tys.join(", "),
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));
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if let Some(suggest) = reg_class.suggest_class(asm_arch, asm_ty) {
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err.help(&format!(
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"consider using the `{}` register class instead",
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suggest.name()
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));
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}
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err.emit();
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return Some(asm_ty);
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};
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// Check whether the selected type requires a target feature. Note that
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// this is different from the feature check we did earlier. While the
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// previous check checked that this register class is usable at all
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// with the currently enabled features, some types may only be usable
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// with a register class when a certain feature is enabled. We check
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// this here since it depends on the results of typeck.
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//
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// Also note that this check isn't run when the operand type is never
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// (!). In that case we still need the earlier check to verify that the
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// register class is usable at all.
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if let Some(feature) = feature {
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if !target_features.contains(&feature) {
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let msg = &format!("`{}` target feature is not enabled", feature);
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let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
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err.note(&format!(
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"this is required to use type `{}` with register class `{}`",
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ty,
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reg_class.name(),
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));
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err.emit();
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return Some(asm_ty);
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}
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}
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// Check whether a modifier is suggested for using this type.
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if let Some((suggested_modifier, suggested_result)) =
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reg_class.suggest_modifier(asm_arch, asm_ty)
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{
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// Search for any use of this operand without a modifier and emit
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// the suggestion for them.
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let mut spans = vec![];
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for piece in template {
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if let &InlineAsmTemplatePiece::Placeholder { operand_idx, modifier, span } = piece
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{
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if operand_idx == idx && modifier.is_none() {
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spans.push(span);
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}
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}
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}
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if !spans.is_empty() {
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let (default_modifier, default_result) =
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reg_class.default_modifier(asm_arch).unwrap();
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self.tcx.struct_span_lint_hir(
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lint::builtin::ASM_SUB_REGISTER,
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expr.hir_id,
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spans,
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"formatting may not be suitable for sub-register argument",
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|lint| {
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lint.span_label(expr.span, "for this argument");
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lint.help(&format!(
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"use `{{{idx}:{suggested_modifier}}}` to have the register formatted as `{suggested_result}`",
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));
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lint.help(&format!(
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"or use `{{{idx}:{default_modifier}}}` to keep the default formatting of `{default_result}`",
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));
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lint
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},
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);
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}
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}
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Some(asm_ty)
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}
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pub fn check_asm(&self, asm: &hir::InlineAsm<'tcx>, enclosing_id: hir::HirId) {
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let hir = self.tcx.hir();
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let enclosing_def_id = hir.local_def_id(enclosing_id).to_def_id();
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let target_features = self.tcx.asm_target_features(enclosing_def_id);
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let Some(asm_arch) = self.tcx.sess.asm_arch else {
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self.tcx.sess.delay_span_bug(DUMMY_SP, "target architecture does not support asm");
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return;
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};
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for (idx, (op, op_sp)) in asm.operands.iter().enumerate() {
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// Validate register classes against currently enabled target
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// features. We check that at least one type is available for
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// the enabled features.
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//
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// We ignore target feature requirements for clobbers: if the
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// feature is disabled then the compiler doesn't care what we
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// do with the registers.
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//
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// Note that this is only possible for explicit register
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// operands, which cannot be used in the asm string.
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if let Some(reg) = op.reg() {
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// Some explicit registers cannot be used depending on the
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// target. Reject those here.
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if let InlineAsmRegOrRegClass::Reg(reg) = reg {
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if let InlineAsmReg::Err = reg {
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// `validate` will panic on `Err`, as an error must
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// already have been reported.
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continue;
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}
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if let Err(msg) = reg.validate(
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asm_arch,
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self.tcx.sess.relocation_model(),
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&target_features,
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&self.tcx.sess.target,
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op.is_clobber(),
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) {
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let msg = format!("cannot use register `{}`: {}", reg.name(), msg);
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self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
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continue;
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}
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}
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if !op.is_clobber() {
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let mut missing_required_features = vec![];
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let reg_class = reg.reg_class();
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if let InlineAsmRegClass::Err = reg_class {
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continue;
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}
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for &(_, feature) in reg_class.supported_types(asm_arch) {
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match feature {
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Some(feature) => {
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if target_features.contains(&feature) {
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missing_required_features.clear();
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break;
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} else {
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missing_required_features.push(feature);
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}
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}
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None => {
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missing_required_features.clear();
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break;
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}
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}
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}
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// We are sorting primitive strs here and can use unstable sort here
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missing_required_features.sort_unstable();
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missing_required_features.dedup();
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match &missing_required_features[..] {
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[] => {}
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[feature] => {
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let msg = format!(
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"register class `{}` requires the `{}` target feature",
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reg_class.name(),
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feature
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);
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self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
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// register isn't enabled, don't do more checks
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continue;
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}
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features => {
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let msg = format!(
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"register class `{}` requires at least one of the following target features: {}",
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reg_class.name(),
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features
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.iter()
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.map(|f| f.as_str())
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.intersperse(", ")
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.collect::<String>(),
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);
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self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
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// register isn't enabled, don't do more checks
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continue;
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}
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}
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}
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}
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match *op {
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hir::InlineAsmOperand::In { reg, ref expr } => {
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self.check_asm_operand_type(
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idx,
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reg,
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expr,
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asm.template,
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true,
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None,
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&target_features,
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);
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}
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hir::InlineAsmOperand::Out { reg, late: _, ref expr } => {
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if let Some(expr) = expr {
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self.check_asm_operand_type(
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idx,
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reg,
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expr,
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asm.template,
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false,
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None,
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&target_features,
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);
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}
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}
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hir::InlineAsmOperand::InOut { reg, late: _, ref expr } => {
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self.check_asm_operand_type(
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idx,
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reg,
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expr,
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asm.template,
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false,
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None,
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&target_features,
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);
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}
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hir::InlineAsmOperand::SplitInOut { reg, late: _, ref in_expr, ref out_expr } => {
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let in_ty = self.check_asm_operand_type(
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idx,
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reg,
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in_expr,
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asm.template,
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true,
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None,
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&target_features,
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);
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if let Some(out_expr) = out_expr {
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self.check_asm_operand_type(
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idx,
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reg,
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out_expr,
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asm.template,
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false,
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Some((in_expr, in_ty)),
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&target_features,
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);
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}
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}
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// No special checking is needed for these:
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// - Typeck has checked that Const operands are integers.
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// - AST lowering guarantees that SymStatic points to a static.
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hir::InlineAsmOperand::Const { .. } | hir::InlineAsmOperand::SymStatic { .. } => {}
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// Check that sym actually points to a function. Later passes
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// depend on this.
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hir::InlineAsmOperand::SymFn { anon_const } => {
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let ty = self.tcx.typeck_body(anon_const.body).node_type(anon_const.hir_id);
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match ty.kind() {
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ty::Never | ty::Error(_) => {}
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ty::FnDef(..) => {}
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_ => {
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let mut err =
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self.tcx.sess.struct_span_err(*op_sp, "invalid `sym` operand");
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err.span_label(
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self.tcx.hir().span(anon_const.body.hir_id),
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&format!("is {} `{}`", ty.kind().article(), ty),
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);
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err.help("`sym` operands must refer to either a function or a static");
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err.emit();
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}
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};
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}
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}
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}
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}
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}
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