Commit Graph

1033 Commits

Author SHA1 Message Date
Scott Mabin
43ce53375c Add riscv32imafc-esp-espidf target for the ESP32-P4. 2024-01-08 12:54:06 +00:00
Michael Goulet
68bb76634d Unions are not PointerLike 2024-01-07 19:28:00 +00:00
David Carlier
d70f0e36f0 compiler: update Fuchsia sanitizer support. 2024-01-06 10:06:15 +00:00
bors
f688dd684f Auto merge of #119569 - matthiaskrgr:rollup-4packja, r=matthiaskrgr
Rollup of 10 pull requests

Successful merges:

 - #118521 (Enable address sanitizer for MSVC targets using INFERASANLIBS linker flag)
 - #119026 (std::net::bind using -1 for openbsd which in turn sets it to somaxconn.)
 - #119195 (Make named_asm_labels lint not trigger on unicode and trigger on format args)
 - #119204 (macro_rules: Less hacky heuristic for using `tt` metavariable spans)
 - #119362 (Make `derive(Trait)` suggestion more accurate)
 - #119397 (Recover parentheses in range patterns)
 - #119417 (Uplift some miscellaneous coroutine-specific machinery into `check_closure`)
 - #119539 (Fix typos)
 - #119540 (Don't synthesize host effect args inside trait object types)
 - #119555 (Add codegen test for RVO on MaybeUninit)

r? `@ghost`
`@rustbot` modify labels: rollup
2024-01-04 21:44:14 +00:00
Matthias Krüger
12c102ec53
Rollup merge of #119431 - taiki-e:asm-s390x-reg-addr, r=Amanieu
Support reg_addr register class in s390x inline assembly

In s390x, `r0` cannot be used as an address register (it is evaluated as zero in an address context).

Therefore, currently, in assemblies involving memory accesses, `r0` must be [marked as clobbered](1a1155653a/src/arch/s390x.rs (L58)) or [explicitly used to a non-address](1a1155653a/src/arch/s390x.rs (L135)) or explicitly use an address register to prevent `r0` from being allocated to a register for the address.

This patch adds a register class for allocating general-purpose registers, except `r0`, to make it easier to use address registers. (powerpc already has a register class (reg_nonzero) for a similar purpose.)

This is identical to the `a` constraint in LLVM and GCC:

https://llvm.org/docs/LangRef.html#supported-constraint-code-list
> a: A 32, 64, or 128-bit integer address register (excludes R0, which in an address context evaluates as zero).

https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html
> a
> Address register (general purpose register except r0)

cc ``@uweigand``

r? ``@Amanieu``
2024-01-04 15:33:59 +01:00
Matthias Krüger
1f32203fd3
Rollup merge of #118521 - dpaoliello:asan, r=wesleywiser
Enable address sanitizer for MSVC targets using INFERASANLIBS linker flag

This enables address sanitizer for x86_64-pc-windows-msvc and i686-pc-windows-msvc targets when linked with the MSVC linker (link.exe) by leveraging the `/INFERASANLIBS` option to automatically find and link in Microsoft's address sanitizer runtime: <https://learn.microsoft.com/en-us/cpp/sanitizers/asan-runtime?view=msvc-170>

Implements https://github.com/rust-lang/compiler-team/issues/702
Fixes #89339 (for MSVC targets using the MSVC linker only)
Supercedes #89369

Successful x86_64-msvc build showing the sanitizer tests working: https://github.com/rust-lang/rust/actions/runs/7228346880/job/19697628258?pr=118521
2024-01-04 08:33:21 +01:00
Daniel Paoliello
bc3b7c9930 Enable address sanitizer for MSVC targets using INFERASANLIBS linker flag 2024-01-03 10:00:15 -08:00
León Orell Valerian Liehr
9b2a44adc2
Rollup merge of #119544 - roblabla:new-win7-targets, r=Nilstrieb
Fix: Properly set vendor in i686-win7-windows-msvc target

In #118150 , setting the `vendor` field of the `i686-win7-windows-msvc` target was forgotten, preventing us from easily checking the target using `cfg(target_vendor)`.

With this PR, we set the target vendor to "win7".
2024-01-03 16:08:33 +01:00
roblabla
d9d23fa68d Fix: Properly set vendor in i686-win7-windows-msvc target 2024-01-03 14:09:31 +01:00
Taiki Endo
ee41651d2f Support reg_addr register class in s390x inline assembly 2024-01-03 18:00:37 +09:00
Nilstrieb
ffafcd8819 Update to bitflags 2 in the compiler
This involves lots of breaking changes. There are two big changes that
force changes. The first is that the bitflag types now don't
automatically implement normal derive traits, so we need to derive them
manually.

Additionally, bitflags now have a hidden inner type by default, which
breaks our custom derives. The bitflags docs recommend using the impl
form in these cases, which I did.
2023-12-30 18:17:28 +01:00
Matthias Krüger
54592473c1
Rollup merge of #112936 - Toasterson:illumos-aarch64-target, r=jackh726
Add illumos aarch64 target for rust.

This adds the newly being developed illumos aarch64 target to the rust compiler.

`@rmustacc` `@citrus-it` `@richlowe` As promissed before my hiatus :)
2023-12-23 20:02:27 +01:00
Matthias Krüger
09684d2d31
Rollup merge of #117601 - androm3da:hexagon_unknown_none_elf, r=petrochenkov
Add support for hexagon-unknown-none-elf as target

Still TODO: document usage details for new target
2023-12-22 19:01:26 +01:00
Till Wegmueller
074809bc81
Removing unneeded cpu defintion and add features analogous to netbsd/freebsd
Signed-off-by: Till Wegmueller <toasterson@gmail.com>
2023-12-21 11:59:05 -08:00
Brian Cain
cc34942f12 Add support for hexagon-unknown-none-elf as target
Signed-off-by: Brian Cain <bcain@quicinc.com>
2023-12-21 09:34:29 -08:00
Leo Howell
d9842a2060
Fix name error in aarch64_apple_watchos tier 3 target 2023-12-21 13:53:11 +08:00
Artyom Tetyukhin
fd0033c777
Use LLVM features for arm64e_apple_ios target
We need to use LLVM features here. Otherwise we get warnings such as
'+paca' is not a recognized feature for this target (ignoring feature)
2023-12-19 16:46:30 +04:00
Artyom Tetyukhin
3f8704355b
Remove legacy bitcode defaults 2023-12-19 16:40:33 +04:00
leohowell
e57294c139 Add new tier 3 aarch64-apple-watchos target 2023-12-18 16:26:54 +08:00
Urgau
428395e064 Move rustc_codegen_ssa target features to rustc_target 2023-12-14 14:40:55 +01:00
bors
9d49eb76c4 Auto merge of #118417 - anforowicz:default-hidden-visibility, r=TaKO8Ki
Add unstable `-Zdefault-hidden-visibility` cmdline flag for `rustc`.

The new flag has been described in the Major Change Proposal at
https://github.com/rust-lang/compiler-team/issues/656
2023-12-14 09:16:15 +00:00
bors
e6d1b0ec98 Auto merge of #118491 - cuviper:aarch64-stack-probes, r=wesleywiser
Enable stack probes on aarch64 for LLVM 18

I tested this on `aarch64-unknown-linux-gnu` with LLVM main (~18).

cc #77071, to be closed once we upgrade our LLVM submodule.
2023-12-14 02:01:13 +00:00
Lukasz Anforowicz
981c4e3ce6 Add unstable -Zdefault-hidden-visibility cmdline flag for rustc.
The new flag has been described in the Major Change Proposal at
https://github.com/rust-lang/compiler-team/issues/656
2023-12-13 21:14:23 +00:00
Josh Stone
233de9d89e Set the StackProbeType in apple::opts 2023-12-12 17:26:51 -08:00
bors
c41669970a Auto merge of #118150 - roblabla:new-win7-targets, r=davidtwco
Add new targets {x86_64,i686}-win7-windows-msvc

This PR adds two new Tier 3 targets, x86_64-win7-windows-msvc and i686-win7-windows-msvc, that aim to support targeting Windows 7 after the `*-pc-windows-msvc` target drops support for it (slated to happen in 1.76.0).

# Tier 3 target policy

> At this tier, the Rust project provides no official support for a target, so we place minimal requirements on the introduction of targets.
>
> A proposed new tier 3 target must be reviewed and approved by a member of the compiler team based on these requirements. The reviewer may choose to gauge broader compiler team consensus via a [Major Change Proposal (MCP)](https://forge.rust-lang.org/compiler/mcp.html).
>
> A proposed target or target-specific patch that substantially changes code shared with other targets (not just target-specific code) must be reviewed and approved by the appropriate team for that shared code before acceptance.
>
>  - A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.)

This is me, `@roblabla` on github.

> - Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target.

I went with naming the target `x86_64-win7-windows-msvc`, inserting the `win7` in the vendor field (usually set to to `pc`). This is done to avoid ecosystem churn, as quite a few crates have `cfg(target_os = "windows")` or `cfg(target_env = "msvc")`, but nearly no `cfg(target_vendor = "pc")`. Since my goal is to be able to seamlessly swap to the `win7` target, I figured it'd be easier this way.

>  - Target names should not introduce undue confusion or ambiguity unless absolutely necessary to maintain ecosystem compatibility. For example, if the name of the target makes people extremely likely to form incorrect beliefs about what it targets, the name should be changed or augmented to disambiguate it.

I believe the naming is pretty explicit.

>  - If possible, use only letters, numbers, dashes and underscores for the name. Periods (`.`) are known to cause issues in Cargo.

The name comforms to this requirement.

> - Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users.
>    - The target must not introduce license incompatibilities.
>    - Anything added to the Rust repository must be under the standard Rust license (`MIT OR Apache-2.0`).
>    - The target must not cause the Rust tools or libraries built for any other host (even when supporting cross-compilation to the target) to depend on any new dependency less permissive than the Rust licensing policy. This applies whether the dependency is a Rust crate that would require adding new license exceptions (as specified by the `tidy` tool in the rust-lang/rust repository), or whether the dependency is a native library or binary. In other words, the introduction of the target must not cause a user installing or running a version of Rust or the Rust tools to be subject to any new license requirements.
>    - Compiling, linking, and emitting functional binaries, libraries, or other code for the target (whether hosted on the target itself or cross-compiling from another target) must not depend on proprietary (non-FOSS) libraries. Host tools built for the target itself may depend on the ordinary runtime libraries supplied by the platform and commonly used by other applications built for the target, but those libraries must not be required for code generation for the target; cross-compilation to the target must not require such libraries at all. For instance, `rustc` built for the target may depend on a common proprietary C runtime library or console output library, but must not depend on a proprietary code generation library or code optimization library. Rust's license permits such combinations, but the Rust project has no interest in maintaining such combinations within the scope of Rust itself, even at tier 3.
>    - "onerous" here is an intentionally subjective term. At a minimum, "onerous" legal/licensing terms include but are *not* limited to: non-disclosure requirements, non-compete requirements, contributor license agreements (CLAs) or equivalent, "non-commercial"/"research-only"/etc terms, requirements conditional on the employer or employment of any particular Rust developers, revocable terms, any requirements that create liability for the Rust project or its developers or users, or any requirements that adversely affect the livelihood or prospects of the Rust project or its developers or users.

As far as I understand it, this target has exactly the same legal situation as the existing Tier 1 x86_64-pc-windows-msvc.

> - Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions.
>   -   This requirement does not prevent part or all of this policy from being cited in an explicit contract or work agreement (e.g. to implement or maintain support for a target). This requirement exists to ensure that a developer or team responsible for reviewing and approving a target does not face any legal threats or obligations that would prevent them from freely exercising their judgment in such approval, even if such judgment involves subjective matters or goes beyond the letter of these requirements.

Understood.

> - Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (core for most targets, alloc for targets that can support dynamic memory allocation, std for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions.

This target supports the whole libstd surface, since it's essentially reusing all of the x86_64-pc-windows-msvc target. Understood.

> - The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running binaries, or running tests (even if they do not pass), the documentation must explain how to run such binaries or tests for the target, using emulation if possible or dedicated hardware if necessary.

Wrote some documentation on how to build, test and cross-compile the target in the `platform-support` part. Hopefully it's enough to get started.

> - Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via ``@`)` to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages.
>   - Backlinks such as those generated by the issue/PR tracker when linking to an issue or PR are not considered a violation of this policy, within reason. However, such messages (even on a separate repository) must not generate notifications to anyone involved with a PR who has not requested such notifications.

Understood.

> - Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target.
>   - In particular, this may come up when working on closely related targets, such as variations of the same architecture with different features. Avoid introducing unconditional uses of features that another variation of the target may not have; use conditional compilation or runtime detection, as appropriate, to let each target run code supported by that target.

Understood.

> If a tier 3 target stops meeting these requirements, or the target maintainers no longer have interest or time, or the target shows no signs of activity and has not built for some time, or removing the target would improve the quality of the Rust codebase, we may post a PR to remove it; any such PR will be CCed to the target maintainers (and potentially other people who have previously worked on the target), to check potential interest in improving the situation.

Understood.
2023-12-09 08:41:50 +00:00
bors
608f32435a Auto merge of #117873 - quininer:android-emutls, r=Amanieu
Add emulated TLS support

This is a reopen of https://github.com/rust-lang/rust/pull/96317 . many android devices still only use 128 pthread keys, so using emutls can be helpful.

Currently LLVM uses emutls by default for some targets (such as android, openbsd), but rust does not use it, because `has_thread_local` is false.

This commit has some changes to allow users to enable emutls:

1. add `-Zhas-thread-local` flag to specify that std uses `#[thread_local]` instead of pthread key.
2. when using emutls, decorate symbol names to find thread local symbol correctly.
3. change `-Zforce-emulated-tls` to `-Ztls-model=emulated` to explicitly specify whether to generate emutls.

r? `@Amanieu`
2023-12-09 05:32:35 +00:00
Josh Stone
b99b5e5752 Enable stack probes on aarch64 for LLVM 18 2023-12-07 17:17:00 -08:00
David Wood
399cd6cbfd
targets: remove not-added {i386,i486}-unknown-linux-gnu
These files were added to the repository but never wired up so they could
be used - and that was a few years ago without anyone noticing - so let's
remove these, they can be re-added if someone wants them.

Signed-off-by: David Wood <david@davidtw.co>
2023-12-07 15:36:00 +00:00
bors
568f6a8641 Auto merge of #116565 - Sword-Destiny:master, r=Amanieu
add teeos std impl

add teeos std library implement.

this MR is draft untill the libc update to 0.2.150

this MR is the final step for suppot rust in teeos.
first step(add target): https://github.com/rust-lang/rust/pull/113480
second step(add teeos libc): https://github.com/rust-lang/libc/pull/3333
2023-12-07 05:22:21 +00:00
袁浩
e353eb91fb add teeos std impl
Signed-off-by: 袁浩 <yuanhao34@huawei.com>
2023-12-07 10:33:03 +08:00
Matthias Krüger
df6bc93f0e
Rollup merge of #117874 - esp-rs:riscv3264imafc-unknown-none-elf, r=davidtwco
`riscv32` platform support

This PR  adds the following RISCV targets to the tier 2 list of targets:

- riscv32imafc-unknown-none-elf
- riscv32im-unknown-none-elf

The rationale behind adding them directly to tier 2, is that the other bare metal targets already exist at tier 2, and these new targets are the same with an additional target feature enabled.

As well as the additional targets, this PR fills out the platform support document(s) that were previously missing.

~~The RISC-V bare metal targets don't currently have a platform support document, but this will change soon as the RISC-V team from the Rust-embedded working group will maintain these once https://github.com/davidtwco/rust/pull/1 is merged (and `@davidtwco's` upstream PR is merged after). For the time being you can cc myself or any other member of the RISC-V team: https://github.com/orgs/rust-embedded/teams/riscv.~~

> A tier 2 target must have value to people other than its maintainers. (It may still be a niche target, but it must not be exclusively useful for an inherently closed group.)

RISC-V is an open specification, used and accessible to anyone including individuals.

> A tier 2 target must have a designated team of developers (the "target maintainers") available to consult on target-specific build-breaking issues, or if necessary to develop target-specific language or library implementation details. This team must have at least 2 developers.

This rust-embedded working group's [RISCV team](https://github.com/orgs/rust-embedded/teams/riscv) will maintain these targets.

> The target must not place undue burden on Rust developers not specifically concerned with that target. Rust developers are expected to not gratuitously break a tier 2 target, but are not expected to become experts in every tier 2 target, and are not expected to provide target-specific implementations for every tier 2 target.

I don't forsee this being an issue, the RISCV team will ensure we avoid undue burden for the general Rust community.

> The target must provide documentation for the Rust community explaining how to build for the target using cross-compilation, and explaining how to run tests for the target. If at all possible, this documentation should show how to run Rust programs and tests for the target using emulation, to allow anyone to do so. If the target cannot be feasibly emulated, the documentation should explain how to obtain and work with physical hardware, cloud systems, or equivalent.

There are links to resources we maintain in the re wg org in the platform support document.

> The target must document its baseline expectations for the features or versions of CPUs, operating systems, libraries, runtime environments, and similar.

Documented in the platform support document.

> If introducing a new tier 2 or higher target that is identical to an existing Rust target except for the baseline expectations for the features or versions of CPUs, operating systems, libraries, runtime environments, and similar, then the proposed target must document to the satisfaction of the approving teams why the specific difference in baseline expectations provides sufficient value to justify a separate target.

New target features in RISCV can drastically change the capability of a CPU, hence the need for a separate target to support different variants. We aim to support any ratified RISCV extensions.

> Tier 2 targets must not leave any significant portions of core or the standard library unimplemented or stubbed out, unless they cannot possibly be supported on the target.

`core` is fully implemented.

> The code generation backend for the target should not have deficiencies that invalidate Rust safety properties, as evaluated by the Rust compiler team. (This requirement does not apply to arbitrary security enhancements or mitigations provided by code generation backends, only to those properties needed to ensure safe Rust code cannot cause undefined behavior or other unsoundness.) If this requirement does not hold, the target must clearly and prominently document any such limitations as part of the target's entry in the target tier list, and ideally also via a failing test in the testsuite. The Rust compiler team must be satisfied with the balance between these limitations and the difficulty of implementing the necessary features.

RISCV is a well-established and well-maintained LLVM backend. To the best of my knowledge, the backend won't cause the generated code to have undefined behaviour.

> If the target supports C code, and the target has an interoperable calling convention for C code, the Rust target must support that C calling convention for the platform via extern "C". The C calling convention does not need to be the default Rust calling convention for the target, however.

The C calling convention is supported by RISCV.

> The target must build reliably in CI, for all components that Rust's CI considers mandatory.

For the last 4-5 years many of these RISCV targets have been building in CI without any known issues.

> The approving teams may additionally require that a subset of tests pass in CI, such as enough to build a functional "hello world" program, ./x.py test --no-run, or equivalent "smoke tests". In particular, this requirement may apply if the target builds host tools, or if the tests in question provide substantial value via early detection of critical problems.

Not applicable, in the future we may wish to add qemu tests but this is out of scope for now.

> Building the target in CI must not take substantially longer than the current slowest target in CI, and should not substantially raise the maintenance burden of the CI infrastructure. This requirement is subjective, to be evaluated by the infrastructure team, and will take the community importance of the target into account.

To the best of my knowledge, this will not induce a burden on the current CI infra.

> Tier 2 targets should, if at all possible, support cross-compiling. Tier 2 targets should not require using the target as the host for builds, even if the target supports host tools.

Cross-compilation is supported and documented in the platform support document.

> In addition to the legal requirements for all targets (specified in the tier 3 requirements), because a tier 2 target typically involves the Rust project building and supplying various compiled binaries, incorporating the target and redistributing any resulting compiled binaries (e.g. built libraries, host tools if any) must not impose any onerous license requirements on any members of the Rust project, including infrastructure team members and those operating CI systems. This is a subjective requirement, to be evaluated by the approving teams.

There are no additional license issues to worry about.

> Tier 2 targets must not impose burden on the authors of pull requests, or other developers in the community, to ensure that tests pass for the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on tests failing for the target. Do not send automated messages or notifications (via any medium, including via `@)` to a PR author or others involved with a PR regarding the PR breaking tests on a tier 2 target, unless they have opted into such messages.

The RISCV team agrees not to do this.

> The target maintainers should regularly run the testsuite for the target, and should fix any test failures in a reasonably timely fashion.

The RISCV team will fix any issues in a timely manner.
2023-12-06 17:21:57 +01:00
quininer
e5b76892cc Add emulated TLS support
Currently LLVM uses emutls by default
for some targets (such as android, openbsd),
but rust does not use it, because `has_thread_local` is false.

This commit has some changes to allow users to enable emutls:

1. add `-Zhas-thread-local` flag to specify
    that std uses `#[thread_local]` instead of pthread key.
2. when using emutls, decorate symbol names
    to find thread local symbol correctly.
3. change `-Zforce-emulated-tls` to `-Ztls-model=emulated`
    to explicitly specify whether to generate emutls.
2023-12-07 00:21:32 +08:00
bors
84a554cda9 Auto merge of #117072 - betrusted-io:unwinding-crate-support, r=cuviper
Use `unwinding` crate for unwinding on Xous platform

This patch adds support for using [unwinding](https://github.com/nbdd0121/unwinding) on platforms where libunwinding isn't viable. An example of such a platform is `riscv32imac-unknown-xous-elf`.

### Background

The Rust project maintains a fork of llvm at [llvm-project](https://github.com/rust-lang/llvm-project/) where it applies patches on top of the llvm project. This mostly seems to be to get unwinding support for the SGX project, and there may be other patches that I'm unaware of.

There is a lot of machinery in the build system to support compiling `libunwind` on other platforms, and I needed to add additional patches to llvm in order to add support for Xous.

Rather than continuing down this path, it seemed much easier to use a Rust-based library. The `unwinding` crate by `@nbdd0121` fits this description perfectly.

### Future work

This could potentially replace the custom patches for `libunwind` on other platforms such as SGX, and could enable unwinding support on many more exotic platforms.

### Anti-goals

This is not designed to replace `libunwind` on tier-one platforms or those where unwinding support already exists. There is already a well-established approach for unwinding there. Instead, this aims to enable unwinding on new platforms where C++ code may be difficult to compile.
2023-12-06 02:23:01 +00:00
Scott Mabin
1a7b610da3 Add riscv32 imafc bare metal target
- riscv32imac-unknown-none-elf
- Add platform support docs for rv32
2023-12-05 11:05:52 +00:00
Till Wegmueller
5af05f8dfd
Update target to be in line with recent target refactors
Signed-off-by: Till Wegmueller <toasterson@gmail.com>
2023-12-04 12:48:57 -08:00
Till Wegmueller
13426f4447
Add illumos aarch64 target
Signed-off-by: Till Wegmueller <toasterson@gmail.com>
2023-12-04 12:14:23 -08:00
Taiki Endo
b25fa9a811 Pass +forced-atomics feature for riscv32{i,im,imc}-unknown-none-elf 2023-11-28 10:39:37 +09:00
bors
49b3924bd4 Auto merge of #117947 - Dirbaio:drop-llvm-15, r=cuviper
Update the minimum external LLVM to 16.

With this change, we'll have stable support for LLVM 16 and 17.
For reference, the previous increase to LLVM 15 was #114148

[Relevant zulip discussion](https://rust-lang.zulipchat.com/#narrow/stream/131828-t-compiler/topic/riscv.20forced-atomics)
2023-11-27 21:54:03 +00:00
Takayuki Maeda
7b4eb52041
Rollup merge of #118095 - ferrocene:apply-cortex-a53-fix, r=davidtwco
Enable the Arm Cortex-A53 errata mitigation on aarch64-unknown-none

Arm Cortex-A53 CPUs have an errata related to a specific sequence of instructions - errata number 843419 (https://documentation-service.arm.com/static/5fa29fddb209f547eebd361d). There is a mitigation that can be applied at link-time which detects the when sequence of instructions exists at a specific alignment. When detected, the linker re-writes those instructions and either changes an ADRP to an ADR, or bounces to a veneer to break the sequence.

The linker argument to enable the mitigation is "--fix-cortex-a53-843419", and this is supported by GNU ld and LLVM lld. The gcc argument to enable the flag is "-mfix-cortex-a53-843419".

Because the aarch64-unknown-none target uses rust-lld directly, this patch causes rustc to emit the "--fix-cortex-a53-843419" argument when calling the linker, just like aarch64-linux-gnu-gcc on Ubuntu 22.04 does.

Failure to enable this mitigation in the linker can cause the production of instruction sequences that do not execute correctly on Arm Cortex-A53.
2023-11-27 22:38:23 +09:00
bors
16087eeea8 Auto merge of #118127 - RalfJung:unadjusted-abi, r=compiler-errors
the unadjusted ABI needs to pass aggregates by-value

Fixes https://github.com/rust-lang/rust/issues/118124, a regression introduced in https://github.com/rust-lang/rust/pull/117500
2023-11-25 17:06:22 +00:00
roblabla
85e73c1164 Add i686-win7-windows-msvc target 2023-11-22 11:15:04 +01:00
roblabla
ad6dd6c624 Add new x86_64-win7-windows-msvc target 2023-11-22 11:15:04 +01:00
Nicholas Nethercote
7060fc8327 Replace no_ord_impl with orderable.
Similar to the previous commit, this replaces `newtype_index`'s opt-out
`no_ord_impl` attribute with the opt-in `orderable` attribute.
2023-11-22 18:38:17 +11:00
Nicholas Nethercote
3ef9d4d0ed Replace custom_encodable with encodable.
By default, `newtype_index!` types get a default `Encodable`/`Decodable`
impl. You can opt out of this with `custom_encodable`. Opting out is the
opposite to how Rust normally works with autogenerated (derived) impls.

This commit inverts the behaviour, replacing `custom_encodable` with
`encodable` which opts into the default `Encodable`/`Decodable` impl.
Only 23 of the 59 `newtype_index!` occurrences need `encodable`.

Even better, there were eight crates with a dependency on
`rustc_serialize` just from unused default `Encodable`/`Decodable`
impls. This commit removes that dependency from those eight crates.
2023-11-22 18:37:14 +11:00
Dario Nieuwenhuis
7de6d04bc8 Update the minimum external LLVM to 16. 2023-11-21 22:40:16 +01:00
Ralf Jung
a06f3556aa the unadjusted ABI needs to pass aggregates by-value 2023-11-21 10:15:59 +01:00
Jonathan Pallant (Ferrous Systems)
4741f44963
Enable the Arm Cortex-A53 errata mitigation on aarch64-unknown-none
Arm Cortex-A53 CPUs have an errata related to a specific sequence of instructions - errata number 843419 (https://documentation-service.arm.com/static/5fa29fddb209f547eebd361d). There is a mitigation that can be applied at link-time which detects the when sequence of instructions exists at a specific alignment. When detected, the linker re-writes those instructions and either changes an ADRP to an ADR, or bounces to a veneer to break the sequence.

The linker argument to enable the mitigation is "--fix-cortex-a53-843419", and this is supported by GNU ld and LLVM lld. The gcc argument to enable the flag is "-mfix-cortex-a53-843419".

Because the aarch64-unknown-none target uses rust-lld directly, this patch causes rustc to emit the "--fix-cortex-a53-843419" argument when calling the linker, just like aarch64-linux-gnu-gcc on Ubuntu 22.04 does.

Failure to enable this mitigation in the linker can cause the production of instruction sequences that do not execute correctly on Arm Cortex-A53.
2023-11-20 16:25:58 +00:00
Petr Sumbera
8a77060657 Remove now unnecessary x86_64_sun_solaris.rs. 2023-11-20 15:55:13 +01:00
Petr Sumbera
fecd3e684d Remove now deprecated target x86_64-sun-solaris. 2023-11-20 15:15:47 +01:00
bors
19079cf804 Auto merge of #115526 - arttet:master, r=jackh726
Add arm64e-apple-ios & arm64e-apple-darwin targets

This introduces

*  `arm64e-apple-ios`
*  `arm64e-apple-darwin`

Rust targets for support `arm64e` architecture on `iOS` and `Darwin`.

So, this is a first approach for integrating to the Rust compiler.

## Tier 3 Target Policy

> * A tier 3 target must have a designated developer or developers (the "target
maintainers") on record to be CCed when issues arise regarding the target.
(The mechanism to track and CC such developers may evolve over time.)

I will be the target maintainer.

> * Targets must use naming consistent with any existing targets; for instance, a
target for the same CPU or OS as an existing Rust target should use the same
name for that CPU or OS. Targets should normally use the same names and
naming conventions as used elsewhere in the broader ecosystem beyond Rust
(such as in other toolchains), unless they have a very good reason to
diverge. Changing the name of a target can be highly disruptive, especially
once the target reaches a higher tier, so getting the name right is important
even for a tier 3 target.
Target names should not introduce undue confusion or ambiguity unless
absolutely necessary to maintain ecosystem compatibility. For example, if
the name of the target makes people extremely likely to form incorrect
beliefs about what it targets, the name should be changed or augmented to
disambiguate it.
If possible, use only letters, numbers, dashes and underscores for the name.
Periods (.) are known to cause issues in Cargo.

The target names `arm64e-apple-ios`, `arm64e-apple-darwin` were derived from `aarch64-apple-ios`, `aarch64-apple-darwin`.
In this [ticket,](#73628) people discussed the best suitable names for these targets.

> In some cases, the arm64e arch might be "different". For example:
> * `thread_set_state` might fail with (os/kern) protection failure if we try to call it from arm64 process to arm64e process.
> * The returning value of dlsym is PAC signed on arm64e, while left untouched on arm64
> * Some function like pthread_create_from_mach_thread requires a PAC signed function pointer on arm64e, which is not required on arm64.

So, I have chosen them because there are similar triplets in LLVM. I think there are no more suitable names for these targets.

> * Tier 3 targets may have unusual requirements to build or use, but must not
create legal issues or impose onerous legal terms for the Rust project or for
Rust developers or users.
The target must not introduce license incompatibilities.
Anything added to the Rust repository must be under the standard Rust
license (MIT OR Apache-2.0).
The target must not cause the Rust tools or libraries built for any other
host (even when supporting cross-compilation to the target) to depend
on any new dependency less permissive than the Rust licensing policy. This
applies whether the dependency is a Rust crate that would require adding
new license exceptions (as specified by the tidy tool in the
rust-lang/rust repository), or whether the dependency is a native library
or binary. In other words, the introduction of the target must not cause a
user installing or running a version of Rust or the Rust tools to be
subject to any new license requirements.
Compiling, linking, and emitting functional binaries, libraries, or other
code for the target (whether hosted on the target itself or cross-compiling
from another target) must not depend on proprietary (non-FOSS) libraries.
Host tools built for the target itself may depend on the ordinary runtime
libraries supplied by the platform and commonly used by other applications
built for the target, but those libraries must not be required for code
generation for the target; cross-compilation to the target must not require
such libraries at all. For instance, rustc built for the target may
depend on a common proprietary C runtime library or console output library,
but must not depend on a proprietary code generation library or code
optimization library. Rust's license permits such combinations, but the
Rust project has no interest in maintaining such combinations within the
scope of Rust itself, even at tier 3.
"onerous" here is an intentionally subjective term. At a minimum, "onerous"
legal/licensing terms include but are not limited to: non-disclosure
requirements, non-compete requirements, contributor license agreements
(CLAs) or equivalent, "non-commercial"/"research-only"/etc terms,
requirements conditional on the employer or employment of any particular
Rust developers, revocable terms, any requirements that create liability
for the Rust project or its developers or users, or any requirements that
adversely affect the livelihood or prospects of the Rust project or its
developers or users.

No dependencies were added to Rust.

> * Neither this policy nor any decisions made regarding targets shall create any
binding agreement or estoppel by any party. If any member of an approving
Rust team serves as one of the maintainers of a target, or has any legal or
employment requirement (explicit or implicit) that might affect their
decisions regarding a target, they must recuse themselves from any approval
decisions regarding the target's tier status, though they may otherwise
participate in discussions.
>    * This requirement does not prevent part or all of this policy from being
cited in an explicit contract or work agreement (e.g. to implement or
maintain support for a target). This requirement exists to ensure that a
developer or team responsible for reviewing and approving a target does not
face any legal threats or obligations that would prevent them from freely
exercising their judgment in such approval, even if such judgment involves
subjective matters or goes beyond the letter of these requirements.

Understood.
I am not a member of a Rust team.

> * Tier 3 targets should attempt to implement as much of the standard libraries
as possible and appropriate (core for most targets, alloc for targets
that can support dynamic memory allocation, std for targets with an
operating system or equivalent layer of system-provided functionality), but
may leave some code unimplemented (either unavailable or stubbed out as
appropriate), whether because the target makes it impossible to implement or
challenging to implement. The authors of pull requests are not obligated to
avoid calling any portions of the standard library on the basis of a tier 3
target not implementing those portions.

Understood.
`std` is supported.

> * The target must provide documentation for the Rust community explaining how
to build for the target, using cross-compilation if possible. If the target
supports running binaries, or running tests (even if they do not pass), the
documentation must explain how to run such binaries or tests for the target,
using emulation if possible or dedicated hardware if necessary.

Building is described in the derived target doc.

> * Tier 3 targets must not impose burden on the authors of pull requests, or
other developers in the community, to maintain the target. In particular,
do not post comments (automated or manual) on a PR that derail or suggest a
block on the PR based on a tier 3 target. Do not send automated messages or
notifications (via any medium, including via `@)` to a PR author or others
involved with a PR regarding a tier 3 target, unless they have opted into
such messages.
>    * Backlinks such as those generated by the issue/PR tracker when linking to
an issue or PR are not considered a violation of this policy, within
reason. However, such messages (even on a separate repository) must not
generate notifications to anyone involved with a PR who has not requested
such notifications.

Understood.

> * Patches adding or updating tier 3 targets must not break any existing tier 2
or tier 1 target, and must not knowingly break another tier 3 target without
approval of either the compiler team or the maintainers of the other tier 3
target.
>     * In particular, this may come up when working on closely related targets,
such as variations of the same architecture with different features. Avoid
introducing unconditional uses of features that another variation of the
target may not have; use conditional compilation or runtime detection, as
appropriate, to let each target run code supported by that target.

These targets are not fully ABI compatible with arm64e code.

#73628
2023-11-20 03:11:17 +00:00