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Disable avx512

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This commit is contained in:
Antoni Boucher 2022-06-19 20:19:26 -04:00
parent 910ec42566
commit 4094923789
2 changed files with 12 additions and 12 deletions
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22
src/base.rs
View File

@ -83,33 +83,33 @@ pub fn compile_codegen_unit<'tcx>(tcx: TyCtxt<'tcx>, cgu_name: Symbol, supports_
context.add_command_line_option("-mavx2");
// FIXME(antoyo): the following causes an illegal instruction on vmovdqu64 in std_example on my CPU.
// Only add if the CPU supports it.
context.add_command_line_option("-mavx512f");
//context.add_command_line_option("-mavx512f");
context.add_command_line_option("-msha");
context.add_command_line_option("-mpclmul");
context.add_command_line_option("-mfma");
context.add_command_line_option("-mfma4");
context.add_command_line_option("-mavx512vpopcntdq");
context.add_command_line_option("-mavx512vl");
//context.add_command_line_option("-mavx512vpopcntdq");
//context.add_command_line_option("-mavx512vl");
context.add_command_line_option("-m64");
context.add_command_line_option("-mbmi");
context.add_command_line_option("-mgfni");
context.add_command_line_option("-mavxvnni");
context.add_command_line_option("-mavx512vnni");
context.add_command_line_option("-mavx512bw");
//context.add_command_line_option("-mavx512vnni");
//context.add_command_line_option("-mavx512bw");
context.add_command_line_option("-mf16c");
context.add_command_line_option("-mavx512bitalg");
//context.add_command_line_option("-mavx512bitalg");
context.add_command_line_option("-maes");
context.add_command_line_option("-mxsavec");
context.add_command_line_option("-mbmi2");
context.add_command_line_option("-mavx512bf16");
//context.add_command_line_option("-mavx512bf16");
context.add_command_line_option("-mrtm");
context.add_command_line_option("-mvaes");
context.add_command_line_option("-mvpclmulqdq");
context.add_command_line_option("-mavx");
context.add_command_line_option("-mavx512vbmi2");
context.add_command_line_option("-mavx512vbmi");
context.add_command_line_option("-mavx512ifma");
context.add_command_line_option("-mavx512cd");
//context.add_command_line_option("-mavx512vbmi2");
//context.add_command_line_option("-mavx512vbmi");
//context.add_command_line_option("-mavx512ifma");
//context.add_command_line_option("-mavx512cd");
for arg in &tcx.sess.opts.cg.llvm_args {
context.add_command_line_option(arg);
}

2
src/lib.rs
View File

@ -304,7 +304,7 @@ pub fn target_features(sess: &Session) -> Vec<Symbol> {
// Probably using the equivalent of __builtin_cpu_supports.
#[cfg(feature="master")]
{
_feature.contains("sse") || _feature.contains("avx")
(_feature.contains("sse") || _feature.contains("avx")) && !_feature.contains("avx512")
}
#[cfg(not(feature="master"))]
{