rust/.gitignore

target
**/*.rs.bk
*.rlib
*.o
perf.data
perf.data.old
*.events
*.string*
/build_sysroot/sysroot
/build_sysroot/sysroot_src
/build_sysroot/Cargo.lock
/build_sysroot/test_target/Cargo.lock
/rust
/simple-raytracer
/regex
/rand
gimple*
*asm
res
test-backend
gcc_path
benchmarks
tools/llvm-project
tools/llvmint
tools/llvmint-2
# The `llvm` folder is generated by the `tools/generate_intrinsics.py` script to update intrinsics.
llvm
Initial commit 2020-05-10 09:54:30 -05:00			`target`
			`*/.rs.bk`
			`*.rlib`
			`*.o`
			`perf.data`
			`perf.data.old`
			`*.events`
			`.string`
			`/build_sysroot/sysroot`
Implement basic inline asm support (#72) * Implement basic support for inline assembly * Disable LTO We don't support it yet at all * Handle `inout(reg) var` correctly Turns out that `+` readwrite output registers cannot be tied with input variables. * Add limited support for llvm_asm! * Handle CHANNEL correctly * Add support for arbitrary explicit registers * Handle symbols properly * Add rudimentary asm tests * Exclude llvm_asm! tests from tests runs * Insert `__builtin_unreachable()` after diverging asm blocks 2021-09-05 10:26:01 -05:00			`/build_sysroot/sysroot_src`
Initial commit 2020-05-10 09:54:30 -05:00			`/build_sysroot/Cargo.lock`
			`/build_sysroot/test_target/Cargo.lock`
			`/rust`
Implement basic inline asm support (#72) * Implement basic support for inline assembly * Disable LTO We don't support it yet at all * Handle `inout(reg) var` correctly Turns out that `+` readwrite output registers cannot be tied with input variables. * Add limited support for llvm_asm! * Handle CHANNEL correctly * Add support for arbitrary explicit registers * Handle symbols properly * Add rudimentary asm tests * Exclude llvm_asm! tests from tests runs * Insert `__builtin_unreachable()` after diverging asm blocks 2021-09-05 10:26:01 -05:00			`/simple-raytracer`
Initial commit 2020-05-10 09:54:30 -05:00			`/regex`
Add support for target builtins 2022-02-06 16:04:24 -06:00			`/rand`
Initial commit 2020-05-10 09:54:30 -05:00			`gimple*`
			`*asm`
			`res`
			`test-backend`
Update custom rustc instructions (#73) 2021-08-28 10:34:47 -05:00			`gcc_path`
Support 128-bit integers on platforms without native support (#103) * Use sized integer types * Add support for integer types not supported on some platforms * Add feature to test non-native integers in CI 2022-01-30 20:45:14 -06:00			`benchmarks`
Add tool to generate intrinsics conversion automatically 2022-05-03 11:59:04 -05:00			`tools/llvm-project`
Generate intrinsics translations from llvmint as well 2022-05-03 14:24:14 -05:00			`tools/llvmint`
Add tools/llvmint-2 to ignored entries 2022-05-15 08:31:25 -05:00			`tools/llvmint-2`
Add `llvm` folder to .gitignore file 2023-04-05 09:20:20 -05:00			# The `llvm` folder is generated by the `tools/generate_intrinsics.py` script to update intrinsics.
			`llvm`