Fix translated address not being passed to memory access function

This commit is contained in:
pjht 2023-03-23 10:31:01 -05:00
parent 8f91a1aa3e
commit 0d5a20c22e
Signed by: pjht
GPG Key ID: 7B5F6AFBEC7EE78E

View File

@ -150,8 +150,8 @@ impl Backplane {
pub fn read_word(&self, address: u32) -> Result<u16, BusError> { pub fn read_word(&self, address: u32) -> Result<u16, BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.read_word(address), |address, mut card| card.read_word(address),
|mut card| card.read_word_io(address as u8), |address, mut card| card.read_word_io(address as u8),
false, false,
false, false,
) )
@ -160,8 +160,8 @@ impl Backplane {
pub fn read_byte(&self, address: u32) -> Result<u8, BusError> { pub fn read_byte(&self, address: u32) -> Result<u8, BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.read_byte(address), |address, mut card| card.read_byte(address),
|mut card| card.read_byte_io(address as u8), |address, mut card| card.read_byte_io(address as u8),
false, false,
false, false,
) )
@ -170,8 +170,8 @@ impl Backplane {
pub fn write_word(&self, address: u32, data: u16) -> Result<(), BusError> { pub fn write_word(&self, address: u32, data: u16) -> Result<(), BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.write_word(address, data), |address, mut card| card.write_word(address, data),
|mut card| card.write_word_io(address as u8, data), |address, mut card| card.write_word_io(address as u8, data),
false, false,
true, true,
) )
@ -180,8 +180,8 @@ impl Backplane {
pub fn write_byte(&self, address: u32, data: u8) -> Result<(), BusError> { pub fn write_byte(&self, address: u32, data: u8) -> Result<(), BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.write_byte(address, data), |address, mut card| card.write_byte(address, data),
|mut card| card.write_byte_io(address as u8, data), |address, mut card| card.write_byte_io(address as u8, data),
false, false,
true, true,
) )
@ -190,8 +190,8 @@ impl Backplane {
pub fn read_word_phys(&self, address: u32) -> Result<u16, BusError> { pub fn read_word_phys(&self, address: u32) -> Result<u16, BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.read_word(address), |address, mut card| card.read_word(address),
|mut card| card.read_word_io(address as u8), |address, mut card| card.read_word_io(address as u8),
true, true,
false, false,
) )
@ -201,8 +201,8 @@ impl Backplane {
pub fn read_byte_phys(&self, address: u32) -> Result<u8, BusError> { pub fn read_byte_phys(&self, address: u32) -> Result<u8, BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.read_byte(address), |address, mut card| card.read_byte(address),
|mut card| card.read_byte_io(address as u8), |address, mut card| card.read_byte_io(address as u8),
true, true,
false, false,
) )
@ -212,8 +212,8 @@ impl Backplane {
pub fn write_word_phys(&self, address: u32, data: u16) -> Result<(), BusError> { pub fn write_word_phys(&self, address: u32, data: u16) -> Result<(), BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.write_word(address, data), |address, mut card| card.write_word(address, data),
|mut card| card.write_word_io(address as u8, data), |address, mut card| card.write_word_io(address as u8, data),
true, true,
true, true,
) )
@ -223,8 +223,8 @@ impl Backplane {
pub fn write_byte_phys(&self, address: u32, data: u8) -> Result<(), BusError> { pub fn write_byte_phys(&self, address: u32, data: u8) -> Result<(), BusError> {
self.mem_helper( self.mem_helper(
address, address,
|mut card| card.write_byte(address, data), |address, mut card| card.write_byte(address, data),
|mut card| card.write_byte_io(address as u8, data), |address, mut card| card.write_byte_io(address as u8, data),
true, true,
true, true,
) )
@ -239,8 +239,8 @@ impl Backplane {
write: bool, write: bool,
) -> Result<T, BusError> ) -> Result<T, BusError>
where where
M: FnMut(RefMut<'_, dyn Card>) -> NullableResult<T, BusError>, M: FnMut(u32, RefMut<'_, dyn Card>) -> NullableResult<T, BusError>,
I: FnMut(RefMut<'_, dyn Card>) -> NullableResult<T, BusError>, I: FnMut(u32, RefMut<'_, dyn Card>) -> NullableResult<T, BusError>,
{ {
let address = if bypass_mmu { let address = if bypass_mmu {
address address
@ -262,14 +262,14 @@ impl Backplane {
(0..=0x00fe_ffff) | (0x0100_0000..=0xffff_ffff) => self (0..=0x00fe_ffff) | (0x0100_0000..=0xffff_ffff) => self
.cards .cards
.iter() .iter()
.try_find_map(|card| mem_func(card.borrow_mut())) .try_find_map(|card| mem_func(address, card.borrow_mut()))
.result(BusError), .result(BusError),
(0x00ff_0000..=0x00ff_00ff) => Ok(T::default()), (0x00ff_0000..=0x00ff_00ff) => Ok(T::default()),
(0x00ff_0100..=0x00ff_ffff) => self (0x00ff_0100..=0x00ff_ffff) => self
.cards .cards
.get(((address >> 8) as u8 - 1) as usize) .get(((address >> 8) as u8 - 1) as usize)
.map_or(Ok(T::default()), |card| { .map_or(Ok(T::default()), |card| {
io_func(card.borrow_mut()) io_func(address, card.borrow_mut())
.optional_result() .optional_result()
.unwrap_or(Ok(T::default())) .unwrap_or(Ok(T::default()))
}), }),