16 lines
295 B
Verilog
Executable File
16 lines
295 B
Verilog
Executable File
//256 byte ROM used for KT8 program memory
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module rom (address_i,
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out_o );
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input [7:0] address_i;
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output [7:0] out_o;
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reg [7:0] mem [0:255];
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//output is not clocked, always reflects current memory addresses
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assign out_o=mem[address_i];
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endmodule
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