23 lines
464 B
Verilog
23 lines
464 B
Verilog
// Program Counter for CPU1
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// Original design by Charlie Krauter for KT8
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// 4 bit counter with reset. Can also jump.
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module pc(clk_i,
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rst_i,
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jump_i,
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jump_v,
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count_o );
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input clk_i, rst_i, jump_i;
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input [3:0] jump_v;
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output [3:0] count_o;
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reg [3:0] count_o;
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always @(posedge clk_i, posedge rst_i)
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if (rst_i) count_o<=0;
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else if (jump_i) count_o<=jump_i;
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else count_o<=count_o+1;
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endmodule
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