79 lines
2.4 KiB
NASM
79 lines
2.4 KiB
NASM
section .text
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global switch_to_thread_asm
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extern load_address_space
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extern currentThread
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extern tss
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;WARNING: Caller is expected to disable IRQs before calling, and enable IRQs again after function returns
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switch_to_thread_asm:
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;Save previous thread's state
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;Notes:
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; For cdecl; EAX, ECX, and EDX are already saved by the caller and don't need to be saved again
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; EIP is already saved on the stack by the caller's "CALL" instruction
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; The thread isn't able to change CR3 so it doesn't need to be saved
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; Segment registers are constants (while running kernel code) so they don't need to be saved
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push ebx
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push esi
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push edi
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push ebp
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mov edi,[currentThread] ;edi = address of the previous thread's data structure
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mov [edi],esp ;Save ESP for the thread's kernel stack in the thread's data structure
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;Load next thread's state
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mov esi,[esp+(4+1)*4] ;esi = address of the next thread's data structure
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mov [currentThread],esi ;Set the current thread to the thread we are switching to
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mov esp,[esi] ;Load ESP for next thread's kernel stack from the thread's data structure
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mov eax,[esi+8] ;eax = address of page directory for next thread
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mov ebx,[esi+4] ;ebx = address for the top of the next thread's kernel stack
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mov [tss+4],ebx ;Adjust the ESP0 field in the TSS (used by CPU for for CPL=3 -> CPL=0 privilege level changes)
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mov ecx,cr3 ;ecx = previous thread's virtual address space
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cmp eax,ecx ;Does the virtual address space need to being changed?
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je .doneVAS ; no, virtual address space is the same, so don't reload it and cause TLB flushes
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; yes, load the next thread's virtual address space
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push eax
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call load_address_space
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add esp,4
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.doneVAS:
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pop ebp
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pop edi
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pop esi
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pop ebx
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ret ;Load next thread's EIP from its kernel stack
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global task_init
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task_init:
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pop ecx
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pop ebx
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cli
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mov ax, 0x23
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov eax, ecx
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push 0x23
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push eax
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pushf
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pop eax
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or eax, 0x200
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push eax
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push 0x1B
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push ebx
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iret
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global wait_for_unblocked_thread_asm
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wait_for_unblocked_thread_asm:
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sti ;As interrupts are stopped in tasking code, re-enable them
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hlt ;Wait for an interrupt handler to run and return.
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cli ;Clear interrupts, as tasking code must not be run with interrupts on.
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