Get GDT,IDT and usermode working!
This commit is contained in:
parent
0534ba86e6
commit
ee9839beaa
@ -1,6 +1,10 @@
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#include "gdt.h"
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#include "paging.h"
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#include "isr.h"
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void cpu_init() {
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gdt_init();
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isr_install();
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asm volatile("sti");
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paging_init();
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}
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@ -1,4 +1,5 @@
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#include <stdint.h>
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#include "seg_upd.h"
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#define NUM_ENTRIES 5
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typedef struct {
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@ -8,14 +9,14 @@ typedef struct {
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uint8_t access;
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uint8_t limit_flags;
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uint8_t base_high8;
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} gdt_entry;
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} __attribute__((packed)) gdt_entry;
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typedef struct {
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uint16_t size;
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uint32_t address;
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} gdt_description;
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} __attribute__((packed)) gdt_description;
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gdt_entry gdt[NUM_ENTRIES-1];
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gdt_entry gdt[NUM_ENTRIES];
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gdt_description gdt_desc;
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@ -26,8 +27,9 @@ void gdt_init() {
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set_entry(3,0,0xFFFFF,0xFA);
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set_entry(4,0,0xFFFFF,0xF2);
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gdt_desc.size=(sizeof(gdt_entry)*NUM_ENTRIES)-1;
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gdt_desc.address=&gdt[0];
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asm volatile("lgdt gdt_desc");
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gdt_desc.address=&gdt;
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asm volatile("lgdt (%%eax)"::"a"((uint32_t)&gdt_desc));
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seg_upd();
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}
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void set_entry(int i,uint32_t base,uint32_t limit,uint8_t access) {
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@ -36,6 +38,6 @@ void set_entry(int i,uint32_t base,uint32_t limit,uint8_t access) {
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gdt[i].base_mid8=(base&0xFF0000)>>16;
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gdt[i].access=access;
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uint8_t limit_high4=(limit&0xF0000)>>16;
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gdt[i].limit_flags=0xC0&limit_high4;
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gdt[i].limit_flags=0xC0|limit_high4;
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gdt[i].base_high8=(base&0xFF000000)>>24;
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}
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20
cpu/i386/idt.c
Normal file
20
cpu/i386/idt.c
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@ -0,0 +1,20 @@
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#include "idt.h"
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#include <stdint.h>
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#define low_16(address) (uint16_t)((address) & 0xFFFF)
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#define high_16(address) (uint16_t)(((address) >> 16) & 0xFFFF)
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void set_idt_gate(int n,uint32_t handler) {
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idt[n].low_offset=low_16(handler);
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idt[n].sel=KERNEL_CS;
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idt[n].always0=0;
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idt[n].flags=0x8E;
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idt[n].high_offset=high_16(handler);
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}
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void set_idt() {
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idt_reg.base=(uint32_t) &idt;
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idt_reg.limit=IDT_ENTRIES * sizeof(idt_gate_t) - 1;
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/* Don't make the mistake of loading &idt -- always load &idt_reg */
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asm volatile("lidtl (%0)":: "r" (&idt_reg));
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}
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39
cpu/i386/idt.h
Normal file
39
cpu/i386/idt.h
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@ -0,0 +1,39 @@
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#ifndef IDT_H
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#define IDT_H
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#include <stdint.h>
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/* Segment selectors */
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#define KERNEL_CS 0x08
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/* How every interrupt gate (handler) is defined */
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typedef struct {
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uint16_t low_offset; /* Lower 16 bits of handler function address */
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uint16_t sel; /* Kernel segment selector */
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uint8_t always0;
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/* First byte
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* Bit 7: "Interrupt is present"
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* Bits 6-5: Privilege level of caller (0=kernel..3=user)
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* Bit 4: Set to 0 for interrupt gates
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* Bits 3-0: bits 1110 = decimal 14 = "32 bit interrupt gate" */
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uint8_t flags;
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uint16_t high_offset; /* Higher 16 bits of handler function address */
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} __attribute__((packed)) idt_gate_t ;
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/* A pointer to the array of interrupt handlers.
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* Assembly instruction 'lidt' will read it */
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typedef struct {
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uint16_t limit;
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uint32_t base;
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} __attribute__((packed)) idt_register_t;
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#define IDT_ENTRIES 256
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idt_gate_t idt[IDT_ENTRIES];
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idt_register_t idt_reg;
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/* Functions implemented in idt.c */
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void set_idt_gate(int n,uint32_t handler);
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void set_idt();
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#endif
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431
cpu/i386/interrupt.asm
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431
cpu/i386/interrupt.asm
Normal file
@ -0,0 +1,431 @@
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; Defined in isr.c
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[extern isr_handler]
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[extern irq_handler]
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; Common ISR code
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isr_common_stub:
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; 1. Save CPU state
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pusha ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
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mov ax, ds ; Lower 16-bits of eax = ds.
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push eax ; save the data segment descriptor
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mov ax, 0x10 ; kernel data segment descriptor
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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; 2. Call C handler
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call isr_handler
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; 3. Restore state
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pop eax
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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popa
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add esp, 8 ; Cleans up the pushed error code and pushed ISR number
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sti
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iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP
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; Common IRQ code. Identical to ISR code except for the 'call'
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; and the 'pop ebx'
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irq_common_stub:
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pusha
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mov ax, ds
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push eax
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mov ax, 0x10
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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call irq_handler ; Different than the ISR code
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pop ebx ; Different than the ISR code
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mov ds, bx
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mov es, bx
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mov fs, bx
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mov gs, bx
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popa
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add esp, 8
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sti
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iret
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; We don't get information about which interrupt was caller
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; when the handler is run, so we will need to have a different handler
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; for every interrupt.
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; Furthermore, some interrupts push an error code onto the stack but others
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; don't, so we will push a dummy error code for those which don't, so that
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; we have a consistent stack for all of them.
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; First make the ISRs global
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global isr0
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global isr1
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global isr2
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global isr3
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global isr4
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global isr5
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global isr6
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global isr7
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global isr8
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global isr9
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global isr10
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global isr11
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global isr12
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global isr13
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global isr14
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global isr15
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global isr16
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global isr17
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global isr18
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global isr19
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global isr20
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global isr21
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global isr22
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global isr23
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global isr24
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global isr25
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global isr26
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global isr27
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global isr28
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global isr29
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global isr30
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global isr31
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global isr80
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; IRQs
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global irq0
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global irq1
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global irq2
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global irq3
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global irq4
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global irq5
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global irq6
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global irq7
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global irq8
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global irq9
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global irq10
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global irq11
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global irq12
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global irq13
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global irq14
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global irq15
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; 0: Divide By Zero Exception
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isr0:
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cli
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push byte 0
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push byte 0
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jmp isr_common_stub
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; 1: Debug Exception
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isr1:
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cli
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push byte 0
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push byte 1
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jmp isr_common_stub
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; 2: Non Maskable Interrupt Exception
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isr2:
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cli
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push byte 0
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push byte 2
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jmp isr_common_stub
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; 3: Int 3 Exception
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isr3:
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cli
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push byte 0
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push byte 3
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jmp isr_common_stub
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; 4: INTO Exception
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isr4:
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cli
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push byte 0
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push byte 4
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jmp isr_common_stub
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; 5: Out of Bounds Exception
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isr5:
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cli
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push byte 0
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push byte 5
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jmp isr_common_stub
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; 6: Invalid Opcode Exception
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isr6:
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cli
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push byte 0
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push byte 6
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jmp isr_common_stub
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; 7: Coprocessor Not Available Exception
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isr7:
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cli
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push byte 0
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push byte 7
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jmp isr_common_stub
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; 8: Double Fault Exception (With Error Code!)
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isr8:
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cli
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push byte 8
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jmp isr_common_stub
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; 9: Coprocessor Segment Overrun Exception
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isr9:
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cli
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push byte 0
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push byte 9
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jmp isr_common_stub
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; 10: Bad TSS Exception (With Error Code!)
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isr10:
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cli
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push byte 10
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jmp isr_common_stub
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; 11: Segment Not Present Exception (With Error Code!)
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isr11:
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cli
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push byte 11
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jmp isr_common_stub
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; 12: Stack Fault Exception (With Error Code!)
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isr12:
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cli
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push byte 12
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jmp isr_common_stub
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; 13: General Protection Fault Exception (With Error Code!)
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isr13:
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cli
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push byte 13
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jmp isr_common_stub
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; 14: Page Fault Exception (With Error Code!)
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isr14:
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cli
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push byte 14
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jmp isr_common_stub
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; 15: Reserved Exception
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isr15:
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cli
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push byte 0
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push byte 15
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jmp isr_common_stub
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; 16: Floating Point Exception
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isr16:
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cli
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push byte 0
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push byte 16
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jmp isr_common_stub
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; 17: Alignment Check Exception
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isr17:
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cli
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push byte 0
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push byte 17
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jmp isr_common_stub
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; 18: Machine Check Exception
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isr18:
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cli
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push byte 0
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push byte 18
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jmp isr_common_stub
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; 19: Reserved
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isr19:
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cli
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push byte 0
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push byte 19
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jmp isr_common_stub
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; 20: Reserved
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isr20:
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cli
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push byte 0
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push byte 20
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jmp isr_common_stub
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; 21: Reserved
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isr21:
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cli
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push byte 0
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push byte 21
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jmp isr_common_stub
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; 22: Reserved
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isr22:
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cli
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push byte 0
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push byte 22
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jmp isr_common_stub
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; 23: Reserved
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isr23:
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cli
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push byte 0
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push byte 23
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jmp isr_common_stub
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; 24: Reserved
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isr24:
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cli
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push byte 0
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push byte 24
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jmp isr_common_stub
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; 25: Reserved
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isr25:
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cli
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push byte 0
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push byte 25
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jmp isr_common_stub
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; 26: Reserved
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isr26:
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cli
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push byte 0
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push byte 26
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jmp isr_common_stub
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; 27: Reserved
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isr27:
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cli
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push byte 0
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push byte 27
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jmp isr_common_stub
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; 28: Reserved
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isr28:
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cli
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push byte 0
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push byte 28
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jmp isr_common_stub
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; 29: Reserved
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isr29:
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cli
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push byte 0
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push byte 29
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jmp isr_common_stub
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; 30: Reserved
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isr30:
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cli
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push byte 0
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push byte 30
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jmp isr_common_stub
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; 31: Reserved
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isr31:
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cli
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push byte 0
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push byte 31
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jmp isr_common_stub
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; 80: Syscalls
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isr80:
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cli
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push byte 0
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push byte 80
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jmp isr_common_stub
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; IRQ handlers
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irq0:
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cli
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push byte 0
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push byte 32
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jmp irq_common_stub
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irq1:
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cli
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push byte 1
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push byte 33
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jmp irq_common_stub
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irq2:
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cli
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push byte 2
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push byte 34
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jmp irq_common_stub
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irq3:
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cli
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push byte 3
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push byte 35
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jmp irq_common_stub
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irq4:
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cli
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push byte 4
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push byte 36
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jmp irq_common_stub
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irq5:
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cli
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push byte 5
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push byte 37
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jmp irq_common_stub
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irq6:
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cli
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push byte 6
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push byte 38
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jmp irq_common_stub
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irq7:
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cli
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push byte 7
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push byte 39
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jmp irq_common_stub
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irq8:
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cli
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push byte 8
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push byte 40
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jmp irq_common_stub
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irq9:
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cli
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push byte 9
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push byte 41
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jmp irq_common_stub
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irq10:
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cli
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push byte 10
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push byte 42
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jmp irq_common_stub
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irq11:
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cli
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push byte 11
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push byte 43
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jmp irq_common_stub
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irq12:
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cli
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push byte 12
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push byte 44
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jmp irq_common_stub
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irq13:
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cli
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push byte 13
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push byte 45
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jmp irq_common_stub
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irq14:
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cli
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push byte 14
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push byte 46
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jmp irq_common_stub
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irq15:
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cli
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push byte 15
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push byte 47
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jmp irq_common_stub
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181
cpu/i386/isr.c
Normal file
181
cpu/i386/isr.c
Normal file
@ -0,0 +1,181 @@
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#include "isr.h"
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#include "idt.h"
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#include "ports.h"
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#include "../halt.h"
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#include "../drivers/vga.h"
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#include <string.h>
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#include <stdint.h>
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void irq_handler(registers_t r);
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isr_t interrupt_handlers[256];
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/* Can't do this with a loop because we need the address
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* of the function names */
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void isr_install() {
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set_idt_gate(0,(uint32_t)isr0);
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set_idt_gate(1,(uint32_t)isr1);
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set_idt_gate(2,(uint32_t)isr2);
|
||||
set_idt_gate(3,(uint32_t)isr3);
|
||||
set_idt_gate(4,(uint32_t)isr4);
|
||||
set_idt_gate(5,(uint32_t)isr5);
|
||||
set_idt_gate(6,(uint32_t)isr6);
|
||||
set_idt_gate(7,(uint32_t)isr7);
|
||||
set_idt_gate(8,(uint32_t)isr8);
|
||||
set_idt_gate(9,(uint32_t)isr9);
|
||||
set_idt_gate(10,(uint32_t)isr10);
|
||||
set_idt_gate(11,(uint32_t)isr11);
|
||||
set_idt_gate(12,(uint32_t)isr12);
|
||||
set_idt_gate(13,(uint32_t)isr13);
|
||||
set_idt_gate(14,(uint32_t)isr14);
|
||||
set_idt_gate(15,(uint32_t)isr15);
|
||||
set_idt_gate(16,(uint32_t)isr16);
|
||||
set_idt_gate(17,(uint32_t)isr17);
|
||||
set_idt_gate(18,(uint32_t)isr18);
|
||||
set_idt_gate(19,(uint32_t)isr19);
|
||||
set_idt_gate(20,(uint32_t)isr20);
|
||||
set_idt_gate(21,(uint32_t)isr21);
|
||||
set_idt_gate(22,(uint32_t)isr22);
|
||||
set_idt_gate(23,(uint32_t)isr23);
|
||||
set_idt_gate(24,(uint32_t)isr24);
|
||||
set_idt_gate(25,(uint32_t)isr25);
|
||||
set_idt_gate(26,(uint32_t)isr26);
|
||||
set_idt_gate(27,(uint32_t)isr27);
|
||||
set_idt_gate(28,(uint32_t)isr28);
|
||||
set_idt_gate(29,(uint32_t)isr29);
|
||||
set_idt_gate(30,(uint32_t)isr30);
|
||||
set_idt_gate(31,(uint32_t)isr31);
|
||||
set_idt_gate(80,(uint32_t)isr80);
|
||||
// Remap the PIC
|
||||
port_byte_out(0x20,0x11);
|
||||
port_byte_out(0xA0,0x11);
|
||||
port_byte_out(0x21,0x20);
|
||||
port_byte_out(0xA1,0x28);
|
||||
port_byte_out(0x21,0x04);
|
||||
port_byte_out(0xA1,0x02);
|
||||
port_byte_out(0x21,0x01);
|
||||
port_byte_out(0xA1,0x01);
|
||||
port_byte_out(0x21,0x0);
|
||||
port_byte_out(0xA1,0x0);
|
||||
|
||||
// Install the IRQs
|
||||
set_idt_gate(32,(uint32_t)irq0);
|
||||
set_idt_gate(33,(uint32_t)irq1);
|
||||
set_idt_gate(34,(uint32_t)irq2);
|
||||
set_idt_gate(35,(uint32_t)irq3);
|
||||
set_idt_gate(36,(uint32_t)irq4);
|
||||
set_idt_gate(37,(uint32_t)irq5);
|
||||
set_idt_gate(38,(uint32_t)irq6);
|
||||
set_idt_gate(39,(uint32_t)irq7);
|
||||
set_idt_gate(40,(uint32_t)irq8);
|
||||
set_idt_gate(41,(uint32_t)irq9);
|
||||
set_idt_gate(42,(uint32_t)irq10);
|
||||
set_idt_gate(43,(uint32_t)irq11);
|
||||
set_idt_gate(44,(uint32_t)irq12);
|
||||
set_idt_gate(45,(uint32_t)irq13);
|
||||
set_idt_gate(46,(uint32_t)irq14);
|
||||
set_idt_gate(47,(uint32_t)irq15);
|
||||
|
||||
set_idt(); // Load with ASM
|
||||
}
|
||||
|
||||
|
||||
/* To print the message which defines every exception */
|
||||
char *exception_messages[] = {
|
||||
"Division By Zero",
|
||||
"Debug",
|
||||
"Non Maskable Interrupt",
|
||||
"Breakpoint",
|
||||
"Into Detected Overflow",
|
||||
"Out of Bounds",
|
||||
"Invalid Opcode",
|
||||
"No Coprocessor",
|
||||
|
||||
"Double Fault",
|
||||
"Coprocessor Segment Overrun",
|
||||
"Bad TSS",
|
||||
"Segment Not Present",
|
||||
"Stack Fault",
|
||||
"General Protection Fault",
|
||||
"Page Fault",
|
||||
"Unknown Interrupt",
|
||||
|
||||
"Coprocessor Fault",
|
||||
"Alignment Check",
|
||||
"Machine Check",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved",
|
||||
"Reserved"
|
||||
};
|
||||
|
||||
void isr_handler(registers_t r) {
|
||||
switch (r.int_no) {
|
||||
case 14: {
|
||||
uint32_t addr;
|
||||
asm("movl %%cr2,%0": "=r"(addr));
|
||||
vga_write_string("FAULT\n");
|
||||
// if (r.err_code==0) {
|
||||
// klog("PANIC","Kernel process tried to read a non-present page entry at address %x",addr);
|
||||
// } else if (r.err_code==1) {
|
||||
// klog("PANIC","Kernel process tried to read a page and caused a protection fault at address %x",addr);
|
||||
// } else if (r.err_code==2) {
|
||||
// klog("PANIC","Kernel process tried to write to a non-present page entry at address %x",addr);
|
||||
// } else if (r.err_code==3) {
|
||||
// klog("PANIC","Kernel process tried to write a page and caused a protection fault at address %x",addr);
|
||||
// } else if (r.err_code==4) {
|
||||
// klog("PANIC","User process tried to read a non-present page entry at address %x",addr);
|
||||
// } else if (r.err_code==5) {
|
||||
// klog("PANIC","User process tried to read a page and caused a protection fault at address %x",addr);
|
||||
// } else if (r.err_code==6) {
|
||||
// klog("PANIC","User process tried to write to a non-present page entry at address %x",addr);
|
||||
// } else if (r.err_code==7) {
|
||||
// klog("PANIC","User process tried to write a page and caused a protection fault at address %x",addr);
|
||||
// }
|
||||
// if ((r.err_code&1)==0) {
|
||||
// // int dir_entry=(addr&0xFFC00000)>>22;
|
||||
// // int table_entry=(addr&0x3FF000)>12;
|
||||
// // if (dir_entry_present(dir_entry)) {
|
||||
// // set_table_entry(dir_entry,table_entry,((dir_entry*1024)+table_entry)*0x1000,1,1,1);
|
||||
// // for(int page=0;page<1024;page++) {
|
||||
// // asm volatile("invlpg (%0)"::"r"(((dir_entry*1024)+page)*0x1000):"memory");
|
||||
// // }
|
||||
// // } else {
|
||||
// // for(int page=0;page<1024;page++) {
|
||||
// // set_table_entry(dir_entry,page,0x0,1,1,0);
|
||||
// // }
|
||||
// // set_table_entry(dir_entry,table_entry,((dir_entry*1024)+table_entry)*0x1000,1,1,1);
|
||||
// // set_directory_entry(dir_entry,dir_entry,1,1,1);
|
||||
// // }
|
||||
// // return;
|
||||
// }
|
||||
halt();
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void register_interrupt_handler(uint8_t n,isr_t handler) {
|
||||
interrupt_handlers[n] = handler;
|
||||
}
|
||||
|
||||
void irq_handler(registers_t r) {
|
||||
/* After every interrupt we need to send an EOI to the PICs
|
||||
* or they will not send another interrupt again */
|
||||
if (r.int_no >= 40) port_byte_out(0xA0,0x20); /* slave */
|
||||
port_byte_out(0x20,0x20); /* master */
|
||||
/* Handle the interrupt in a more modular way */
|
||||
if (interrupt_handlers[r.int_no] != 0) {
|
||||
isr_t handler = interrupt_handlers[r.int_no];
|
||||
handler(r);
|
||||
}
|
||||
}
|
||||
89
cpu/i386/isr.h
Normal file
89
cpu/i386/isr.h
Normal file
@ -0,0 +1,89 @@
|
||||
#ifndef ISR_H
|
||||
#define ISR_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* ISRs reserved for CPU exceptions */
|
||||
extern void isr0();
|
||||
extern void isr1();
|
||||
extern void isr2();
|
||||
extern void isr3();
|
||||
extern void isr4();
|
||||
extern void isr5();
|
||||
extern void isr6();
|
||||
extern void isr7();
|
||||
extern void isr8();
|
||||
extern void isr9();
|
||||
extern void isr10();
|
||||
extern void isr11();
|
||||
extern void isr12();
|
||||
extern void isr13();
|
||||
extern void isr14();
|
||||
extern void isr15();
|
||||
extern void isr16();
|
||||
extern void isr17();
|
||||
extern void isr18();
|
||||
extern void isr19();
|
||||
extern void isr20();
|
||||
extern void isr21();
|
||||
extern void isr22();
|
||||
extern void isr23();
|
||||
extern void isr24();
|
||||
extern void isr25();
|
||||
extern void isr26();
|
||||
extern void isr27();
|
||||
extern void isr28();
|
||||
extern void isr29();
|
||||
extern void isr30();
|
||||
extern void isr31();
|
||||
extern void isr80();
|
||||
/* IRQ definitions */
|
||||
extern void irq0();
|
||||
extern void irq1();
|
||||
extern void irq2();
|
||||
extern void irq3();
|
||||
extern void irq4();
|
||||
extern void irq5();
|
||||
extern void irq6();
|
||||
extern void irq7();
|
||||
extern void irq8();
|
||||
extern void irq9();
|
||||
extern void irq10();
|
||||
extern void irq11();
|
||||
extern void irq12();
|
||||
extern void irq13();
|
||||
extern void irq14();
|
||||
extern void irq15();
|
||||
|
||||
#define IRQ0 32
|
||||
#define IRQ1 33
|
||||
#define IRQ2 34
|
||||
#define IRQ3 35
|
||||
#define IRQ4 36
|
||||
#define IRQ5 37
|
||||
#define IRQ6 38
|
||||
#define IRQ7 39
|
||||
#define IRQ8 40
|
||||
#define IRQ9 41
|
||||
#define IRQ10 42
|
||||
#define IRQ11 43
|
||||
#define IRQ12 44
|
||||
#define IRQ13 45
|
||||
#define IRQ14 46
|
||||
#define IRQ15 47
|
||||
|
||||
/* Struct which aggregates many registers */
|
||||
typedef struct {
|
||||
uint32_t ds; /* Data segment selector */
|
||||
uint32_t edi,esi,ebp,esp,ebx,edx,ecx,eax; /* Pushed by pusha. */
|
||||
uint32_t int_no,err_code; /* Interrupt number and error code (if applicable) */
|
||||
uint32_t eip,cs,eflags,useresp,ss; /* Pushed by the processor automatically */
|
||||
} registers_t;
|
||||
|
||||
void isr_install();
|
||||
void isr_handler(registers_t r);
|
||||
|
||||
typedef void (*isr_t)(registers_t);
|
||||
void register_interrupt_handler(uint8_t n,isr_t handler);
|
||||
|
||||
#endif
|
||||
11
cpu/i386/seg_upd.asm
Normal file
11
cpu/i386/seg_upd.asm
Normal file
@ -0,0 +1,11 @@
|
||||
global seg_upd
|
||||
seg_upd:
|
||||
jmp 0x8:code_upd
|
||||
code_upd:
|
||||
mov ax, 0x10
|
||||
mov ds, ax
|
||||
mov ss, ax
|
||||
mov es, ax
|
||||
mov fs, ax
|
||||
mov gs, ax
|
||||
ret
|
||||
6
cpu/i386/seg_upd.h
Normal file
6
cpu/i386/seg_upd.h
Normal file
@ -0,0 +1,6 @@
|
||||
#ifndef SEG_UPD_H
|
||||
#define SEG_UPD_H
|
||||
|
||||
void seg_upd();
|
||||
|
||||
#endif
|
||||
@ -17,4 +17,23 @@ void kmain(multiboot_info_t* header) {
|
||||
info.height=25;
|
||||
}
|
||||
vga_init(info);
|
||||
vga_write_string("Hello\n");
|
||||
asm volatile(" \
|
||||
cli; \
|
||||
mov $0x23, %ax; \
|
||||
mov %ax, %ds; \
|
||||
mov %ax, %es; \
|
||||
mov %ax, %fs; \
|
||||
mov %ax, %gs; \
|
||||
\
|
||||
mov %esp, %eax; \
|
||||
pushl $0x23; \
|
||||
pushl %eax; \
|
||||
pushf; \
|
||||
pushl $0x1B; \
|
||||
push $1f; \
|
||||
iret; \
|
||||
1: \
|
||||
");
|
||||
vga_write_string("UMODE!");
|
||||
}
|
||||
|
||||
@ -1,2 +1,4 @@
|
||||
cpu/i386/interrupt.o
|
||||
cpu/i386/paging_helpers.o
|
||||
cpu/i386/seg_upd.o
|
||||
kernel/boot.o
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user