Work, but TSS loading broken.
This commit is contained in:
pjht
parent
0fd6a3e0d3
commit
ae5b1ad448
34
32bit-gdt.asm
Normal file
34
32bit-gdt.asm
Normal file
@ -0,0 +1,34 @@
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gdt_start: ; don't remove the labels, they're needed to compute sizes and jumps
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; the GDT starts with a null 8-byte
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dd 0x0 ; 4 byte
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dd 0x0 ; 4 byte
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; GDT for code segment. base = 0x00000000, length = 0xfffff
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; for flags, refer to os-dev.pdf document, page 36
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gdt_code:
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dw 0x0000 ; segment length, bits 0-15
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dw 0x0 ; segment base, bits 0-15
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db 0x0 ; segment base, bits 16-23
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db 10011010b ; flags (8 bits)
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db 11000001b ; flags (4 bits) + segment length, bits 16-19
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db 0x0 ; segment base, bits 24-31
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; GDT for data segment. base and length identical to code segment
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; some flags changed, again, refer to os-dev.pdf
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gdt_data:
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dw 0x0000
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dw 0x0
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db 0x0
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db 10010010b
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db 11000001b
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gdt_end:
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; GDT descriptor
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gdt_descriptor:
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dw gdt_end - gdt_start - 1 ; size (16 bit), always one less of its true size
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dd gdt_start ; address (32 bit)
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; define some constants for later use
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CODE_SEG equ gdt_code - gdt_start
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DATA_SEG equ gdt_data - gdt_start
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2
Makefile
2
Makefile
@ -39,5 +39,5 @@ debug: os-image.bin kernel.elf
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nasm $< -f bin -o $@
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clean:
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rm -rf *.bin *.dis *.o os-image.bin *.elf
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rm -rf *.bin *.dis *.o os-image.bin *.elf boot/boot.bin
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rm -rf */*.o
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249
bochsout.txt
Normal file
249
bochsout.txt
Normal file
@ -0,0 +1,249 @@
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00000000000i[ ] Bochs x86 Emulator 2.6.9
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00000000000i[ ] Built from SVN snapshot on April 9, 2017
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00000000000i[ ] Compiled on May 2 2018 at 13:26:32
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00000000000i[ ] System configuration
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00000000000i[ ] processors: 1 (cores=1, HT threads=1)
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00000000000i[ ] A20 line support: yes
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00000000000i[ ] IPS is set to 4000000
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00000000000i[ ] CPU configuration
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00000000000i[ ] SMP support: yes, quantum=16
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00000000000i[ ] level: 6
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00000000000i[ ] APIC support: xapic
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00000000000i[ ] FPU support: yes
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00000000000i[ ] MMX support: yes
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00000000000i[ ] 3dnow! support: no
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00000000000i[ ] SEP support: yes
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00000000000i[ ] SIMD support: sse2
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00000000000i[ ] XSAVE support: no
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00000000000i[ ] AES support: no
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00000000000i[ ] SHA support: no
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00000000000i[ ] MOVBE support: no
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00000000000i[ ] ADX support: no
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00000000000i[ ] x86-64 support: yes
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00000000000i[ ] 1G paging support: no
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00000000000i[ ] MWAIT support: yes
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00000000000i[ ] VMX support: 1
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00000000000i[ ] Optimization configuration
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00000000000i[ ] RepeatSpeedups support: yes
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00000000000i[ ] Fast function calls: yes
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00000000000i[ ] Handlers Chaining speedups: no
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00000000000i[ ] Devices configuration
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00000000000i[ ] PCI support: i440FX i430FX
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00000000000i[ ] Networking: no
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00000000000i[ ] Sound support: no
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00000000000i[ ] USB support: UHCI
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00000000000i[ ] VGA extension support: vbe cirrus
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00000000000i[MEM0 ] allocated memory at 0x10a780000. after alignment, vector=0x10a780000
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00000000000i[MEM0 ] 32.00MB
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00000000000i[MEM0 ] mem block size = 0x00020000, blocks=256
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00000000000i[MEM0 ] rom at 0xfffe0000/131072 ('/usr/local/Cellar/bochs/2.6.9_2/share/bochs/BIOS-bochs-latest')
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00000000000i[ ] lt_dlhandle is 0x7fa5fec76d60
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00000000000i[PLUGIN] loaded plugin libbx_hdimage.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fef32320
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00000000000i[PLUGIN] loaded plugin libbx_pci.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec77050
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00000000000i[PLUGIN] loaded plugin libbx_pci2isa.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec77450
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00000000000i[PLUGIN] loaded plugin libbx_usb_uhci.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fef33ad0
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00000000000i[PLUGIN] loaded plugin libbx_acpi.so
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00000000000i[ ] lt_dlhandle is 0x7fa60106e670
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00000000000i[PLUGIN] loaded plugin libbx_cmos.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec77dc0
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00000000000i[PLUGIN] loaded plugin libbx_dma.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec78370
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00000000000i[PLUGIN] loaded plugin libbx_pic.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec78530
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00000000000i[PLUGIN] loaded plugin libbx_pit.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec78920
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00000000000i[PLUGIN] loaded plugin libbx_vga.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fed37690
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00000000000i[PLUGIN] loaded plugin libbx_floppy.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fed37c80
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00000000000i[PLUGIN] loaded plugin libbx_ioapic.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec78db0
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00000000000i[PLUGIN] loaded plugin libbx_keyboard.so
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00000000000i[ ] lt_dlhandle is 0x7fa60106ef50
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00000000000i[PLUGIN] loaded plugin libbx_harddrv.so
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00000000000i[ ] lt_dlhandle is 0x7fa5fec79570
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00000000000i[PLUGIN] loaded plugin libbx_pci_ide.so
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00000000000i[PLUGIN] init_dev of 'pci' plugin device by virtual method
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00000000000i[DEV ] i440FX PMC present at device 0, function 0
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00000000000i[PLUGIN] init_dev of 'pci2isa' plugin device by virtual method
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00000000000i[DEV ] PIIX3 PCI-to-ISA bridge present at device 1, function 0
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00000000000i[PLUGIN] init_dev of 'cmos' plugin device by virtual method
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00000000000i[CMOS ] Using local time for initial clock
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00000000000i[CMOS ] Setting initial clock to: Sat Oct 20 11:17:35 2018 (time0=1540052255)
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00000000000i[PLUGIN] init_dev of 'dma' plugin device by virtual method
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00000000000i[DMA ] channel 4 used by cascade
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00000000000i[PLUGIN] init_dev of 'pic' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'pit' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'vga' plugin device by virtual method
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00000000000i[MEM0 ] Register memory access handlers: 0x0000000a0000 - 0x0000000bffff
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00000000000i[VGA ] interval=200000, mode=realtime
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00000000000i[MEM0 ] Register memory access handlers: 0x0000e0000000 - 0x0000e0ffffff
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00000000000i[BXVGA ] VBE Bochs Display Extension Enabled
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00000000000i[MEM0 ] rom at 0xc0000/41472 ('/usr/local/Cellar/bochs/2.6.9_2/share/bochs/VGABIOS-lgpl-latest')
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00000000000i[PLUGIN] init_dev of 'floppy' plugin device by virtual method
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00000000000i[DMA ] channel 2 used by Floppy Drive
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00000000000i[FLOPPY] fd0: 'os-image.bin' ro=0, h=2,t=80,spt=18
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00000000000i[FLOPPY] Using boot sequence floppy, none, none
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00000000000i[FLOPPY] Floppy boot signature check is enabled
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00000000000i[PLUGIN] init_dev of 'acpi' plugin device by virtual method
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00000000000i[DEV ] ACPI Controller present at device 1, function 3
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00000000000i[PLUGIN] init_dev of 'ioapic' plugin device by virtual method
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00000000000i[IOAPIC] initializing I/O APIC
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00000000000i[MEM0 ] Register memory access handlers: 0x0000fec00000 - 0x0000fec00fff
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00000000000i[IOAPIC] IOAPIC enabled (base address = 0xfec00000)
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00000000000i[PLUGIN] init_dev of 'keyboard' plugin device by virtual method
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00000000000i[KBD ] will paste characters every 400 keyboard ticks
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00000000000i[PLUGIN] init_dev of 'harddrv' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'pci_ide' plugin device by virtual method
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00000000000i[DEV ] PIIX3 PCI IDE controller present at device 1, function 1
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00000000000i[PLUGIN] init_dev of 'unmapped' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'biosdev' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'speaker' plugin device by virtual method
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00000000000i[PCSPK ] Forwarding beep to gui
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00000000000i[PLUGIN] init_dev of 'extfpuirq' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'parallel' plugin device by virtual method
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00000000000i[PAR ] parallel port 1 at 0x0378 irq 7
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00000000000i[PLUGIN] init_dev of 'serial' plugin device by virtual method
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00000000000i[SER ] com1 at 0x03f8 irq 4 (mode: null)
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00000000000i[PLUGIN] init_dev of 'iodebug' plugin device by virtual method
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00000000000i[PLUGIN] init_dev of 'usb_uhci' plugin device by virtual method
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00000000000i[DEV ] USB UHCI present at device 1, function 2
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00000000000i[UHCI ] USB UHCI initialized
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00000000000i[PLUGIN] register state of 'pci' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'pci2isa' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'cmos' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'dma' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'pic' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'pit' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'vga' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'floppy' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'unmapped' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'biosdev' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'speaker' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'extfpuirq' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'parallel' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'serial' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'iodebug' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'usb_uhci' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'acpi' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'ioapic' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'keyboard' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'harddrv' plugin device by virtual method
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00000000000i[PLUGIN] register state of 'pci_ide' plugin device by virtual method
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00000000000i[SYS ] bx_pc_system_c::Reset(HARDWARE) called
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00000000000i[CPU0 ] cpu hardware reset
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00000000000i[APIC0 ] allocate APIC id=0 (MMIO enabled) to 0x0000fee00000
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00000000000i[CPU0 ] CPU[0] is the bootstrap processor
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00000000000i[CPU0 ] CPUID[0x00000000]: 00000005 756e6547 6c65746e 49656e69
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00000000000i[CPU0 ] CPUID[0x00000001]: 00000633 00010800 00002028 1fcbfbff
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00000000000i[CPU0 ] CPUID[0x00000002]: 00410601 00000000 00000000 00000000
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00000000000i[CPU0 ] CPUID[0x00000003]: 00000000 00000000 00000000 00000000
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00000000000i[CPU0 ] CPUID[0x00000004]: 00000000 00000000 00000000 00000000
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00000000000i[CPU0 ] CPUID[0x00000005]: 00000040 00000040 00000003 00000020
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00000000000i[CPU0 ] CPUID[0x80000000]: 80000008 00000000 00000000 00000000
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00000000000i[CPU0 ] CPUID[0x80000001]: 00000000 00000000 00000101 2a100000
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00000000000i[CPU0 ] CPUID[0x80000002]: 20202020 20202020 20202020 6e492020
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00000000000i[CPU0 ] CPUID[0x80000003]: 286c6574 50202952 69746e65 52286d75
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00000000000i[CPU0 ] CPUID[0x80000004]: 20342029 20555043 20202020 00202020
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00000000000i[CPU0 ] CPUID[0x80000005]: 01ff01ff 01ff01ff 40020140 40020140
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00000000000i[CPU0 ] CPUID[0x80000006]: 00000000 42004200 02008140 00000000
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00000000000i[CPU0 ] CPUID[0x80000007]: 00000000 00000000 00000000 00000000
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00000000000i[CPU0 ] CPUID[0x80000008]: 00003028 00000000 00000000 00000000
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00000000000i[PLUGIN] reset of 'pci' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'pci2isa' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'cmos' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'dma' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'pic' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'pit' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'vga' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'floppy' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'acpi' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'ioapic' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'keyboard' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'harddrv' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'pci_ide' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'unmapped' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'biosdev' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'speaker' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'extfpuirq' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'parallel' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'serial' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'iodebug' plugin device by virtual method
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00000000000i[PLUGIN] reset of 'usb_uhci' plugin device by virtual method
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00000000000i[ ] set SIGINT handler to bx_debug_ctrlc_handler
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00000004662i[BIOS ] $Revision: 13073 $ $Date: 2017-02-16 22:43:52 +0100 (Do, 16. Feb 2017) $
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00000318050i[KBD ] reset-disable command received
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00000320819i[BIOS ] Starting rombios32
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00000321257i[BIOS ] Shutdown flag 0
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00000321840i[BIOS ] ram_size=0x02000000
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00000322261i[BIOS ] ram_end=32MB
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00000362829i[BIOS ] Found 1 cpu(s)
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00000376413i[BIOS ] bios_table_addr: 0x000f9cd8 end=0x000fcc00
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00000704208i[PCI ] i440FX PMC write to PAM register 59 (TLB Flush)
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00001032137i[P2ISA ] PCI IRQ routing: PIRQA# set to 0x0b
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00001032156i[P2ISA ] PCI IRQ routing: PIRQB# set to 0x09
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00001032175i[P2ISA ] PCI IRQ routing: PIRQC# set to 0x0b
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00001032194i[P2ISA ] PCI IRQ routing: PIRQD# set to 0x09
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00001032204i[P2ISA ] write: ELCR2 = 0x0a
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00001032974i[BIOS ] PIIX3/PIIX4 init: elcr=00 0a
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00001040697i[BIOS ] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 class=0x0600
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00001042976i[BIOS ] PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 class=0x0601
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00001045094i[BIOS ] PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 class=0x0101
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00001045323i[PIDE ] new BM-DMA address: 0xc000
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00001045939i[BIOS ] region 4: 0x0000c000
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00001047953i[BIOS ] PCI: bus=0 devfn=0x0a: vendor_id=0x8086 device_id=0x7020 class=0x0c03
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00001048157i[UHCI ] new base address: 0xc020
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00001048773i[BIOS ] region 4: 0x0000c020
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00001048901i[UHCI ] new irq line = 9
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00001050796i[BIOS ] PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 class=0x0680
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00001051028i[ACPI ] new irq line = 11
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00001051040i[ACPI ] new irq line = 9
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00001051065i[ACPI ] new PM base address: 0xb000
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00001051079i[ACPI ] new SM base address: 0xb100
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00001051107i[PCI ] setting SMRAM control register to 0x4a
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00001215200i[CPU0 ] Enter to System Management Mode
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00001215200i[CPU0 ] enter_system_management_mode: temporary disable VMX while in SMM mode
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00001215210i[CPU0 ] RSM: Resuming from System Management Mode
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00001379231i[PCI ] setting SMRAM control register to 0x0a
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00001394138i[BIOS ] MP table addr=0x000f9db0 MPC table addr=0x000f9ce0 size=0xc8
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00001395960i[BIOS ] SMBIOS table addr=0x000f9dc0
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00001398141i[BIOS ] ACPI tables: RSDP addr=0x000f9ee0 ACPI DATA addr=0x01ff0000 size=0xf72
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00001401353i[BIOS ] Firmware waking vector 0x1ff00cc
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00001403148i[PCI ] i440FX PMC write to PAM register 59 (TLB Flush)
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00001403871i[BIOS ] bios_table_cur_addr: 0x000f9f04
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00001531488i[VBIOS ] VGABios $Id: vgabios.c,v 1.76 2013/02/10 08:07:03 vruppert Exp $
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00001531559i[BXVGA ] VBE known Display Interface b0c0
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00001531591i[BXVGA ] VBE known Display Interface b0c5
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00001534516i[VBIOS ] VBE Bios $Id: vbe.c,v 1.65 2014/07/08 18:02:25 vruppert Exp $
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00014040189i[BIOS ] Booting from 0000:7c00
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00014771579i[FLOPPY] partial read() on floppy image returns 128/512
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00014816023i[FLOPPY] read() on floppy image returns 0
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00014860467i[FLOPPY] read() on floppy image returns 0
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00014904911i[FLOPPY] read() on floppy image returns 0
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00015045640e[CPU0 ] fetch_raw_descriptor: GDT: index (2f) 5 > limit (27)
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00015051260i[CPU0 ] WARNING: HLT instruction with IF=0!
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00482728000i[ ] Ctrl-C detected in signal handler.
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00482728001i[ ] dbg: Quit
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00482728001i[CPU0 ] CPU is in protected mode (halted)
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00482728001i[CPU0 ] CS.mode = 32 bit
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00482728001i[CPU0 ] SS.mode = 32 bit
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00482728001i[CPU0 ] EFER = 0x00000000
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00482728001i[CPU0 ] | EAX=00002000 EBX=00001000 ECX=00000000 EDX=000000a0
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00482728001i[CPU0 ] | ESP=0008ff78 EBP=0008ff90 ESI=000e0000 EDI=0000ffac
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00482728001i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df if tf sf zf af PF cf
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00482728001i[CPU0 ] | SEG sltr(index|ti|rpl) base limit G D
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00482728001i[CPU0 ] | CS:0008( 0001| 0| 0) 00000000 ffffffff 1 1
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00482728001i[CPU0 ] | DS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
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00482728001i[CPU0 ] | SS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
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00482728001i[CPU0 ] | ES:0010( 0002| 0| 0) 00000000 ffffffff 1 1
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00482728001i[CPU0 ] | FS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
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00482728001i[CPU0 ] | GS:0010( 0002| 0| 0) 00000000 ffffffff 1 1
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00482728001i[CPU0 ] | EIP=000019d4 (000019d4)
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00482728001i[CPU0 ] | CR0=0x60000011 CR2=0x00000000
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00482728001i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
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00482728001i[CMOS ] Last time is 1540052375 (Sat Oct 20 11:19:35 2018)
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00482728001i[SIM ] quit_sim called with exit code 0
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@ -40,7 +40,7 @@ private_colormap: enabled=0
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||||
clock: sync=none, time0=local, rtc_sync=0
|
||||
# no cmosimage
|
||||
# no loader
|
||||
log: -
|
||||
log: bochsout.txt
|
||||
logprefix: %t%e%d
|
||||
debug: action=ignore
|
||||
info: action=report
|
||||
|
||||
@ -3,43 +3,23 @@ gdt_start: ; don't remove the labels, they're needed to compute sizes and jumps
|
||||
dd 0x0 ; 4 byte
|
||||
dd 0x0 ; 4 byte
|
||||
|
||||
; GDT for kernel code segment. base = 0x00000000, length = 0xfffff
|
||||
; GDT for code segment. base = 0x00000000, length = 0xfffff
|
||||
; for flags, refer to os-dev.pdf document, page 36
|
||||
gdt_kern_code:
|
||||
dw 0x0000 ; segment length, bits 0-15
|
||||
dw 0x0 ; segment base, bits 0-15
|
||||
db 0x0 ; segment base, bits 16-23
|
||||
db 10011010b ; flags (8 bits)
|
||||
db 11000001b ; flags (4 bits) + segment length, bits 16-19
|
||||
db 0x0 ; segment base, bits 24-31
|
||||
|
||||
; GDT for kernel data segment. base and length identical to code segment
|
||||
; some flags changed, again, refer to os-dev.pdf
|
||||
gdt_kern_data:
|
||||
dw 0x0000
|
||||
dw 0x0
|
||||
db 0x0
|
||||
db 10010010b
|
||||
db 11000001b
|
||||
db 0x0
|
||||
|
||||
; GDT for user code segment. base = 0x01000000, length = 0xfffff
|
||||
; for flags, refer to os-dev.pdf document, page 36
|
||||
gdt_usr_code:
|
||||
gdt_code:
|
||||
dw 0xffff ; segment length, bits 0-15
|
||||
dw 0x0 ; segment base, bits 0-15
|
||||
db 0x0 ; segment base, bits 16-23
|
||||
db 11111010b ; flags (8 bits)
|
||||
db 10011010b ; flags (8 bits)
|
||||
db 11001111b ; flags (4 bits) + segment length, bits 16-19
|
||||
db 0x0 ; segment base, bits 24-31
|
||||
|
||||
; GDT for user data segment. base and length identical to code segment
|
||||
; GDT for data segment. base and length identical to code segment
|
||||
; some flags changed, again, refer to os-dev.pdf
|
||||
gdt_usr_data:
|
||||
gdt_data:
|
||||
dw 0xffff
|
||||
dw 0x0
|
||||
db 0x0
|
||||
db 11110010b
|
||||
db 10010010b
|
||||
db 11001111b
|
||||
db 0x0
|
||||
|
||||
@ -51,7 +31,5 @@ gdt_descriptor:
|
||||
dd gdt_start ; address (32 bit)
|
||||
|
||||
; define some constants for later use
|
||||
CODE_SEG equ gdt_kern_code - gdt_start
|
||||
DATA_SEG equ gdt_kern_data - gdt_start
|
||||
USR_CODE_SEG equ gdt_usr_code - gdt_start
|
||||
USR_DATA_SEG equ gdt_usr_data - gdt_start
|
||||
CODE_SEG equ gdt_code - gdt_start
|
||||
DATA_SEG equ gdt_data - gdt_start
|
||||
|
||||
@ -30,7 +30,7 @@ load_kernel:
|
||||
[bits 32]
|
||||
BEGIN_PM:
|
||||
call KERNEL_OFFSET ; Give control to the kernel
|
||||
jmp $ ; Stay here when the kernel returns control to us (if ever)
|
||||
jmp $
|
||||
|
||||
|
||||
BOOT_DRIVE db 0 ; It is a good idea to store it in memory because 'dl' may get overwritten
|
||||
|
||||
69
drivers/gdt.c
Normal file
69
drivers/gdt.c
Normal file
@ -0,0 +1,69 @@
|
||||
//
|
||||
// descriptor_tables.c - Initialises the GDT and IDT, and defines the
|
||||
// default ISR and IRQ handler.
|
||||
// Based on code from Bran's kernel development tutorials.
|
||||
// Rewritten for JamesM's kernel development tutorials.
|
||||
//
|
||||
|
||||
#include "gdt.h"
|
||||
#include <stdint.h>
|
||||
|
||||
static void gdt_set_gate(int32_t num,uint32_t base,uint32_t limit,uint8_t access,uint8_t gran);
|
||||
static void write_tss(int32_t num, uint16_t ss0, uint32_t esp0);
|
||||
|
||||
gdt_entry_t gdt_entries[6];
|
||||
gdt_ptr_t gdt_ptr;
|
||||
tss_entry_t tss_entry;
|
||||
|
||||
void init_gdt() {
|
||||
gdt_ptr.limit=(sizeof(gdt_entry_t)*5)-1;
|
||||
gdt_ptr.base =(uint32_t)&gdt_entries;
|
||||
|
||||
gdt_set_gate(0, 0, 0, 0, 0); // Null segment
|
||||
gdt_set_gate(1, 0, 0xFFFFFFFF, 0x9A, 0xCF); // Code segment
|
||||
gdt_set_gate(2, 0, 0xFFFFFFFF, 0x92, 0xCF); // Data segment
|
||||
gdt_set_gate(3, 0, 0xFFFFFFFF, 0xFA, 0xCF); // User mode code segment
|
||||
gdt_set_gate(4, 0, 0xFFFFFFFF, 0xF2, 0xCF); // User mode data segment
|
||||
write_tss(5, 0x10, 0x80000);
|
||||
asm volatile("lgdt (%%eax)"::"a"((uint32_t)&gdt_ptr));
|
||||
asm volatile("mov $0x2B, %ax; \
|
||||
ltr %ax; \
|
||||
");
|
||||
}
|
||||
|
||||
static void gdt_set_gate(int32_t num,uint32_t base,uint32_t limit,uint8_t access,uint8_t gran) {
|
||||
gdt_entries[num].base_low=(base&0xFFFF);
|
||||
gdt_entries[num].base_middle=(base>>16)&0xFF;
|
||||
gdt_entries[num].base_high=(base>>24)&0xFF;
|
||||
gdt_entries[num].limit_low =(limit&0xFFFF);
|
||||
gdt_entries[num].granularity=(limit>>16)&0x0F;
|
||||
gdt_entries[num].granularity|=gran & 0xF0;
|
||||
gdt_entries[num].access=access;
|
||||
}
|
||||
|
||||
static void write_tss(int32_t num, uint16_t ss0, uint32_t esp0) {
|
||||
// Firstly, let's compute the base and limit of our entry into the GDT.
|
||||
uint32_t base = (uint32_t) &tss_entry;
|
||||
uint32_t limit = base + sizeof(tss_entry);
|
||||
|
||||
// Now, add our TSS descriptor's address to the GDT.
|
||||
gdt_set_gate(num, base, limit, 0xE9, 0x00);
|
||||
|
||||
// Ensure the descriptor is initially zero.
|
||||
memory_set(&tss_entry, 0, sizeof(tss_entry));
|
||||
tss_entry.ss0 = ss0; // Set the kernel stack segment.
|
||||
tss_entry.esp0 = esp0; // Set the kernel stack pointer.
|
||||
|
||||
// Here we set the cs, ss, ds, es, fs and gs entries in the TSS. These specify what
|
||||
// segments should be loaded when the processor switches to kernel mode. Therefore
|
||||
// they are just our normal kernel code/data segments - 0x08 and 0x10 respectively,
|
||||
// but with the last two bits set, making 0x0b and 0x13. The setting of these bits
|
||||
// sets the RPL (requested privilege level) to 3, meaning that this TSS can be used
|
||||
// to switch to kernel mode from ring 3.
|
||||
tss_entry.cs = 0x0b;
|
||||
tss_entry.ss = tss_entry.ds = tss_entry.es = tss_entry.fs = tss_entry.gs = 0x13;
|
||||
}
|
||||
|
||||
void set_kernel_stack(uint32_t stack) {
|
||||
tss_entry.esp0 = stack;
|
||||
}
|
||||
61
drivers/gdt.h
Normal file
61
drivers/gdt.h
Normal file
@ -0,0 +1,61 @@
|
||||
#ifndef GDT_H
|
||||
#define GDT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
struct gdt_entry_struct
|
||||
{
|
||||
uint16_t limit_low;
|
||||
uint16_t base_low;
|
||||
uint8_t base_middle;
|
||||
uint8_t access;
|
||||
uint8_t granularity;
|
||||
uint8_t base_high;
|
||||
|
||||
} __attribute__((packed));
|
||||
typedef struct gdt_entry_struct gdt_entry_t;
|
||||
|
||||
struct gdt_ptr_struct {
|
||||
uint16_t limit;
|
||||
uint32_t base;
|
||||
} __attribute__((packed));
|
||||
typedef struct gdt_ptr_struct gdt_ptr_t;
|
||||
|
||||
// A struct describing a Task State Segment.
|
||||
struct tss_entry_struct {
|
||||
uint32_t prev_tss; // The previous TSS - if we used hardware task switching this would form a linked list.
|
||||
uint32_t esp0; // The stack pointer to load when we change to kernel mode.
|
||||
uint32_t ss0; // The stack segment to load when we change to kernel mode.
|
||||
uint32_t esp1; // Unused...
|
||||
uint32_t ss1;
|
||||
uint32_t esp2;
|
||||
uint32_t ss2;
|
||||
uint32_t cr3;
|
||||
uint32_t eip;
|
||||
uint32_t eflags;
|
||||
uint32_t eax;
|
||||
uint32_t ecx;
|
||||
uint32_t edx;
|
||||
uint32_t ebx;
|
||||
uint32_t esp;
|
||||
uint32_t ebp;
|
||||
uint32_t esi;
|
||||
uint32_t edi;
|
||||
uint32_t es; // The value to load into ES when we change to kernel mode.
|
||||
uint32_t cs; // The value to load into CS when we change to kernel mode.
|
||||
uint32_t ss; // The value to load into SS when we change to kernel mode.
|
||||
uint32_t ds; // The value to load into DS when we change to kernel mode.
|
||||
uint32_t fs; // The value to load into FS when we change to kernel mode.
|
||||
uint32_t gs; // The value to load into GS when we change to kernel mode.
|
||||
uint32_t ldt; // Unused...
|
||||
uint16_t trap;
|
||||
uint16_t iomap_base;
|
||||
} __attribute__((packed));
|
||||
|
||||
typedef struct tss_entry_struct tss_entry_t;
|
||||
|
||||
|
||||
void init_gdt();
|
||||
void set_kernel_stack(uint32_t stack);
|
||||
|
||||
#endif
|
||||
@ -1,12 +1,14 @@
|
||||
#include "../drivers/vga.h"
|
||||
#include "../drivers/isr.h"
|
||||
#include "../drivers/idt.h"
|
||||
#include "../drivers/gdt.h"
|
||||
/*
|
||||
pop %eax; \
|
||||
or $0x200,%eax; \
|
||||
push %eax; \
|
||||
*/
|
||||
void switch_to_user_mode() {
|
||||
// set_kernel_stack(0x80000);
|
||||
// Set up a stack structure for switching to user mode.
|
||||
asm volatile(" \
|
||||
cli; \
|
||||
@ -15,6 +17,7 @@ void switch_to_user_mode() {
|
||||
mov %ax, %es; \
|
||||
mov %ax, %fs; \
|
||||
mov %ax, %gs; \
|
||||
\
|
||||
mov %esp, %eax; \
|
||||
pushl $0x23; \
|
||||
pushl %eax; \
|
||||
@ -33,5 +36,8 @@ void main() {
|
||||
isr_install();
|
||||
asm volatile("sti");
|
||||
write_string("Setup interrupts\n");
|
||||
init_gdt();
|
||||
write_string("Setup new GDT\n");
|
||||
switch_to_user_mode();
|
||||
write_string("User mode!\n");
|
||||
}
|
||||
|
||||
@ -4,3 +4,8 @@ void memory_copy(char *source,char *dest,int nbytes) {
|
||||
*(dest+i)=*(source+i);
|
||||
}
|
||||
}
|
||||
|
||||
void memory_set(char *dest, char val, int len) {
|
||||
char *temp = (char *)dest;
|
||||
for ( ; len != 0; len--) *temp++ = val;
|
||||
}
|
||||
|
||||
@ -2,5 +2,6 @@
|
||||
#define MEMORY_H
|
||||
|
||||
void memory_copy(char *source,char *dest,int nbytes);
|
||||
void memory_set(char *dest,char val,int len);
|
||||
|
||||
#endif
|
||||
|
||||
35
new-gdt.asm
Normal file
35
new-gdt.asm
Normal file
@ -0,0 +1,35 @@
|
||||
gdt_start: ; don't remove the labels, they're needed to compute sizes and jumps
|
||||
; the GDT starts with a null 8-byte
|
||||
dd 0x0 ; 4 byte
|
||||
dd 0x0 ; 4 byte
|
||||
|
||||
; GDT for code segment. base = 0x00000000, length = 0xfffff
|
||||
; for flags, refer to os-dev.pdf document, page 36
|
||||
gdt_code:
|
||||
dw 0xffff ; segment length, bits 0-15
|
||||
dw 0x0 ; segment base, bits 0-15
|
||||
db 0x0 ; segment base, bits 16-23
|
||||
db 10011010b ; flags (8 bits)
|
||||
db 11001111b ; flags (4 bits) + segment length, bits 16-19
|
||||
db 0x0 ; segment base, bits 24-31
|
||||
|
||||
; GDT for data segment. base and length identical to code segment
|
||||
; some flags changed, again, refer to os-dev.pdf
|
||||
gdt_data:
|
||||
dw 0xffff
|
||||
dw 0x0
|
||||
db 0x0
|
||||
db 10010010b
|
||||
db 11001111b
|
||||
db 0x0
|
||||
|
||||
gdt_end:
|
||||
|
||||
; GDT descriptor
|
||||
gdt_descriptor:
|
||||
dw gdt_end - gdt_start - 1 ; size (16 bit), always one less of its true size
|
||||
dd gdt_start ; address (32 bit)
|
||||
|
||||
; define some constants for later use
|
||||
CODE_SEG equ gdt_code - gdt_start
|
||||
DATA_SEG equ gdt_data - gdt_start
|
||||
57
old-gdt.asm
Normal file
57
old-gdt.asm
Normal file
@ -0,0 +1,57 @@
|
||||
gdt_start: ; don't remove the labels, they're needed to compute sizes and jumps
|
||||
; the GDT starts with a null 8-byte
|
||||
dd 0x0 ; 4 byte
|
||||
dd 0x0 ; 4 byte
|
||||
|
||||
; GDT for kernel code segment. base = 0x00000000, length = 0xfffff
|
||||
; for flags, refer to os-dev.pdf document, page 36
|
||||
gdt_kern_code:
|
||||
dw 0x0000 ; segment length, bits 0-15
|
||||
dw 0x0 ; segment base, bits 0-15
|
||||
db 0x0 ; segment base, bits 16-23
|
||||
db 10011010b ; flags (8 bits)
|
||||
db 11000001b ; flags (4 bits) + segment length, bits 16-19
|
||||
db 0x0 ; segment base, bits 24-31
|
||||
|
||||
; GDT for kernel data segment. base and length identical to code segment
|
||||
; some flags changed, again, refer to os-dev.pdf
|
||||
gdt_kern_data:
|
||||
dw 0x0000
|
||||
dw 0x0
|
||||
db 0x0
|
||||
db 10010010b
|
||||
db 11000001b
|
||||
db 0x0
|
||||
|
||||
; GDT for user code segment. base = 0x01000000, length = 0xfffff
|
||||
; for flags, refer to os-dev.pdf document, page 36
|
||||
gdt_usr_code:
|
||||
dw 0xffff ; segment length, bits 0-15
|
||||
dw 0x0 ; segment base, bits 0-15
|
||||
db 0x0 ; segment base, bits 16-23
|
||||
db 11111010b ; flags (8 bits)
|
||||
db 11001111b ; flags (4 bits) + segment length, bits 16-19
|
||||
db 0x0 ; segment base, bits 24-31
|
||||
|
||||
; GDT for user data segment. base and length identical to code segment
|
||||
; some flags changed, again, refer to os-dev.pdf
|
||||
gdt_usr_data:
|
||||
dw 0xffff
|
||||
dw 0x0
|
||||
db 0x0
|
||||
db 11110010b
|
||||
db 11001111b
|
||||
db 0x0
|
||||
|
||||
gdt_end:
|
||||
|
||||
; GDT descriptor
|
||||
gdt_descriptor:
|
||||
dw gdt_end - gdt_start - 1 ; size (16 bit), always one less of its true size
|
||||
dd gdt_start ; address (32 bit)
|
||||
|
||||
; define some constants for later use
|
||||
CODE_SEG equ gdt_kern_code - gdt_start
|
||||
DATA_SEG equ gdt_kern_data - gdt_start
|
||||
USR_CODE_SEG equ gdt_usr_code - gdt_start
|
||||
USR_DATA_SEG equ gdt_usr_data - gdt_start
|
||||
Loading…
x
Reference in New Issue
Block a user