libzel/tables/no_prefix.tab
Stephen Checkoway e392e05c87 Add the generated files to the repo
There's no real reason not to include the generated files.

Closes: #1
2021-05-25 13:31:01 -04:00

257 lines
16 KiB
SQL

{ NOP, INV, INV, INV, 4, TYPE_NONE, "nop" }, // 00
{ LD_RR_NN, REG_BC, INV, INV, 10, TYPE_IMM_NN, "ld bc,%04hXh" }, // 01
{ LD_MRR_R, REG_BC, REG_A, INV, 7, TYPE_NONE, "ld (bc),a" }, // 02
{ INC_RR, REG_BC, INV, INV, 6, TYPE_NONE, "inc bc" }, // 03
{ INC_R, REG_B, INV, INV, 4, TYPE_NONE, "inc b" }, // 04
{ DEC_R, REG_B, INV, INV, 4, TYPE_NONE, "dec b" }, // 05
{ LD_R_N, REG_B, INV, INV, 7, TYPE_IMM_N, "ld b,%02hhXh" }, // 06
{ RLCA, INV, INV, INV, 4, TYPE_NONE, "rlca" }, // 07
{ EX_RR_RR, REG_AF, REG_AFP, INV, 4, TYPE_NONE, "ex af,af'" }, // 08
{ ADD_RR_RR, REG_HL, REG_BC, INV, 11, TYPE_NONE, "add hl,bc" }, // 09
{ LD_R_MRR, REG_A, REG_BC, INV, 7, TYPE_NONE, "ld a,(bc)" }, // 0a
{ DEC_RR, REG_BC, INV, INV, 6, TYPE_NONE, "dec bc" }, // 0b
{ INC_R, REG_C, INV, INV, 4, TYPE_NONE, "inc c" }, // 0c
{ DEC_R, REG_C, INV, INV, 4, TYPE_NONE, "dec c" }, // 0d
{ LD_R_N, REG_C, INV, INV, 7, TYPE_IMM_N, "ld c,%02hhXh" }, // 0e
{ RRCA, INV, INV, INV, 4, TYPE_NONE, "rrca" }, // 0f
{ DJNZ, INV, INV, 8, 13, TYPE_DISP, "djnz (pc%c%Xh)" }, // 10
{ LD_RR_NN, REG_DE, INV, INV, 10, TYPE_IMM_NN, "ld de,%04hXh" }, // 11
{ LD_MRR_R, REG_DE, REG_A, INV, 7, TYPE_NONE, "ld (de),a" }, // 12
{ INC_RR, REG_DE, INV, INV, 6, TYPE_NONE, "inc de" }, // 13
{ INC_R, REG_D, INV, INV, 4, TYPE_NONE, "inc d" }, // 14
{ DEC_R, REG_D, INV, INV, 4, TYPE_NONE, "dec d" }, // 15
{ LD_R_N, REG_D, INV, INV, 7, TYPE_IMM_N, "ld d,%02hhXh" }, // 16
{ RLA, INV, INV, INV, 4, TYPE_NONE, "rla" }, // 17
{ JR, INV, INV, INV, 12, TYPE_DISP, "jr (pc%c%Xh)" }, // 18
{ ADD_RR_RR, REG_HL, REG_DE, INV, 11, TYPE_NONE, "add hl,de" }, // 19
{ LD_R_MRR, REG_A, REG_DE, INV, 7, TYPE_NONE, "ld a,(de)" }, // 1a
{ DEC_RR, REG_DE, INV, INV, 6, TYPE_NONE, "dec de" }, // 1b
{ INC_R, REG_E, INV, INV, 4, TYPE_NONE, "inc e" }, // 1c
{ DEC_R, REG_E, INV, INV, 4, TYPE_NONE, "dec e" }, // 1d
{ LD_R_N, REG_E, INV, INV, 7, TYPE_IMM_N, "ld e,%02hhXh" }, // 1e
{ RRA, INV, INV, INV, 4, TYPE_NONE, "rra" }, // 1f
{ JR_C, COND_NZ, INV, 7, 12, TYPE_DISP, "jr nz,(pc%c%Xh)" }, // 20
{ LD_RR_NN, REG_HL, INV, INV, 10, TYPE_IMM_NN, "ld hl,%04hXh" }, // 21
{ LD_MNN_RR, INV, REG_HL, INV, 16, TYPE_IMM_NN, "ld (%04hXh),hl" }, // 22
{ INC_RR, REG_HL, INV, INV, 6, TYPE_NONE, "inc hl" }, // 23
{ INC_R, REG_H, INV, INV, 4, TYPE_NONE, "inc h" }, // 24
{ DEC_R, REG_H, INV, INV, 4, TYPE_NONE, "dec h" }, // 25
{ LD_R_N, REG_H, INV, INV, 7, TYPE_IMM_N, "ld h,%02hhXh" }, // 26
{ DAA, INV, INV, INV, 4, TYPE_NONE, "daa" }, // 27
{ JR_C, COND_Z, INV, 7, 12, TYPE_DISP, "jr z,(pc%c%Xh)" }, // 28
{ ADD_RR_RR, REG_HL, REG_HL, INV, 11, TYPE_NONE, "add hl,hl" }, // 29
{ LD_RR_MNN, REG_HL, INV, INV, 16, TYPE_IMM_NN, "ld hl,(%04hXh)" }, // 2a
{ DEC_RR, REG_HL, INV, INV, 6, TYPE_NONE, "dec hl" }, // 2b
{ INC_R, REG_L, INV, INV, 4, TYPE_NONE, "inc l" }, // 2c
{ DEC_R, REG_L, INV, INV, 4, TYPE_NONE, "dec l" }, // 2d
{ LD_R_N, REG_L, INV, INV, 7, TYPE_IMM_N, "ld l,%02hhXh" }, // 2e
{ CPL, INV, INV, INV, 4, TYPE_NONE, "cpl" }, // 2f
{ JR_C, COND_NC, INV, 7, 12, TYPE_DISP, "jr nc,(pc%c%Xh)" }, // 30
{ LD_RR_NN, REG_SP, INV, INV, 10, TYPE_IMM_NN, "ld sp,%04hXh" }, // 31
{ LD_MNN_R, INV, REG_A, INV, 13, TYPE_IMM_NN, "ld (%04hXh),a" }, // 32
{ INC_RR, REG_SP, INV, INV, 6, TYPE_NONE, "inc sp" }, // 33
{ INC_MRR, REG_HL, INV, INV, 11, TYPE_NONE, "inc (hl)" }, // 34
{ DEC_MRR, REG_HL, INV, INV, 11, TYPE_NONE, "dec (hl)" }, // 35
{ LD_MRR_N, REG_HL, INV, INV, 10, TYPE_IMM_N, "ld (hl),%02hhXh" }, // 36
{ SCF, INV, INV, INV, 4, TYPE_NONE, "scf" }, // 37
{ JR_C, COND_C, INV, 7, 12, TYPE_DISP, "jr c,(pc%c%Xh)" }, // 38
{ ADD_RR_RR, REG_HL, REG_SP, INV, 11, TYPE_NONE, "add hl,sp" }, // 39
{ LD_R_MNN, REG_A, INV, INV, 13, TYPE_IMM_NN, "ld a,(%04hXh)" }, // 3a
{ DEC_RR, REG_SP, INV, INV, 6, TYPE_NONE, "dec sp" }, // 3b
{ INC_R, REG_A, INV, INV, 4, TYPE_NONE, "inc a" }, // 3c
{ DEC_R, REG_A, INV, INV, 4, TYPE_NONE, "dec a" }, // 3d
{ LD_R_N, REG_A, INV, INV, 7, TYPE_IMM_N, "ld a,%02hhXh" }, // 3e
{ CCF, INV, INV, INV, 4, TYPE_NONE, "ccf" }, // 3f
{ LD_R_R, REG_B, REG_B, INV, 4, TYPE_NONE, "ld b,b" }, // 40
{ LD_R_R, REG_B, REG_C, INV, 4, TYPE_NONE, "ld b,c" }, // 41
{ LD_R_R, REG_B, REG_D, INV, 4, TYPE_NONE, "ld b,d" }, // 42
{ LD_R_R, REG_B, REG_E, INV, 4, TYPE_NONE, "ld b,e" }, // 43
{ LD_R_R, REG_B, REG_H, INV, 4, TYPE_NONE, "ld b,h" }, // 44
{ LD_R_R, REG_B, REG_L, INV, 4, TYPE_NONE, "ld b,l" }, // 45
{ LD_R_MRR, REG_B, REG_HL, INV, 7, TYPE_NONE, "ld b,(hl)" }, // 46
{ LD_R_R, REG_B, REG_A, INV, 4, TYPE_NONE, "ld b,a" }, // 47
{ LD_R_R, REG_C, REG_B, INV, 4, TYPE_NONE, "ld c,b" }, // 48
{ LD_R_R, REG_C, REG_C, INV, 4, TYPE_NONE, "ld c,c" }, // 49
{ LD_R_R, REG_C, REG_D, INV, 4, TYPE_NONE, "ld c,d" }, // 4a
{ LD_R_R, REG_C, REG_E, INV, 4, TYPE_NONE, "ld c,e" }, // 4b
{ LD_R_R, REG_C, REG_H, INV, 4, TYPE_NONE, "ld c,h" }, // 4c
{ LD_R_R, REG_C, REG_L, INV, 4, TYPE_NONE, "ld c,l" }, // 4d
{ LD_R_MRR, REG_C, REG_HL, INV, 7, TYPE_NONE, "ld c,(hl)" }, // 4e
{ LD_R_R, REG_C, REG_A, INV, 4, TYPE_NONE, "ld c,a" }, // 4f
{ LD_R_R, REG_D, REG_B, INV, 4, TYPE_NONE, "ld d,b" }, // 50
{ LD_R_R, REG_D, REG_C, INV, 4, TYPE_NONE, "ld d,c" }, // 51
{ LD_R_R, REG_D, REG_D, INV, 4, TYPE_NONE, "ld d,d" }, // 52
{ LD_R_R, REG_D, REG_E, INV, 4, TYPE_NONE, "ld d,e" }, // 53
{ LD_R_R, REG_D, REG_H, INV, 4, TYPE_NONE, "ld d,h" }, // 54
{ LD_R_R, REG_D, REG_L, INV, 4, TYPE_NONE, "ld d,l" }, // 55
{ LD_R_MRR, REG_D, REG_HL, INV, 7, TYPE_NONE, "ld d,(hl)" }, // 56
{ LD_R_R, REG_D, REG_A, INV, 4, TYPE_NONE, "ld d,a" }, // 57
{ LD_R_R, REG_E, REG_B, INV, 4, TYPE_NONE, "ld e,b" }, // 58
{ LD_R_R, REG_E, REG_C, INV, 4, TYPE_NONE, "ld e,c" }, // 59
{ LD_R_R, REG_E, REG_D, INV, 4, TYPE_NONE, "ld e,d" }, // 5a
{ LD_R_R, REG_E, REG_E, INV, 4, TYPE_NONE, "ld e,e" }, // 5b
{ LD_R_R, REG_E, REG_H, INV, 4, TYPE_NONE, "ld e,h" }, // 5c
{ LD_R_R, REG_E, REG_L, INV, 4, TYPE_NONE, "ld e,l" }, // 5d
{ LD_R_MRR, REG_E, REG_HL, INV, 7, TYPE_NONE, "ld e,(hl)" }, // 5e
{ LD_R_R, REG_E, REG_A, INV, 4, TYPE_NONE, "ld e,a" }, // 5f
{ LD_R_R, REG_H, REG_B, INV, 4, TYPE_NONE, "ld h,b" }, // 60
{ LD_R_R, REG_H, REG_C, INV, 4, TYPE_NONE, "ld h,c" }, // 61
{ LD_R_R, REG_H, REG_D, INV, 4, TYPE_NONE, "ld h,d" }, // 62
{ LD_R_R, REG_H, REG_E, INV, 4, TYPE_NONE, "ld h,e" }, // 63
{ LD_R_R, REG_H, REG_H, INV, 4, TYPE_NONE, "ld h,h" }, // 64
{ LD_R_R, REG_H, REG_L, INV, 4, TYPE_NONE, "ld h,l" }, // 65
{ LD_R_MRR, REG_H, REG_HL, INV, 7, TYPE_NONE, "ld h,(hl)" }, // 66
{ LD_R_R, REG_H, REG_A, INV, 4, TYPE_NONE, "ld h,a" }, // 67
{ LD_R_R, REG_L, REG_B, INV, 4, TYPE_NONE, "ld l,b" }, // 68
{ LD_R_R, REG_L, REG_C, INV, 4, TYPE_NONE, "ld l,c" }, // 69
{ LD_R_R, REG_L, REG_D, INV, 4, TYPE_NONE, "ld l,d" }, // 6a
{ LD_R_R, REG_L, REG_E, INV, 4, TYPE_NONE, "ld l,e" }, // 6b
{ LD_R_R, REG_L, REG_H, INV, 4, TYPE_NONE, "ld l,h" }, // 6c
{ LD_R_R, REG_L, REG_L, INV, 4, TYPE_NONE, "ld l,l" }, // 6d
{ LD_R_MRR, REG_L, REG_HL, INV, 7, TYPE_NONE, "ld l,(hl)" }, // 6e
{ LD_R_R, REG_L, REG_A, INV, 4, TYPE_NONE, "ld l,a" }, // 6f
{ LD_MRR_R, REG_HL, REG_B, INV, 7, TYPE_NONE, "ld (hl),b" }, // 70
{ LD_MRR_R, REG_HL, REG_C, INV, 7, TYPE_NONE, "ld (hl),c" }, // 71
{ LD_MRR_R, REG_HL, REG_D, INV, 7, TYPE_NONE, "ld (hl),d" }, // 72
{ LD_MRR_R, REG_HL, REG_E, INV, 7, TYPE_NONE, "ld (hl),e" }, // 73
{ LD_MRR_R, REG_HL, REG_H, INV, 7, TYPE_NONE, "ld (hl),h" }, // 74
{ LD_MRR_R, REG_HL, REG_L, INV, 7, TYPE_NONE, "ld (hl),l" }, // 75
{ HALT, INV, INV, INV, 4, TYPE_NONE, "halt" }, // 76
{ LD_MRR_R, REG_HL, REG_A, INV, 7, TYPE_NONE, "ld (hl),a" }, // 77
{ LD_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "ld a,b" }, // 78
{ LD_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "ld a,c" }, // 79
{ LD_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "ld a,d" }, // 7a
{ LD_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "ld a,e" }, // 7b
{ LD_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "ld a,h" }, // 7c
{ LD_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "ld a,l" }, // 7d
{ LD_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "ld a,(hl)" }, // 7e
{ LD_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "ld a,a" }, // 7f
{ ADD_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "add a,b" }, // 80
{ ADD_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "add a,c" }, // 81
{ ADD_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "add a,d" }, // 82
{ ADD_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "add a,e" }, // 83
{ ADD_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "add a,h" }, // 84
{ ADD_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "add a,l" }, // 85
{ ADD_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "add a,(hl)" }, // 86
{ ADD_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "add a,a" }, // 87
{ ADC_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "adc a,b" }, // 88
{ ADC_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "adc a,c" }, // 89
{ ADC_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "adc a,d" }, // 8a
{ ADC_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "adc a,e" }, // 8b
{ ADC_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "adc a,h" }, // 8c
{ ADC_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "adc a,l" }, // 8d
{ ADC_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "adc a,(hl)" }, // 8e
{ ADC_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "adc a,a" }, // 8f
{ SUB_R, REG_B, INV, INV, 4, TYPE_NONE, "sub b" }, // 90
{ SUB_R, REG_C, INV, INV, 4, TYPE_NONE, "sub c" }, // 91
{ SUB_R, REG_D, INV, INV, 4, TYPE_NONE, "sub d" }, // 92
{ SUB_R, REG_E, INV, INV, 4, TYPE_NONE, "sub e" }, // 93
{ SUB_R, REG_H, INV, INV, 4, TYPE_NONE, "sub h" }, // 94
{ SUB_R, REG_L, INV, INV, 4, TYPE_NONE, "sub l" }, // 95
{ SUB_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "sub (hl)" }, // 96
{ SUB_R, REG_A, INV, INV, 4, TYPE_NONE, "sub a" }, // 97
{ SBC_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "sbc a,b" }, // 98
{ SBC_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "sbc a,c" }, // 99
{ SBC_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "sbc a,d" }, // 9a
{ SBC_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "sbc a,e" }, // 9b
{ SBC_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "sbc a,h" }, // 9c
{ SBC_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "sbc a,l" }, // 9d
{ SBC_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "sbc a,(hl)" }, // 9e
{ SBC_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "sbc a,a" }, // 9f
{ AND_R, REG_B, INV, INV, 4, TYPE_NONE, "and b" }, // a0
{ AND_R, REG_C, INV, INV, 4, TYPE_NONE, "and c" }, // a1
{ AND_R, REG_D, INV, INV, 4, TYPE_NONE, "and d" }, // a2
{ AND_R, REG_E, INV, INV, 4, TYPE_NONE, "and e" }, // a3
{ AND_R, REG_H, INV, INV, 4, TYPE_NONE, "and h" }, // a4
{ AND_R, REG_L, INV, INV, 4, TYPE_NONE, "and l" }, // a5
{ AND_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "and (hl)" }, // a6
{ AND_R, REG_A, INV, INV, 4, TYPE_NONE, "and a" }, // a7
{ XOR_R, REG_B, INV, INV, 4, TYPE_NONE, "xor b" }, // a8
{ XOR_R, REG_C, INV, INV, 4, TYPE_NONE, "xor c" }, // a9
{ XOR_R, REG_D, INV, INV, 4, TYPE_NONE, "xor d" }, // aa
{ XOR_R, REG_E, INV, INV, 4, TYPE_NONE, "xor e" }, // ab
{ XOR_R, REG_H, INV, INV, 4, TYPE_NONE, "xor h" }, // ac
{ XOR_R, REG_L, INV, INV, 4, TYPE_NONE, "xor l" }, // ad
{ XOR_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "xor (hl)" }, // ae
{ XOR_R, REG_A, INV, INV, 4, TYPE_NONE, "xor a" }, // af
{ OR_R, REG_B, INV, INV, 4, TYPE_NONE, "or b" }, // b0
{ OR_R, REG_C, INV, INV, 4, TYPE_NONE, "or c" }, // b1
{ OR_R, REG_D, INV, INV, 4, TYPE_NONE, "or d" }, // b2
{ OR_R, REG_E, INV, INV, 4, TYPE_NONE, "or e" }, // b3
{ OR_R, REG_H, INV, INV, 4, TYPE_NONE, "or h" }, // b4
{ OR_R, REG_L, INV, INV, 4, TYPE_NONE, "or l" }, // b5
{ OR_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "or (hl)" }, // b6
{ OR_R, REG_A, INV, INV, 4, TYPE_NONE, "or a" }, // b7
{ CP_R, REG_B, INV, INV, 4, TYPE_NONE, "cp b" }, // b8
{ CP_R, REG_C, INV, INV, 4, TYPE_NONE, "cp c" }, // b9
{ CP_R, REG_D, INV, INV, 4, TYPE_NONE, "cp d" }, // ba
{ CP_R, REG_E, INV, INV, 4, TYPE_NONE, "cp e" }, // bb
{ CP_R, REG_H, INV, INV, 4, TYPE_NONE, "cp h" }, // bc
{ CP_R, REG_L, INV, INV, 4, TYPE_NONE, "cp l" }, // bd
{ CP_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "cp (hl)" }, // be
{ CP_R, REG_A, INV, INV, 4, TYPE_NONE, "cp a" }, // bf
{ RET_C, COND_NZ, INV, 5, 11, TYPE_NONE, "ret nz" }, // c0
{ POP_RR, REG_BC, INV, INV, 10, TYPE_NONE, "pop bc" }, // c1
{ JP_C_MNN, COND_NZ, INV, INV, 10, TYPE_IMM_NN, "jp nz,(%04hXh)" }, // c2
{ JP_MNN, INV, INV, INV, 10, TYPE_IMM_NN, "jp (%04hXh)" }, // c3
{ CALL_C_MNN, COND_NZ, INV, 10, 17, TYPE_IMM_NN, "call nz,(%04hXh)" }, // c4
{ PUSH_RR, REG_BC, INV, INV, 11, TYPE_NONE, "push bc" }, // c5
{ ADD_R_N, REG_A, INV, INV, 7, TYPE_IMM_N, "add a,%02hhXh" }, // c6
{ RST, 0x0, INV, INV, 11, TYPE_NONE, "rst 0h" }, // c7
{ RET_C, COND_Z, INV, 5, 11, TYPE_NONE, "ret z" }, // c8
{ RET, INV, INV, INV, 10, TYPE_NONE, "ret" }, // c9
{ JP_C_MNN, COND_Z, INV, INV, 10, TYPE_IMM_NN, "jp z,(%04hXh)" }, // ca
{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cb
{ CALL_C_MNN, COND_Z, INV, 10, 17, TYPE_IMM_NN, "call z,(%04hXh)" }, // cc
{ CALL_MNN, INV, INV, INV, 17, TYPE_IMM_NN, "call (%04hXh)" }, // cd
{ ADC_R_N, REG_A, INV, INV, 7, TYPE_IMM_N, "adc a,%02hhXh" }, // ce
{ RST, 0x8, INV, INV, 11, TYPE_NONE, "rst 8h" }, // cf
{ RET_C, COND_NC, INV, INV, 5, TYPE_NONE, "ret nc" }, // d0
{ POP_RR, REG_DE, INV, INV, 10, TYPE_NONE, "pop de" }, // d1
{ JP_C_MNN, COND_NC, INV, INV, 10, TYPE_IMM_NN, "jp nc,(%04hXh)" }, // d2
{ OUT_MN_R, INV, REG_A, INV, 11, TYPE_IMM_N, "out (%02hhXh),a" }, // d3
{ CALL_C_MNN, COND_NC, INV, 10, 17, TYPE_IMM_NN, "call nc,(%04hXh)" }, // d4
{ PUSH_RR, REG_DE, INV, INV, 11, TYPE_NONE, "push de" }, // d5
{ SUB_N, INV, INV, INV, 7, TYPE_IMM_N, "sub %02hhXh" }, // d6
{ RST, 0x10, INV, INV, 11, TYPE_NONE, "rst 10h" }, // d7
{ RET_C, COND_C, INV, INV, 5, TYPE_NONE, "ret c" }, // d8
{ EXX, INV, INV, INV, 4, TYPE_NONE, "exx" }, // d9
{ JP_C_MNN, COND_C, INV, INV, 10, TYPE_IMM_NN, "jp c,(%04hXh)" }, // da
{ IN_R_MN, REG_A, INV, INV, 11, TYPE_IMM_N, "in a,(%02hhXh)" }, // db
{ CALL_C_MNN, COND_C, INV, 10, 17, TYPE_IMM_NN, "call c,(%04hXh)" }, // dc
{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // dd
{ SBC_R_N, REG_A, INV, INV, 15, TYPE_IMM_N, "sbc a,%02hhXh" }, // de
{ RST, 0x18, INV, INV, 11, TYPE_NONE, "rst 18h" }, // df
{ RET_C, COND_PO, INV, 5, 11, TYPE_NONE, "ret po" }, // e0
{ POP_RR, REG_HL, INV, INV, 10, TYPE_NONE, "pop hl" }, // e1
{ JP_C_MNN, COND_PO, INV, INV, 10, TYPE_IMM_NN, "jp po,(%04hXh)" }, // e2
{ EX_MRR_RR, REG_SP, REG_HL, INV, 19, TYPE_NONE, "ex (sp),hl" }, // e3
{ CALL_C_MNN, COND_PO, INV, 10, 17, TYPE_IMM_NN, "call po,(%04hXh)" }, // e4
{ PUSH_RR, REG_HL, INV, INV, 11, TYPE_NONE, "push hl" }, // e5
{ AND_N, INV, INV, INV, 7, TYPE_IMM_N, "and %02hhXh" }, // e6
{ RST, 0x20, INV, INV, 11, TYPE_NONE, "rst 20h" }, // e7
{ RET_C, COND_PE, INV, 5, 11, TYPE_NONE, "ret pe" }, // e8
{ JP_MRR, REG_HL, INV, INV, 4, TYPE_NONE, "jp (hl)" }, // e9
{ JP_C_MNN, COND_PE, INV, INV, 10, TYPE_IMM_NN, "jp pe,(%04hXh)" }, // ea
{ EX_RR_RR, REG_DE, REG_HL, INV, 4, TYPE_NONE, "ex de,hl" }, // eb
{ CALL_C_MNN, COND_PE, INV, 10, 17, TYPE_IMM_NN, "call pe,(%04hXh)" }, // ec
{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ed
{ XOR_N, INV, INV, INV, 7, TYPE_IMM_N, "xor %02hhXh" }, // ee
{ RST, 0x28, INV, INV, 11, TYPE_NONE, "rst 28h" }, // ef
{ RET_C, COND_P, INV, 5, 11, TYPE_NONE, "ret p" }, // f0
{ POP_RR, REG_AF, INV, INV, 10, TYPE_NONE, "pop af" }, // f1
{ JP_C_MNN, COND_P, INV, INV, 10, TYPE_IMM_NN, "jp p,(%04hXh)" }, // f2
{ DI, INV, INV, INV, 4, TYPE_NONE, "di" }, // f3
{ CALL_C_MNN, COND_P, INV, 10, 17, TYPE_IMM_NN, "call p,(%04hXh)" }, // f4
{ PUSH_RR, REG_AF, INV, INV, 11, TYPE_NONE, "push af" }, // f5
{ OR_N, INV, INV, INV, 7, TYPE_IMM_N, "or %02hhXh" }, // f6
{ RST, 0x30, INV, INV, 11, TYPE_NONE, "rst 30h" }, // f7
{ RET_C, COND_M, INV, 5, 11, TYPE_NONE, "ret m" }, // f8
{ LD_RR_RR, REG_SP, REG_HL, INV, 6, TYPE_NONE, "ld sp,hl" }, // f9
{ JP_C_MNN, COND_M, INV, INV, 10, TYPE_IMM_NN, "jp m,(%04hXh)" }, // fa
{ EI, INV, INV, INV, 4, TYPE_NONE, "ei" }, // fb
{ CALL_C_MNN, COND_M, INV, 10, 17, TYPE_IMM_NN, "call m,(%04hXh)" }, // fc
{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fd
{ CP_N, INV, INV, INV, 7, TYPE_IMM_N, "cp %02hhXh" }, // fe
{ RST, 0x38, INV, INV, 11, TYPE_NONE, "rst 38h" }, // ff