From e392e05c87cc32ff9819efdecb2bd69cb7d71fb8 Mon Sep 17 00:00:00 2001 From: Stephen Checkoway Date: Tue, 25 May 2021 13:30:25 -0400 Subject: [PATCH] Add the generated files to the repo There's no real reason not to include the generated files. Closes: #1 --- .gitignore | 2 - include/zel/z80_instruction_types.h | 189 ++++++++++++++++++++ tables/cb_prefix.tab | 256 ++++++++++++++++++++++++++++ tables/dd_prefix.tab | 256 ++++++++++++++++++++++++++++ tables/ddcb_prefix.tab | 256 ++++++++++++++++++++++++++++ tables/ed_prefix.tab | 256 ++++++++++++++++++++++++++++ tables/fd_prefix.tab | 256 ++++++++++++++++++++++++++++ tables/fdcb_prefix.tab | 256 ++++++++++++++++++++++++++++ tables/no_prefix.tab | 256 ++++++++++++++++++++++++++++ 9 files changed, 1981 insertions(+), 2 deletions(-) create mode 100644 include/zel/z80_instruction_types.h create mode 100644 tables/cb_prefix.tab create mode 100644 tables/dd_prefix.tab create mode 100644 tables/ddcb_prefix.tab create mode 100644 tables/ed_prefix.tab create mode 100644 tables/fd_prefix.tab create mode 100644 tables/fdcb_prefix.tab create mode 100644 tables/no_prefix.tab diff --git a/.gitignore b/.gitignore index e9345b5..e49dc79 100644 --- a/.gitignore +++ b/.gitignore @@ -1,8 +1,6 @@ libzel.a -include/zel/z80_instruction_types.h *.o doc -tables/*.tab tests/itest_arithmetic tests/itest_load tests/itest_set diff --git a/include/zel/z80_instruction_types.h b/include/zel/z80_instruction_types.h new file mode 100644 index 0000000..de2c13e --- /dev/null +++ b/include/zel/z80_instruction_types.h @@ -0,0 +1,189 @@ +/* Copyright (c) 2008, 2017 Stephen Checkoway + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/*! \file + * + * z80 instruction types. + * \author Stephen Checkoway + * \version 0.1 + * \date 2008, 2017 + */ +#ifndef ZEL_Z80_INSTRUCTION_TYPES_H +#define ZEL_Z80_INSTRUCTION_TYPES_H + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum +{ + ADC_RR_RR, //!< adc + ADC_R_I, //!< adc + ADC_R_MRR, //!< adc + ADC_R_N, //!< adc + ADC_R_R, //!< adc + ADD_RR_RR, //!< add + ADD_R_I, //!< add + ADD_R_MRR, //!< add + ADD_R_N, //!< add + ADD_R_R, //!< add + AND_I, //!< and + AND_MRR, //!< and + AND_N, //!< and + AND_R, //!< and + BIT_I, //!< bit + BIT_MRR, //!< bit + BIT_R, //!< bit + CALL_C_MNN, //!< call + CALL_MNN, //!< call + CCF, //!< ccf + CPD, //!< cpd + CPDR, //!< cpdr + CPI, //!< cpi + CPIR, //!< cpir + CPL, //!< cpl + CP_I, //!< cp + CP_MRR, //!< cp + CP_N, //!< cp + CP_R, //!< cp + DAA, //!< daa + DEC_I, //!< dec + DEC_MRR, //!< dec + DEC_R, //!< dec + DEC_RR, //!< dec + DI, //!< di + DJNZ, //!< djnz + EI, //!< ei + EXX, //!< exx + EX_MRR_RR, //!< ex + EX_RR_RR, //!< ex + HALT, //!< halt + IM, //!< im + INC_I, //!< inc + INC_MRR, //!< inc + INC_R, //!< inc + INC_RR, //!< inc + IND, //!< ind + INDR, //!< indr + INI, //!< ini + INIR, //!< inir + IN_R_MN, //!< in + IN_R_R, //!< in + JP_C_MNN, //!< jp + JP_MNN, //!< jp + JP_MRR, //!< jp + JR, //!< jr + JR_C, //!< jr + LDD, //!< ldd + LDDR, //!< lddr + LDI, //!< ldi + LDIR, //!< ldir + LD_I_N, //!< ld + LD_I_R, //!< ld + LD_MNN_R, //!< ld + LD_MNN_RR, //!< ld + LD_MRR_N, //!< ld + LD_MRR_R, //!< ld + LD_RR_MNN, //!< ld + LD_RR_NN, //!< ld + LD_RR_RR, //!< ld + LD_R_I, //!< ld + LD_R_MNN, //!< ld + LD_R_MRR, //!< ld + LD_R_N, //!< ld + LD_R_R, //!< ld + NEG, //!< neg + NOP, //!< nop + OR_I, //!< or + OR_MRR, //!< or + OR_N, //!< or + OR_R, //!< or + OTDR, //!< otdr + OTIR, //!< otir + OUTD, //!< outd + OUTI, //!< outi + OUT_MN_R, //!< out + OUT_R, //!< out + OUT_R_R, //!< out + POP_RR, //!< pop + PUSH_RR, //!< push + RES_I, //!< res + RES_MRR, //!< res + RES_R, //!< res + RET, //!< ret + RETI, //!< reti + RETN, //!< retn + RET_C, //!< ret + RLA, //!< rla + RLCA, //!< rlca + RLC_I, //!< rlc + RLC_MRR, //!< rlc + RLC_R, //!< rlc + RLD, //!< rld + RL_I, //!< rl + RL_MRR, //!< rl + RL_R, //!< rl + RRA, //!< rra + RRCA, //!< rrca + RRC_I, //!< rrc + RRC_MRR, //!< rrc + RRC_R, //!< rrc + RRD, //!< rrd + RR_I, //!< rr + RR_MRR, //!< rr + RR_R, //!< rr + RST, //!< rst + SBC_RR_RR, //!< sbc + SBC_R_I, //!< sbc + SBC_R_MRR, //!< sbc + SBC_R_N, //!< sbc + SBC_R_R, //!< sbc + SCF, //!< scf + SET_I, //!< set + SET_MRR, //!< set + SET_R, //!< set + SLA_I, //!< sla + SLA_MRR, //!< sla + SLA_R, //!< sla + SLL_I, //!< sll + SLL_MRR, //!< sll + SLL_R, //!< sll + SRA_I, //!< sra + SRA_MRR, //!< sra + SRA_R, //!< sra + SRL_I, //!< srl + SRL_MRR, //!< srl + SRL_R, //!< srl + SUB_I, //!< sub + SUB_MRR, //!< sub + SUB_N, //!< sub + SUB_R, //!< sub + XOR_I, //!< xor + XOR_MRR, //!< xor + XOR_N, //!< xor + XOR_R, //!< xor +} InstructionType; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/tables/cb_prefix.tab b/tables/cb_prefix.tab new file mode 100644 index 0000000..fa8e153 --- /dev/null +++ b/tables/cb_prefix.tab @@ -0,0 +1,256 @@ +{ RLC_R, REG_B, INV, INV, 8, TYPE_NONE, "rlc b" }, // 00 +{ RLC_R, REG_C, INV, INV, 8, TYPE_NONE, "rlc c" }, // 01 +{ RLC_R, REG_D, INV, INV, 8, TYPE_NONE, "rlc d" }, // 02 +{ RLC_R, REG_E, INV, INV, 8, TYPE_NONE, "rlc e" }, // 03 +{ RLC_R, REG_H, INV, INV, 8, TYPE_NONE, "rlc h" }, // 04 +{ RLC_R, REG_L, INV, INV, 8, TYPE_NONE, "rlc l" }, // 05 +{ RLC_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "rlc (hl)" }, // 06 +{ RLC_R, REG_A, INV, INV, 8, TYPE_NONE, "rlc a" }, // 07 +{ RRC_R, REG_B, INV, INV, 8, TYPE_NONE, "rrc b" }, // 08 +{ RRC_R, REG_C, INV, INV, 8, TYPE_NONE, "rrc c" }, // 09 +{ RRC_R, REG_D, INV, INV, 8, TYPE_NONE, "rrc d" }, // 0a +{ RRC_R, REG_E, INV, INV, 8, TYPE_NONE, "rrc e" }, // 0b +{ RRC_R, REG_H, INV, INV, 8, TYPE_NONE, "rrc h" }, // 0c +{ RRC_R, REG_L, INV, INV, 8, TYPE_NONE, "rrc l" }, // 0d +{ RRC_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "rrc (hl)" }, // 0e +{ RRC_R, REG_A, INV, INV, 8, TYPE_NONE, "rrc a" }, // 0f +{ RL_R, REG_B, INV, INV, 8, TYPE_NONE, "rl b" }, // 10 +{ RL_R, REG_C, INV, INV, 8, TYPE_NONE, "rl c" }, // 11 +{ RL_R, REG_D, INV, INV, 8, TYPE_NONE, "rl d" }, // 12 +{ RL_R, REG_E, INV, INV, 8, TYPE_NONE, "rl e" }, // 13 +{ RL_R, REG_H, INV, INV, 8, TYPE_NONE, "rl h" }, // 14 +{ RL_R, REG_L, INV, INV, 8, TYPE_NONE, "rl l" }, // 15 +{ RL_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "rl (hl)" }, // 16 +{ RL_R, REG_A, INV, INV, 8, TYPE_NONE, "rl a" }, // 17 +{ RR_R, REG_B, INV, INV, 8, TYPE_NONE, "rr b" }, // 18 +{ RR_R, REG_C, INV, INV, 8, TYPE_NONE, "rr c" }, // 19 +{ RR_R, REG_D, INV, INV, 8, TYPE_NONE, "rr d" }, // 1a +{ RR_R, REG_E, INV, INV, 8, TYPE_NONE, "rr e" }, // 1b +{ RR_R, REG_H, INV, INV, 8, TYPE_NONE, "rr h" }, // 1c +{ RR_R, REG_L, INV, INV, 8, TYPE_NONE, "rr l" }, // 1d +{ RR_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "rr (hl)" }, // 1e +{ RR_R, REG_A, INV, INV, 8, TYPE_NONE, "rr a" }, // 1f +{ SLA_R, REG_B, INV, INV, 8, TYPE_NONE, "sla b" }, // 20 +{ SLA_R, REG_C, INV, INV, 8, TYPE_NONE, "sla c" }, // 21 +{ SLA_R, REG_D, INV, INV, 8, TYPE_NONE, "sla d" }, // 22 +{ SLA_R, REG_E, INV, INV, 8, TYPE_NONE, "sla e" }, // 23 +{ SLA_R, REG_H, INV, INV, 8, TYPE_NONE, "sla h" }, // 24 +{ SLA_R, REG_L, INV, INV, 8, TYPE_NONE, "sla l" }, // 25 +{ SLA_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "sla (hl)" }, // 26 +{ SLA_R, REG_A, INV, INV, 8, TYPE_NONE, "sla a" }, // 27 +{ SRA_R, REG_B, INV, INV, 8, TYPE_NONE, "sra b" }, // 28 +{ SRA_R, REG_C, INV, INV, 8, TYPE_NONE, "sra c" }, // 29 +{ SRA_R, REG_D, INV, INV, 8, TYPE_NONE, "sra d" }, // 2a +{ SRA_R, REG_E, INV, INV, 8, TYPE_NONE, "sra e" }, // 2b +{ SRA_R, REG_H, INV, INV, 8, TYPE_NONE, "sra h" }, // 2c +{ SRA_R, REG_L, INV, INV, 8, TYPE_NONE, "sra l" }, // 2d +{ SRA_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "sra (hl)" }, // 2e +{ SRA_R, REG_A, INV, INV, 8, TYPE_NONE, "sra a" }, // 2f +{ SLL_R, REG_B, INV, INV, 8, TYPE_NONE, "sll b" }, // 30 +{ SLL_R, REG_C, INV, INV, 8, TYPE_NONE, "sll c" }, // 31 +{ SLL_R, REG_D, INV, INV, 8, TYPE_NONE, "sll d" }, // 32 +{ SLL_R, REG_E, INV, INV, 8, TYPE_NONE, "sll e" }, // 33 +{ SLL_R, REG_H, INV, INV, 8, TYPE_NONE, "sll h" }, // 34 +{ SLL_R, REG_L, INV, INV, 8, TYPE_NONE, "sll l" }, // 35 +{ SLL_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "sll (hl)" }, // 36 +{ SLL_R, REG_A, INV, INV, 8, TYPE_NONE, "sll a" }, // 37 +{ SRL_R, REG_B, INV, INV, 8, TYPE_NONE, "srl b" }, // 38 +{ SRL_R, REG_C, INV, INV, 8, TYPE_NONE, "srl c" }, // 39 +{ SRL_R, REG_D, INV, INV, 8, TYPE_NONE, "srl d" }, // 3a +{ SRL_R, REG_E, INV, INV, 8, TYPE_NONE, "srl e" }, // 3b +{ SRL_R, REG_H, INV, INV, 8, TYPE_NONE, "srl h" }, // 3c +{ SRL_R, REG_L, INV, INV, 8, TYPE_NONE, "srl l" }, // 3d +{ SRL_MRR, REG_HL, INV, INV, 15, TYPE_NONE, "srl (hl)" }, // 3e +{ SRL_R, REG_A, INV, INV, 8, TYPE_NONE, "srl a" }, // 3f +{ BIT_R, 0, REG_B, INV, 8, TYPE_NONE, "bit 0,b" }, // 40 +{ BIT_R, 0, REG_C, INV, 8, TYPE_NONE, "bit 0,c" }, // 41 +{ BIT_R, 0, REG_D, INV, 8, TYPE_NONE, "bit 0,d" }, // 42 +{ BIT_R, 0, REG_E, INV, 8, TYPE_NONE, "bit 0,e" }, // 43 +{ BIT_R, 0, REG_H, INV, 8, TYPE_NONE, "bit 0,h" }, // 44 +{ BIT_R, 0, REG_L, INV, 8, TYPE_NONE, "bit 0,l" }, // 45 +{ BIT_MRR, 0, REG_HL, INV, 12, TYPE_NONE, "bit 0,(hl)" }, // 46 +{ BIT_R, 0, REG_A, INV, 8, TYPE_NONE, "bit 0,a" }, // 47 +{ BIT_R, 1, REG_B, INV, 8, TYPE_NONE, "bit 1,b" }, // 48 +{ BIT_R, 1, REG_C, INV, 8, TYPE_NONE, "bit 1,c" }, // 49 +{ BIT_R, 1, REG_D, INV, 8, TYPE_NONE, "bit 1,d" }, // 4a +{ BIT_R, 1, REG_E, INV, 8, TYPE_NONE, "bit 1,e" }, // 4b +{ BIT_R, 1, REG_H, INV, 8, TYPE_NONE, "bit 1,h" }, // 4c +{ BIT_R, 1, REG_L, INV, 8, TYPE_NONE, "bit 1,l" }, // 4d +{ BIT_MRR, 1, REG_HL, INV, 12, TYPE_NONE, "bit 1,(hl)" }, // 4e +{ BIT_R, 1, REG_A, INV, 8, TYPE_NONE, "bit 1,a" }, // 4f +{ BIT_R, 2, REG_B, INV, 8, TYPE_NONE, "bit 2,b" }, // 50 +{ BIT_R, 2, REG_C, INV, 8, TYPE_NONE, "bit 2,c" }, // 51 +{ BIT_R, 2, REG_D, INV, 8, TYPE_NONE, "bit 2,d" }, // 52 +{ BIT_R, 2, REG_E, INV, 8, TYPE_NONE, "bit 2,e" }, // 53 +{ BIT_R, 2, REG_H, INV, 8, TYPE_NONE, "bit 2,h" }, // 54 +{ BIT_R, 2, REG_L, INV, 8, TYPE_NONE, "bit 2,l" }, // 55 +{ BIT_MRR, 2, REG_HL, INV, 12, TYPE_NONE, "bit 2,(hl)" }, // 56 +{ BIT_R, 2, REG_A, INV, 8, TYPE_NONE, "bit 2,a" }, // 57 +{ BIT_R, 3, REG_B, INV, 8, TYPE_NONE, "bit 3,b" }, // 58 +{ BIT_R, 3, REG_C, INV, 8, TYPE_NONE, "bit 3,c" }, // 59 +{ BIT_R, 3, REG_D, INV, 8, TYPE_NONE, "bit 3,d" }, // 5a +{ BIT_R, 3, REG_E, INV, 8, TYPE_NONE, "bit 3,e" }, // 5b +{ BIT_R, 3, REG_H, INV, 8, TYPE_NONE, "bit 3,h" }, // 5c +{ BIT_R, 3, REG_L, INV, 8, TYPE_NONE, "bit 3,l" }, // 5d +{ BIT_MRR, 3, REG_HL, INV, 12, TYPE_NONE, "bit 3,(hl)" }, // 5e +{ BIT_R, 3, REG_A, INV, 8, TYPE_NONE, "bit 3,a" }, // 5f +{ BIT_R, 4, REG_B, INV, 8, TYPE_NONE, "bit 4,b" }, // 60 +{ BIT_R, 4, REG_C, INV, 8, TYPE_NONE, "bit 4,c" }, // 61 +{ BIT_R, 4, REG_D, INV, 8, TYPE_NONE, "bit 4,d" }, // 62 +{ BIT_R, 4, REG_E, INV, 8, TYPE_NONE, "bit 4,e" }, // 63 +{ BIT_R, 4, REG_H, INV, 8, TYPE_NONE, "bit 4,h" }, // 64 +{ BIT_R, 4, REG_L, INV, 8, TYPE_NONE, "bit 4,l" }, // 65 +{ BIT_MRR, 4, REG_HL, INV, 12, TYPE_NONE, "bit 4,(hl)" }, // 66 +{ BIT_R, 4, REG_A, INV, 8, TYPE_NONE, "bit 4,a" }, // 67 +{ BIT_R, 5, REG_B, INV, 8, TYPE_NONE, "bit 5,b" }, // 68 +{ BIT_R, 5, REG_C, INV, 8, TYPE_NONE, "bit 5,c" }, // 69 +{ BIT_R, 5, REG_D, INV, 8, TYPE_NONE, "bit 5,d" }, // 6a +{ BIT_R, 5, REG_E, INV, 8, TYPE_NONE, "bit 5,e" }, // 6b +{ BIT_R, 5, REG_H, INV, 8, TYPE_NONE, "bit 5,h" }, // 6c +{ BIT_R, 5, REG_L, INV, 8, TYPE_NONE, "bit 5,l" }, // 6d +{ BIT_MRR, 5, REG_HL, INV, 12, TYPE_NONE, "bit 5,(hl)" }, // 6e +{ BIT_R, 5, REG_A, INV, 8, TYPE_NONE, "bit 5,a" }, // 6f +{ BIT_R, 6, REG_B, INV, 8, TYPE_NONE, "bit 6,b" }, // 70 +{ BIT_R, 6, REG_C, INV, 8, TYPE_NONE, "bit 6,c" }, // 71 +{ BIT_R, 6, REG_D, INV, 8, TYPE_NONE, "bit 6,d" }, // 72 +{ BIT_R, 6, REG_E, INV, 8, TYPE_NONE, "bit 6,e" }, // 73 +{ BIT_R, 6, REG_H, INV, 8, TYPE_NONE, "bit 6,h" }, // 74 +{ BIT_R, 6, REG_L, INV, 8, TYPE_NONE, "bit 6,l" }, // 75 +{ BIT_MRR, 6, REG_HL, INV, 12, TYPE_NONE, "bit 6,(hl)" }, // 76 +{ BIT_R, 6, REG_A, INV, 8, TYPE_NONE, "bit 6,a" }, // 77 +{ BIT_R, 7, REG_B, INV, 8, TYPE_NONE, "bit 7,b" }, // 78 +{ BIT_R, 7, REG_C, INV, 8, TYPE_NONE, "bit 7,c" }, // 79 +{ BIT_R, 7, REG_D, INV, 8, TYPE_NONE, "bit 7,d" }, // 7a +{ BIT_R, 7, REG_E, INV, 8, TYPE_NONE, "bit 7,e" }, // 7b +{ BIT_R, 7, REG_H, INV, 8, TYPE_NONE, "bit 7,h" }, // 7c +{ BIT_R, 7, REG_L, INV, 8, TYPE_NONE, "bit 7,l" }, // 7d +{ BIT_MRR, 7, REG_HL, INV, 12, TYPE_NONE, "bit 7,(hl)" }, // 7e +{ BIT_R, 7, REG_A, INV, 8, TYPE_NONE, "bit 7,a" }, // 7f +{ RES_R, 0, REG_B, INV, 8, TYPE_NONE, "res 0,b" }, // 80 +{ RES_R, 0, REG_C, INV, 8, TYPE_NONE, "res 0,c" }, // 81 +{ RES_R, 0, REG_D, INV, 8, TYPE_NONE, "res 0,d" }, // 82 +{ RES_R, 0, REG_E, INV, 8, TYPE_NONE, "res 0,e" }, // 83 +{ RES_R, 0, REG_H, INV, 8, TYPE_NONE, "res 0,h" }, // 84 +{ RES_R, 0, REG_L, INV, 8, TYPE_NONE, "res 0,l" }, // 85 +{ RES_MRR, 0, REG_HL, INV, 15, TYPE_NONE, "res 0,(hl)" }, // 86 +{ RES_R, 0, REG_A, INV, 8, TYPE_NONE, "res 0,a" }, // 87 +{ RES_R, 1, REG_B, INV, 8, TYPE_NONE, "res 1,b" }, // 88 +{ RES_R, 1, REG_C, INV, 8, TYPE_NONE, "res 1,c" }, // 89 +{ RES_R, 1, REG_D, INV, 8, TYPE_NONE, "res 1,d" }, // 8a +{ RES_R, 1, REG_E, INV, 8, TYPE_NONE, "res 1,e" }, // 8b +{ RES_R, 1, REG_H, INV, 8, TYPE_NONE, "res 1,h" }, // 8c +{ RES_R, 1, REG_L, INV, 8, TYPE_NONE, "res 1,l" }, // 8d +{ RES_MRR, 1, REG_HL, INV, 15, TYPE_NONE, "res 1,(hl)" }, // 8e +{ RES_R, 1, REG_A, INV, 8, TYPE_NONE, "res 1,a" }, // 8f +{ RES_R, 2, REG_B, INV, 8, TYPE_NONE, "res 2,b" }, // 90 +{ RES_R, 2, REG_C, INV, 8, TYPE_NONE, "res 2,c" }, // 91 +{ RES_R, 2, REG_D, INV, 8, TYPE_NONE, "res 2,d" }, // 92 +{ RES_R, 2, REG_E, INV, 8, TYPE_NONE, "res 2,e" }, // 93 +{ RES_R, 2, REG_H, INV, 8, TYPE_NONE, "res 2,h" }, // 94 +{ RES_R, 2, REG_L, INV, 8, TYPE_NONE, "res 2,l" }, // 95 +{ RES_MRR, 2, REG_HL, INV, 15, TYPE_NONE, "res 2,(hl)" }, // 96 +{ RES_R, 2, REG_A, INV, 8, TYPE_NONE, "res 2,a" }, // 97 +{ RES_R, 3, REG_B, INV, 8, TYPE_NONE, "res 3,b" }, // 98 +{ RES_R, 3, REG_C, INV, 8, TYPE_NONE, "res 3,c" }, // 99 +{ RES_R, 3, REG_D, INV, 8, TYPE_NONE, "res 3,d" }, // 9a +{ RES_R, 3, REG_E, INV, 8, TYPE_NONE, "res 3,e" }, // 9b +{ RES_R, 3, REG_H, INV, 8, TYPE_NONE, "res 3,h" }, // 9c +{ RES_R, 3, REG_L, INV, 8, TYPE_NONE, "res 3,l" }, // 9d +{ RES_MRR, 3, REG_HL, INV, 15, TYPE_NONE, "res 3,(hl)" }, // 9e +{ RES_R, 3, REG_A, INV, 8, TYPE_NONE, "res 3,a" }, // 9f +{ RES_R, 4, REG_B, INV, 8, TYPE_NONE, "res 4,b" }, // a0 +{ RES_R, 4, REG_C, INV, 8, TYPE_NONE, "res 4,c" }, // a1 +{ RES_R, 4, REG_D, INV, 8, TYPE_NONE, "res 4,d" }, // a2 +{ RES_R, 4, REG_E, INV, 8, TYPE_NONE, "res 4,e" }, // a3 +{ RES_R, 4, REG_H, INV, 8, TYPE_NONE, "res 4,h" }, // a4 +{ RES_R, 4, REG_L, INV, 8, TYPE_NONE, "res 4,l" }, // a5 +{ RES_MRR, 4, REG_HL, INV, 15, TYPE_NONE, "res 4,(hl)" }, // a6 +{ RES_R, 4, REG_A, INV, 8, TYPE_NONE, "res 4,a" }, // a7 +{ RES_R, 5, REG_B, INV, 8, TYPE_NONE, "res 5,b" }, // a8 +{ RES_R, 5, REG_C, INV, 8, TYPE_NONE, "res 5,c" }, // a9 +{ RES_R, 5, REG_D, INV, 8, TYPE_NONE, "res 5,d" }, // aa +{ RES_R, 5, REG_E, INV, 8, TYPE_NONE, "res 5,e" }, // ab +{ RES_R, 5, REG_H, INV, 8, TYPE_NONE, "res 5,h" }, // ac +{ RES_R, 5, REG_L, INV, 8, TYPE_NONE, "res 5,l" }, // ad +{ RES_MRR, 5, REG_HL, INV, 15, TYPE_NONE, "res 5,(hl)" }, // ae +{ RES_R, 5, REG_A, INV, 8, TYPE_NONE, "res 5,a" }, // af +{ RES_R, 6, REG_B, INV, 8, TYPE_NONE, "res 6,b" }, // b0 +{ RES_R, 6, REG_C, INV, 8, TYPE_NONE, "res 6,c" }, // b1 +{ RES_R, 6, REG_D, INV, 8, TYPE_NONE, "res 6,d" }, // b2 +{ RES_R, 6, REG_E, INV, 8, TYPE_NONE, "res 6,e" }, // b3 +{ RES_R, 6, REG_H, INV, 8, TYPE_NONE, "res 6,h" }, // b4 +{ RES_R, 6, REG_L, INV, 8, TYPE_NONE, "res 6,l" }, // b5 +{ RES_MRR, 6, REG_HL, INV, 15, TYPE_NONE, "res 6,(hl)" }, // b6 +{ RES_R, 6, REG_A, INV, 8, TYPE_NONE, "res 6,a" }, // b7 +{ RES_R, 7, REG_B, INV, 8, TYPE_NONE, "res 7,b" }, // b8 +{ RES_R, 7, REG_C, INV, 8, TYPE_NONE, "res 7,c" }, // b9 +{ RES_R, 7, REG_D, INV, 8, TYPE_NONE, "res 7,d" }, // ba +{ RES_R, 7, REG_E, INV, 8, TYPE_NONE, "res 7,e" }, // bb +{ RES_R, 7, REG_H, INV, 8, TYPE_NONE, "res 7,h" }, // bc +{ RES_R, 7, REG_L, INV, 8, TYPE_NONE, "res 7,l" }, // bd +{ RES_MRR, 7, REG_HL, INV, 15, TYPE_NONE, "res 7,(hl)" }, // be +{ RES_R, 7, REG_A, INV, 8, TYPE_NONE, "res 7,a" }, // bf +{ SET_R, 0, REG_B, INV, 8, TYPE_NONE, "set 0,b" }, // c0 +{ SET_R, 0, REG_C, INV, 8, TYPE_NONE, "set 0,c" }, // c1 +{ SET_R, 0, REG_D, INV, 8, TYPE_NONE, "set 0,d" }, // c2 +{ SET_R, 0, REG_E, INV, 8, TYPE_NONE, "set 0,e" }, // c3 +{ SET_R, 0, REG_H, INV, 8, TYPE_NONE, "set 0,h" }, // c4 +{ SET_R, 0, REG_L, INV, 8, TYPE_NONE, "set 0,l" }, // c5 +{ SET_MRR, 0, REG_HL, INV, 15, TYPE_NONE, "set 0,(hl)" }, // c6 +{ SET_R, 0, REG_A, INV, 8, TYPE_NONE, "set 0,a" }, // c7 +{ SET_R, 1, REG_B, INV, 8, TYPE_NONE, "set 1,b" }, // c8 +{ SET_R, 1, REG_C, INV, 8, TYPE_NONE, "set 1,c" }, // c9 +{ SET_R, 1, REG_D, INV, 8, TYPE_NONE, "set 1,d" }, // ca +{ SET_R, 1, REG_E, INV, 8, TYPE_NONE, "set 1,e" }, // cb +{ SET_R, 1, REG_H, INV, 8, TYPE_NONE, "set 1,h" }, // cc +{ SET_R, 1, REG_L, INV, 8, TYPE_NONE, "set 1,l" }, // cd +{ SET_MRR, 1, REG_HL, INV, 15, TYPE_NONE, "set 1,(hl)" }, // ce +{ SET_R, 1, REG_A, INV, 8, TYPE_NONE, "set 1,a" }, // cf +{ SET_R, 2, REG_B, INV, 8, TYPE_NONE, "set 2,b" }, // d0 +{ SET_R, 2, REG_C, INV, 8, TYPE_NONE, "set 2,c" }, // d1 +{ SET_R, 2, REG_D, INV, 8, TYPE_NONE, "set 2,d" }, // d2 +{ SET_R, 2, REG_E, INV, 8, TYPE_NONE, "set 2,e" }, // d3 +{ SET_R, 2, REG_H, INV, 8, TYPE_NONE, "set 2,h" }, // d4 +{ SET_R, 2, REG_L, INV, 8, TYPE_NONE, "set 2,l" }, // d5 +{ SET_MRR, 2, REG_HL, INV, 15, TYPE_NONE, "set 2,(hl)" }, // d6 +{ SET_R, 2, REG_A, INV, 8, TYPE_NONE, "set 2,a" }, // d7 +{ SET_R, 3, REG_B, INV, 8, TYPE_NONE, "set 3,b" }, // d8 +{ SET_R, 3, REG_C, INV, 8, TYPE_NONE, "set 3,c" }, // d9 +{ SET_R, 3, REG_D, INV, 8, TYPE_NONE, "set 3,d" }, // da +{ SET_R, 3, REG_E, INV, 8, TYPE_NONE, "set 3,e" }, // db +{ SET_R, 3, REG_H, INV, 8, TYPE_NONE, "set 3,h" }, // dc +{ SET_R, 3, REG_L, INV, 8, TYPE_NONE, "set 3,l" }, // dd +{ SET_MRR, 3, REG_HL, INV, 15, TYPE_NONE, "set 3,(hl)" }, // de +{ SET_R, 3, REG_A, INV, 8, TYPE_NONE, "set 3,a" }, // df +{ SET_R, 4, REG_B, INV, 8, TYPE_NONE, "set 4,b" }, // e0 +{ SET_R, 4, REG_C, INV, 8, TYPE_NONE, "set 4,c" }, // e1 +{ SET_R, 4, REG_D, INV, 8, TYPE_NONE, "set 4,d" }, // e2 +{ SET_R, 4, REG_E, INV, 8, TYPE_NONE, "set 4,e" }, // e3 +{ SET_R, 4, REG_H, INV, 8, TYPE_NONE, "set 4,h" }, // e4 +{ SET_R, 4, REG_L, INV, 8, TYPE_NONE, "set 4,l" }, // e5 +{ SET_MRR, 4, REG_HL, INV, 15, TYPE_NONE, "set 4,(hl)" }, // e6 +{ SET_R, 4, REG_A, INV, 8, TYPE_NONE, "set 4,a" }, // e7 +{ SET_R, 5, REG_B, INV, 8, TYPE_NONE, "set 5,b" }, // e8 +{ SET_R, 5, REG_C, INV, 8, TYPE_NONE, "set 5,c" }, // e9 +{ SET_R, 5, REG_D, INV, 8, TYPE_NONE, "set 5,d" }, // ea +{ SET_R, 5, REG_E, INV, 8, TYPE_NONE, "set 5,e" }, // eb +{ SET_R, 5, REG_H, INV, 8, TYPE_NONE, "set 5,h" }, // ec +{ SET_R, 5, REG_L, INV, 8, TYPE_NONE, "set 5,l" }, // ed +{ SET_MRR, 5, REG_HL, INV, 15, TYPE_NONE, "set 5,(hl)" }, // ee +{ SET_R, 5, REG_A, INV, 8, TYPE_NONE, "set 5,a" }, // ef +{ SET_R, 6, REG_B, INV, 8, TYPE_NONE, "set 6,b" }, // f0 +{ SET_R, 6, REG_C, INV, 8, TYPE_NONE, "set 6,c" }, // f1 +{ SET_R, 6, REG_D, INV, 8, TYPE_NONE, "set 6,d" }, // f2 +{ SET_R, 6, REG_E, INV, 8, TYPE_NONE, "set 6,e" }, // f3 +{ SET_R, 6, REG_H, INV, 8, TYPE_NONE, "set 6,h" }, // f4 +{ SET_R, 6, REG_L, INV, 8, TYPE_NONE, "set 6,l" }, // f5 +{ SET_MRR, 6, REG_HL, INV, 15, TYPE_NONE, "set 6,(hl)" }, // f6 +{ SET_R, 6, REG_A, INV, 8, TYPE_NONE, "set 6,a" }, // f7 +{ SET_R, 7, REG_B, INV, 8, TYPE_NONE, "set 7,b" }, // f8 +{ SET_R, 7, REG_C, INV, 8, TYPE_NONE, "set 7,c" }, // f9 +{ SET_R, 7, REG_D, INV, 8, TYPE_NONE, "set 7,d" }, // fa +{ SET_R, 7, REG_E, INV, 8, TYPE_NONE, "set 7,e" }, // fb +{ SET_R, 7, REG_H, INV, 8, TYPE_NONE, "set 7,h" }, // fc +{ SET_R, 7, REG_L, INV, 8, TYPE_NONE, "set 7,l" }, // fd +{ SET_MRR, 7, REG_HL, INV, 15, TYPE_NONE, "set 7,(hl)" }, // fe +{ SET_R, 7, REG_A, INV, 8, TYPE_NONE, "set 7,a" }, // ff diff --git a/tables/dd_prefix.tab b/tables/dd_prefix.tab new file mode 100644 index 0000000..ee8f878 --- /dev/null +++ b/tables/dd_prefix.tab @@ -0,0 +1,256 @@ +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 00 +{ LD_RR_NN, REG_BC, INV, INV, 14, TYPE_IMM_NN, "ld bc,%04hXh" }, // 01 +{ LD_MRR_R, REG_BC, REG_A, INV, 11, TYPE_NONE, "ld (bc),a" }, // 02 +{ INC_RR, REG_BC, INV, INV, 10, TYPE_NONE, "inc bc" }, // 03 +{ INC_R, REG_B, INV, INV, 8, TYPE_NONE, "inc b" }, // 04 +{ DEC_R, REG_B, INV, INV, 8, TYPE_NONE, "dec b" }, // 05 +{ LD_R_N, REG_B, INV, INV, 11, TYPE_IMM_N, "ld b,%02hhXh" }, // 06 +{ RLCA, INV, INV, INV, 8, TYPE_NONE, "rlca" }, // 07 +{ EX_RR_RR, REG_AF, REG_AFP, INV, 8, TYPE_NONE, "ex af,af'" }, // 08 +{ ADD_RR_RR, REG_IX, REG_BC, INV, 15, TYPE_NONE, "add ix,bc" }, // 09 +{ LD_R_MRR, REG_A, REG_BC, INV, 11, TYPE_NONE, "ld a,(bc)" }, // 0a +{ DEC_RR, REG_BC, INV, INV, 10, TYPE_NONE, "dec bc" }, // 0b +{ INC_R, REG_C, INV, INV, 8, TYPE_NONE, "inc c" }, // 0c +{ DEC_R, REG_C, INV, INV, 8, TYPE_NONE, "dec c" }, // 0d +{ LD_R_N, REG_C, INV, INV, 11, TYPE_IMM_N, "ld c,%02hhXh" }, // 0e +{ RRCA, INV, INV, INV, 8, TYPE_NONE, "rrca" }, // 0f +{ DJNZ, INV, INV, 12, 17, TYPE_DISP, "djnz (pc%c%Xh)" }, // 10 +{ LD_RR_NN, REG_DE, INV, INV, 14, TYPE_IMM_NN, "ld de,%04hXh" }, // 11 +{ LD_MRR_R, REG_DE, REG_A, INV, 11, TYPE_NONE, "ld (de),a" }, // 12 +{ INC_RR, REG_DE, INV, INV, 10, TYPE_NONE, "inc de" }, // 13 +{ INC_R, REG_D, INV, INV, 8, TYPE_NONE, "inc d" }, // 14 +{ DEC_R, REG_D, INV, INV, 8, TYPE_NONE, "dec d" }, // 15 +{ LD_R_N, REG_D, INV, INV, 11, TYPE_IMM_N, "ld d,%02hhXh" }, // 16 +{ RLA, INV, INV, INV, 8, TYPE_NONE, "rla" }, // 17 +{ JR, INV, INV, INV, 16, TYPE_DISP, "jr (pc%c%Xh)" }, // 18 +{ ADD_RR_RR, REG_IX, REG_DE, INV, 15, TYPE_NONE, "add ix,de" }, // 19 +{ LD_R_MRR, REG_A, REG_DE, INV, 11, TYPE_NONE, "ld a,(de)" }, // 1a +{ DEC_RR, REG_DE, INV, INV, 10, TYPE_NONE, "dec de" }, // 1b +{ INC_R, REG_E, INV, INV, 8, TYPE_NONE, "inc e" }, // 1c +{ DEC_R, REG_E, INV, INV, 8, TYPE_NONE, "dec e" }, // 1d +{ LD_R_N, REG_E, INV, INV, 11, TYPE_IMM_N, "ld e,%02hhXh" }, // 1e +{ RRA, INV, INV, INV, 8, TYPE_NONE, "rra" }, // 1f +{ JR_C, COND_NZ, INV, 11, 16, TYPE_DISP, "jr nz,(pc%c%Xh)" }, // 20 +{ LD_RR_NN, REG_IX, INV, INV, 14, TYPE_IMM_NN, "ld ix,%04hXh" }, // 21 +{ LD_MNN_RR, INV, REG_IX, INV, 16, TYPE_IMM_NN, "ld (%04hXh),ix" }, // 22 +{ INC_RR, REG_IX, INV, INV, 10, TYPE_NONE, "inc ix" }, // 23 +{ INC_R, REG_IXH, INV, INV, 10, TYPE_NONE, "inc ixh" }, // 24 +{ DEC_R, REG_IXH, INV, INV, 10, TYPE_NONE, "dec ixh" }, // 25 +{ LD_R_N, REG_IXH, INV, INV, 11, TYPE_IMM_N, "ld ixh,%02hhXh" }, // 26 +{ DAA, INV, INV, INV, 8, TYPE_NONE, "daa" }, // 27 +{ JR_C, COND_Z, INV, 11, 16, TYPE_DISP, "jr z,(pc%c%Xh)" }, // 28 +{ ADD_RR_RR, REG_IX, REG_IX, INV, 15, TYPE_NONE, "add ix,ix" }, // 29 +{ LD_RR_MNN, REG_IX, INV, INV, 14, TYPE_IMM_NN, "ld ix,(%04hXh)" }, // 2a +{ DEC_RR, REG_IX, INV, INV, 10, TYPE_NONE, "dec ix" }, // 2b +{ INC_R, REG_IXL, INV, INV, 10, TYPE_NONE, "inc ixl" }, // 2c +{ DEC_R, REG_IXL, INV, INV, 10, TYPE_NONE, "dec ixl" }, // 2d +{ LD_R_N, REG_IXL, INV, INV, 11, TYPE_IMM_N, "ld ixl,%02hhXh" }, // 2e +{ CPL, INV, INV, INV, 8, TYPE_NONE, "cpl" }, // 2f +{ JR_C, COND_NC, INV, 11, 16, TYPE_DISP, "jr nc,(pc%c%Xh)" }, // 30 +{ LD_RR_NN, REG_SP, INV, INV, 14, TYPE_IMM_NN, "ld sp,%04hXh" }, // 31 +{ LD_MNN_R, INV, REG_A, INV, 17, TYPE_IMM_NN, "ld (%04hXh),a" }, // 32 +{ INC_RR, REG_SP, INV, INV, 10, TYPE_NONE, "inc sp" }, // 33 +{ INC_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "inc (ix%c%02Xh)" }, // 34 +{ DEC_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "dec (ix%c%02Xh)" }, // 35 +{ LD_I_N, REG_IX, INV, INV, 19, TYPE_OFFSET_IMM_N, "ld (ix%c%02Xh),%02hhXh" }, // 36 +{ SCF, INV, INV, INV, 8, TYPE_NONE, "scf" }, // 37 +{ JR_C, COND_C, INV, 11, 16, TYPE_DISP, "jr c,(pc%c%Xh)" }, // 38 +{ ADD_RR_RR, REG_IX, REG_SP, INV, 15, TYPE_NONE, "add ix,sp" }, // 39 +{ LD_R_MNN, REG_A, INV, INV, 17, TYPE_IMM_NN, "ld a,(%04hXh)" }, // 3a +{ DEC_RR, REG_SP, INV, INV, 10, TYPE_NONE, "dec sp" }, // 3b +{ INC_R, REG_A, INV, INV, 8, TYPE_NONE, "inc a" }, // 3c +{ DEC_R, REG_A, INV, INV, 8, TYPE_NONE, "dec a" }, // 3d +{ LD_R_N, REG_A, INV, INV, 11, TYPE_IMM_N, "ld a,%02hhXh" }, // 3e +{ CCF, INV, INV, INV, 8, TYPE_NONE, "ccf" }, // 3f +{ LD_R_R, REG_B, REG_B, INV, 8, TYPE_NONE, "ld b,b" }, // 40 +{ LD_R_R, REG_B, REG_C, INV, 8, TYPE_NONE, "ld b,c" }, // 41 +{ LD_R_R, REG_B, REG_D, INV, 8, TYPE_NONE, "ld b,d" }, // 42 +{ LD_R_R, REG_B, REG_E, INV, 8, TYPE_NONE, "ld b,e" }, // 43 +{ LD_R_R, REG_B, REG_IXH, INV, 8, TYPE_NONE, "ld b,ixh" }, // 44 +{ LD_R_R, REG_B, REG_IXL, INV, 8, TYPE_NONE, "ld b,ixl" }, // 45 +{ LD_R_I, REG_B, REG_IX, INV, 19, TYPE_OFFSET, "ld b,(ix%c%02Xh)" }, // 46 +{ LD_R_R, REG_B, REG_A, INV, 8, TYPE_NONE, "ld b,a" }, // 47 +{ LD_R_R, REG_C, REG_B, INV, 8, TYPE_NONE, "ld c,b" }, // 48 +{ LD_R_R, REG_C, REG_C, INV, 8, TYPE_NONE, "ld c,c" }, // 49 +{ LD_R_R, REG_C, REG_D, INV, 8, TYPE_NONE, "ld c,d" }, // 4a +{ LD_R_R, REG_C, REG_E, INV, 8, TYPE_NONE, "ld c,e" }, // 4b +{ LD_R_R, REG_C, REG_IXH, INV, 8, TYPE_NONE, "ld c,ixh" }, // 4c +{ LD_R_R, REG_C, REG_IXL, INV, 8, TYPE_NONE, "ld c,ixl" }, // 4d +{ LD_R_I, REG_C, REG_IX, INV, 19, TYPE_OFFSET, "ld c,(ix%c%02Xh)" }, // 4e +{ LD_R_R, REG_C, REG_A, INV, 8, TYPE_NONE, "ld c,a" }, // 4f +{ LD_R_R, REG_D, REG_B, INV, 8, TYPE_NONE, "ld d,b" }, // 50 +{ LD_R_R, REG_D, REG_C, INV, 8, TYPE_NONE, "ld d,c" }, // 51 +{ LD_R_R, REG_D, REG_D, INV, 8, TYPE_NONE, "ld d,d" }, // 52 +{ LD_R_R, REG_D, REG_E, INV, 8, TYPE_NONE, "ld d,e" }, // 53 +{ LD_R_R, REG_D, REG_IXH, INV, 8, TYPE_NONE, "ld d,ixh" }, // 54 +{ LD_R_R, REG_D, REG_IXL, INV, 8, TYPE_NONE, "ld d,ixl" }, // 55 +{ LD_R_I, REG_D, REG_IX, INV, 19, TYPE_OFFSET, "ld d,(ix%c%02Xh)" }, // 56 +{ LD_R_R, REG_D, REG_A, INV, 8, TYPE_NONE, "ld d,a" }, // 57 +{ LD_R_R, REG_E, REG_B, INV, 8, TYPE_NONE, "ld e,b" }, // 58 +{ LD_R_R, REG_E, REG_C, INV, 8, TYPE_NONE, "ld e,c" }, // 59 +{ LD_R_R, REG_E, REG_D, INV, 8, TYPE_NONE, "ld e,d" }, // 5a +{ LD_R_R, REG_E, REG_E, INV, 8, TYPE_NONE, "ld e,e" }, // 5b +{ LD_R_R, REG_E, REG_IXH, INV, 8, TYPE_NONE, "ld e,ixh" }, // 5c +{ LD_R_R, REG_E, REG_IXL, INV, 8, TYPE_NONE, "ld e,ixl" }, // 5d +{ LD_R_I, REG_E, REG_IX, INV, 19, TYPE_OFFSET, "ld e,(ix%c%02Xh)" }, // 5e +{ LD_R_R, REG_E, REG_A, INV, 8, TYPE_NONE, "ld e,a" }, // 5f +{ LD_R_R, REG_IXH, REG_B, INV, 8, TYPE_NONE, "ld ixh,b" }, // 60 +{ LD_R_R, REG_IXH, REG_C, INV, 8, TYPE_NONE, "ld ixh,c" }, // 61 +{ LD_R_R, REG_IXH, REG_D, INV, 8, TYPE_NONE, "ld ixh,d" }, // 62 +{ LD_R_R, REG_IXH, REG_E, INV, 8, TYPE_NONE, "ld ixh,e" }, // 63 +{ LD_R_R, REG_IXH, REG_IXH, INV, 8, TYPE_NONE, "ld ixh,ixh" }, // 64 +{ LD_R_R, REG_IXH, REG_IXL, INV, 8, TYPE_NONE, "ld ixh,ixl" }, // 65 +{ LD_R_I, REG_H, REG_IX, INV, 19, TYPE_OFFSET, "ld h,(ix%c%02Xh)" }, // 66 +{ LD_R_R, REG_IXH, REG_A, INV, 8, TYPE_NONE, "ld ixh,a" }, // 67 +{ LD_R_R, REG_IXL, REG_B, INV, 8, TYPE_NONE, "ld ixl,b" }, // 68 +{ LD_R_R, REG_IXL, REG_C, INV, 8, TYPE_NONE, "ld ixl,c" }, // 69 +{ LD_R_R, REG_IXL, REG_D, INV, 8, TYPE_NONE, "ld ixl,d" }, // 6a +{ LD_R_R, REG_IXL, REG_E, INV, 8, TYPE_NONE, "ld ixl,e" }, // 6b +{ LD_R_R, REG_IXL, REG_IXH, INV, 8, TYPE_NONE, "ld ixl,ixh" }, // 6c +{ LD_R_R, REG_IXL, REG_IXL, INV, 8, TYPE_NONE, "ld ixl,ixl" }, // 6d +{ LD_R_I, REG_L, REG_IX, INV, 19, TYPE_OFFSET, "ld l,(ix%c%02Xh)" }, // 6e +{ LD_R_R, REG_IXL, REG_A, INV, 8, TYPE_NONE, "ld ixl,a" }, // 6f +{ LD_I_R, REG_IX, REG_B, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),b" }, // 70 +{ LD_I_R, REG_IX, REG_C, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),c" }, // 71 +{ LD_I_R, REG_IX, REG_D, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),d" }, // 72 +{ LD_I_R, REG_IX, REG_E, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),e" }, // 73 +{ LD_I_R, REG_IX, REG_H, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),h" }, // 74 +{ LD_I_R, REG_IX, REG_L, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),l" }, // 75 +{ HALT, INV, INV, INV, 8, TYPE_NONE, "halt" }, // 76 +{ LD_I_R, REG_IX, REG_A, INV, 19, TYPE_OFFSET, "ld (ix%c%02Xh),a" }, // 77 +{ LD_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "ld a,b" }, // 78 +{ LD_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "ld a,c" }, // 79 +{ LD_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "ld a,d" }, // 7a +{ LD_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "ld a,e" }, // 7b +{ LD_R_R, REG_A, REG_IXH, INV, 8, TYPE_NONE, "ld a,ixh" }, // 7c +{ LD_R_R, REG_A, REG_IXL, INV, 8, TYPE_NONE, "ld a,ixl" }, // 7d +{ LD_R_I, REG_A, REG_IX, INV, 19, TYPE_OFFSET, "ld a,(ix%c%02Xh)" }, // 7e +{ LD_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "ld a,a" }, // 7f +{ ADD_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "add a,b" }, // 80 +{ ADD_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "add a,c" }, // 81 +{ ADD_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "add a,d" }, // 82 +{ ADD_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "add a,e" }, // 83 +{ ADD_R_R, REG_A, REG_IXH, INV, 8, TYPE_NONE, "add a,ixh" }, // 84 +{ ADD_R_R, REG_A, REG_IXL, INV, 8, TYPE_NONE, "add a,ixl" }, // 85 +{ ADD_R_I, REG_A, REG_IX, INV, 19, TYPE_OFFSET, "add a,(ix%c%02Xh)" }, // 86 +{ ADD_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "add a,a" }, // 87 +{ ADC_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "adc a,b" }, // 88 +{ ADC_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "adc a,c" }, // 89 +{ ADC_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "adc a,d" }, // 8a +{ ADC_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "adc a,e" }, // 8b +{ ADC_R_R, REG_A, REG_IXH, INV, 8, TYPE_NONE, "adc a,ixh" }, // 8c +{ ADC_R_R, REG_A, REG_IXL, INV, 8, TYPE_NONE, "adc a,ixl" }, // 8d +{ ADC_R_I, REG_A, REG_IX, INV, 19, TYPE_OFFSET, "adc a,(ix%c%02Xh)" }, // 8e +{ ADC_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "adc a,a" }, // 8f +{ SUB_R, REG_B, INV, INV, 8, TYPE_NONE, "sub b" }, // 90 +{ SUB_R, REG_C, INV, INV, 8, TYPE_NONE, "sub c" }, // 91 +{ SUB_R, REG_D, INV, INV, 8, TYPE_NONE, "sub d" }, // 92 +{ SUB_R, REG_E, INV, INV, 8, TYPE_NONE, "sub e" }, // 93 +{ SUB_R, REG_IXH, INV, INV, 8, TYPE_NONE, "sub ixh" }, // 94 +{ SUB_R, REG_IXL, INV, INV, 8, TYPE_NONE, "sub ixl" }, // 95 +{ SUB_I, REG_IX, INV, INV, 19, TYPE_OFFSET, "sub (ix%c%02Xh)" }, // 96 +{ SUB_R, REG_A, INV, INV, 8, TYPE_NONE, "sub a" }, // 97 +{ SBC_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "sbc a,b" }, // 98 +{ SBC_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "sbc a,c" }, // 99 +{ SBC_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "sbc a,d" }, // 9a +{ SBC_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "sbc a,e" }, // 9b +{ SBC_R_R, REG_A, REG_IXH, INV, 8, TYPE_NONE, "sbc a,ixh" }, // 9c +{ SBC_R_R, REG_A, REG_IXL, INV, 8, TYPE_NONE, "sbc a,ixl" }, // 9d +{ SBC_R_I, REG_A, REG_IX, INV, 19, TYPE_OFFSET, "sbc a,(ix%c%02Xh)" }, // 9e +{ SBC_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "sbc a,a" }, // 9f +{ AND_R, REG_B, INV, INV, 8, TYPE_NONE, "and b" }, // a0 +{ AND_R, REG_C, INV, INV, 8, TYPE_NONE, "and c" }, // a1 +{ AND_R, REG_D, INV, INV, 8, TYPE_NONE, "and d" }, // a2 +{ AND_R, REG_E, INV, INV, 8, TYPE_NONE, "and e" }, // a3 +{ AND_R, REG_IXH, INV, INV, 8, TYPE_NONE, "and ixh" }, // a4 +{ AND_R, REG_IXL, INV, INV, 8, TYPE_NONE, "and ixl" }, // a5 +{ AND_I, REG_IX, INV, INV, 19, TYPE_OFFSET, "and (ix%c%02Xh)" }, // a6 +{ AND_R, REG_A, INV, INV, 8, TYPE_NONE, "and a" }, // a7 +{ XOR_R, REG_B, INV, INV, 8, TYPE_NONE, "xor b" }, // a8 +{ XOR_R, REG_C, INV, INV, 8, TYPE_NONE, "xor c" }, // a9 +{ XOR_R, REG_D, INV, INV, 8, TYPE_NONE, "xor d" }, // aa +{ XOR_R, REG_E, INV, INV, 8, TYPE_NONE, "xor e" }, // ab +{ XOR_R, REG_IXH, INV, INV, 8, TYPE_NONE, "xor ixh" }, // ac +{ XOR_R, REG_IXL, INV, INV, 8, TYPE_NONE, "xor ixl" }, // ad +{ XOR_I, REG_IX, INV, INV, 19, TYPE_OFFSET, "xor (ix%c%02Xh)" }, // ae +{ XOR_R, REG_A, INV, INV, 8, TYPE_NONE, "xor a" }, // af +{ OR_R, REG_B, INV, INV, 8, TYPE_NONE, "or b" }, // b0 +{ OR_R, REG_C, INV, INV, 8, TYPE_NONE, "or c" }, // b1 +{ OR_R, REG_D, INV, INV, 8, TYPE_NONE, "or d" }, // b2 +{ OR_R, REG_E, INV, INV, 8, TYPE_NONE, "or e" }, // b3 +{ OR_R, REG_IXH, INV, INV, 8, TYPE_NONE, "or ixh" }, // b4 +{ OR_R, REG_IXL, INV, INV, 8, TYPE_NONE, "or ixl" }, // b5 +{ OR_I, REG_IX, INV, INV, 19, TYPE_OFFSET, "or (ix%c%02Xh)" }, // b6 +{ OR_R, REG_A, INV, INV, 8, TYPE_NONE, "or a" }, // b7 +{ CP_R, REG_B, INV, INV, 8, TYPE_NONE, "cp b" }, // b8 +{ CP_R, REG_C, INV, INV, 8, TYPE_NONE, "cp c" }, // b9 +{ CP_R, REG_D, INV, INV, 8, TYPE_NONE, "cp d" }, // ba +{ CP_R, REG_E, INV, INV, 8, TYPE_NONE, "cp e" }, // bb +{ CP_R, REG_IXH, INV, INV, 8, TYPE_NONE, "cp ixh" }, // bc +{ CP_R, REG_IXL, INV, INV, 8, TYPE_NONE, "cp ixl" }, // bd +{ CP_I, REG_IX, INV, INV, 19, TYPE_OFFSET, "cp (ix%c%02Xh)" }, // be +{ CP_R, REG_A, INV, INV, 8, TYPE_NONE, "cp a" }, // bf +{ RET_C, COND_NZ, INV, 9, 15, TYPE_NONE, "ret nz" }, // c0 +{ POP_RR, REG_BC, INV, INV, 14, TYPE_NONE, "pop bc" }, // c1 +{ JP_C_MNN, COND_NZ, INV, INV, 14, TYPE_IMM_NN, "jp nz,(%04hXh)" }, // c2 +{ JP_MNN, INV, INV, INV, 14, TYPE_IMM_NN, "jp (%04hXh)" }, // c3 +{ CALL_C_MNN, COND_NZ, INV, 14, 21, TYPE_IMM_NN, "call nz,(%04hXh)" }, // c4 +{ PUSH_RR, REG_BC, INV, INV, 15, TYPE_NONE, "push bc" }, // c5 +{ ADD_R_N, REG_A, INV, INV, 11, TYPE_IMM_N, "add a,%02hhXh" }, // c6 +{ RST, 0x0, INV, INV, 15, TYPE_NONE, "rst 0h" }, // c7 +{ RET_C, COND_Z, INV, 9, 15, TYPE_NONE, "ret z" }, // c8 +{ RET, INV, INV, INV, 14, TYPE_NONE, "ret" }, // c9 +{ JP_C_MNN, COND_Z, INV, INV, 14, TYPE_IMM_NN, "jp z,(%04hXh)" }, // ca +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cb +{ CALL_C_MNN, COND_Z, INV, 14, 21, TYPE_IMM_NN, "call z,(%04hXh)" }, // cc +{ CALL_MNN, INV, INV, INV, 21, TYPE_IMM_NN, "call (%04hXh)" }, // cd +{ ADC_R_N, REG_A, INV, INV, 11, TYPE_IMM_N, "adc a,%02hhXh" }, // ce +{ RST, 0x8, INV, INV, 15, TYPE_NONE, "rst 8h" }, // cf +{ RET_C, COND_NC, INV, INV, 9, TYPE_NONE, "ret nc" }, // d0 +{ POP_RR, REG_DE, INV, INV, 14, TYPE_NONE, "pop de" }, // d1 +{ JP_C_MNN, COND_NC, INV, INV, 14, TYPE_IMM_NN, "jp nc,(%04hXh)" }, // d2 +{ OUT_MN_R, INV, REG_A, INV, 15, TYPE_IMM_N, "out (%02hhXh),a" }, // d3 +{ CALL_C_MNN, COND_NC, INV, 14, 21, TYPE_IMM_NN, "call nc,(%04hXh)" }, // d4 +{ PUSH_RR, REG_DE, INV, INV, 15, TYPE_NONE, "push de" }, // d5 +{ SUB_N, INV, INV, INV, 11, TYPE_IMM_N, "sub %02hhXh" }, // d6 +{ RST, 0x10, INV, INV, 15, TYPE_NONE, "rst 10h" }, // d7 +{ RET_C, COND_C, INV, INV, 9, TYPE_NONE, "ret c" }, // d8 +{ EXX, INV, INV, INV, 8, TYPE_NONE, "exx" }, // d9 +{ JP_C_MNN, COND_C, INV, INV, 14, TYPE_IMM_NN, "jp c,(%04hXh)" }, // da +{ IN_R_MN, REG_A, INV, INV, 15, TYPE_IMM_N, "in a,(%02hhXh)" }, // db +{ CALL_C_MNN, COND_C, INV, 14, 21, TYPE_IMM_NN, "call c,(%04hXh)" }, // dc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // dd +{ SBC_R_N, REG_A, INV, INV, 19, TYPE_IMM_N, "sbc a,%02hhXh" }, // de +{ RST, 0x18, INV, INV, 15, TYPE_NONE, "rst 18h" }, // df +{ RET_C, COND_PO, INV, 9, 15, TYPE_NONE, "ret po" }, // e0 +{ POP_RR, REG_IX, INV, INV, 14, TYPE_NONE, "pop ix" }, // e1 +{ JP_C_MNN, COND_PO, INV, INV, 14, TYPE_IMM_NN, "jp po,(%04hXh)" }, // e2 +{ EX_MRR_RR, REG_SP, REG_IX, INV, 23, TYPE_NONE, "ex (sp),ix" }, // e3 +{ CALL_C_MNN, COND_PO, INV, 14, 21, TYPE_IMM_NN, "call po,(%04hXh)" }, // e4 +{ PUSH_RR, REG_IX, INV, INV, 15, TYPE_NONE, "push ix" }, // e5 +{ AND_N, INV, INV, INV, 11, TYPE_IMM_N, "and %02hhXh" }, // e6 +{ RST, 0x20, INV, INV, 15, TYPE_NONE, "rst 20h" }, // e7 +{ RET_C, COND_PE, INV, 9, 15, TYPE_NONE, "ret pe" }, // e8 +{ JP_MRR, REG_IX, INV, INV, 8, TYPE_NONE, "jp (ix)" }, // e9 +{ JP_C_MNN, COND_PE, INV, INV, 14, TYPE_IMM_NN, "jp pe,(%04hXh)" }, // ea +{ EX_RR_RR, REG_DE, REG_HL, INV, 8, TYPE_NONE, "ex de,hl" }, // eb +{ CALL_C_MNN, COND_PE, INV, 14, 21, TYPE_IMM_NN, "call pe,(%04hXh)" }, // ec +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ed +{ XOR_N, INV, INV, INV, 11, TYPE_IMM_N, "xor %02hhXh" }, // ee +{ RST, 0x28, INV, INV, 15, TYPE_NONE, "rst 28h" }, // ef +{ RET_C, COND_P, INV, 9, 15, TYPE_NONE, "ret p" }, // f0 +{ POP_RR, REG_AF, INV, INV, 14, TYPE_NONE, "pop af" }, // f1 +{ JP_C_MNN, COND_P, INV, INV, 14, TYPE_IMM_NN, "jp p,(%04hXh)" }, // f2 +{ DI, INV, INV, INV, 8, TYPE_NONE, "di" }, // f3 +{ CALL_C_MNN, COND_P, INV, 14, 21, TYPE_IMM_NN, "call p,(%04hXh)" }, // f4 +{ PUSH_RR, REG_AF, INV, INV, 15, TYPE_NONE, "push af" }, // f5 +{ OR_N, INV, INV, INV, 11, TYPE_IMM_N, "or %02hhXh" }, // f6 +{ RST, 0x30, INV, INV, 15, TYPE_NONE, "rst 30h" }, // f7 +{ RET_C, COND_M, INV, 9, 15, TYPE_NONE, "ret m" }, // f8 +{ LD_RR_RR, REG_SP, REG_IX, INV, 10, TYPE_NONE, "ld sp,ix" }, // f9 +{ JP_C_MNN, COND_M, INV, INV, 14, TYPE_IMM_NN, "jp m,(%04hXh)" }, // fa +{ EI, INV, INV, INV, 8, TYPE_NONE, "ei" }, // fb +{ CALL_C_MNN, COND_M, INV, 14, 21, TYPE_IMM_NN, "call m,(%04hXh)" }, // fc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fd +{ CP_N, INV, INV, INV, 11, TYPE_IMM_N, "cp %02hhXh" }, // fe +{ RST, 0x38, INV, INV, 15, TYPE_NONE, "rst 38h" }, // ff diff --git a/tables/ddcb_prefix.tab b/tables/ddcb_prefix.tab new file mode 100644 index 0000000..61e4845 --- /dev/null +++ b/tables/ddcb_prefix.tab @@ -0,0 +1,256 @@ +{ RLC_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,rlc (ix%c%02Xh)" }, // 00 +{ RLC_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,rlc (ix%c%02Xh)" }, // 01 +{ RLC_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,rlc (ix%c%02Xh)" }, // 02 +{ RLC_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,rlc (ix%c%02Xh)" }, // 03 +{ RLC_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,rlc (ix%c%02Xh)" }, // 04 +{ RLC_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,rlc (ix%c%02Xh)" }, // 05 +{ RLC_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "rlc (ix%c%02Xh)" }, // 06 +{ RLC_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,rlc (ix%c%02Xh)" }, // 07 +{ RRC_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,rrc (ix%c%02Xh)" }, // 08 +{ RRC_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,rrc (ix%c%02Xh)" }, // 09 +{ RRC_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,rrc (ix%c%02Xh)" }, // 0a +{ RRC_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,rrc (ix%c%02Xh)" }, // 0b +{ RRC_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,rrc (ix%c%02Xh)" }, // 0c +{ RRC_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,rrc (ix%c%02Xh)" }, // 0d +{ RRC_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "rrc (ix%c%02Xh)" }, // 0e +{ RRC_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,rrc (ix%c%02Xh)" }, // 0f +{ RL_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,rl (ix%c%02Xh)" }, // 10 +{ RL_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,rl (ix%c%02Xh)" }, // 11 +{ RL_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,rl (ix%c%02Xh)" }, // 12 +{ RL_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,rl (ix%c%02Xh)" }, // 13 +{ RL_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,rl (ix%c%02Xh)" }, // 14 +{ RL_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,rl (ix%c%02Xh)" }, // 15 +{ RL_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "rl (ix%c%02Xh)" }, // 16 +{ RL_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,rl (ix%c%02Xh)" }, // 17 +{ RR_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,rr (ix%c%02Xh)" }, // 18 +{ RR_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,rr (ix%c%02Xh)" }, // 19 +{ RR_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,rr (ix%c%02Xh)" }, // 1a +{ RR_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,rr (ix%c%02Xh)" }, // 1b +{ RR_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,rr (ix%c%02Xh)" }, // 1c +{ RR_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,rr (ix%c%02Xh)" }, // 1d +{ RR_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "rr (ix%c%02Xh)" }, // 1e +{ RR_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,rr (ix%c%02Xh)" }, // 1f +{ SLA_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,sla (ix%c%02Xh)" }, // 20 +{ SLA_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,sla (ix%c%02Xh)" }, // 21 +{ SLA_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,sla (ix%c%02Xh)" }, // 22 +{ SLA_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,sla (ix%c%02Xh)" }, // 23 +{ SLA_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,sla (ix%c%02Xh)" }, // 24 +{ SLA_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,sla (ix%c%02Xh)" }, // 25 +{ SLA_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "sla (ix%c%02Xh)" }, // 26 +{ SLA_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,sla (ix%c%02Xh)" }, // 27 +{ SRA_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,sra (ix%c%02Xh)" }, // 28 +{ SRA_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,sra (ix%c%02Xh)" }, // 29 +{ SRA_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,sra (ix%c%02Xh)" }, // 2a +{ SRA_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,sra (ix%c%02Xh)" }, // 2b +{ SRA_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,sra (ix%c%02Xh)" }, // 2c +{ SRA_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,sra (ix%c%02Xh)" }, // 2d +{ SRA_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "sra (ix%c%02Xh)" }, // 2e +{ SRA_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,sra (ix%c%02Xh)" }, // 2f +{ SLL_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,sll (ix%c%02Xh)" }, // 30 +{ SLL_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,sll (ix%c%02Xh)" }, // 31 +{ SLL_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,sll (ix%c%02Xh)" }, // 32 +{ SLL_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,sll (ix%c%02Xh)" }, // 33 +{ SLL_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,sll (ix%c%02Xh)" }, // 34 +{ SLL_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,sll (ix%c%02Xh)" }, // 35 +{ SLL_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "sll (ix%c%02Xh)" }, // 36 +{ SLL_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,sll (ix%c%02Xh)" }, // 37 +{ SRL_I, REG_IX, INV, REG_B, 23, TYPE_OFFSET, "ld b,srl (ix%c%02Xh)" }, // 38 +{ SRL_I, REG_IX, INV, REG_C, 23, TYPE_OFFSET, "ld c,srl (ix%c%02Xh)" }, // 39 +{ SRL_I, REG_IX, INV, REG_D, 23, TYPE_OFFSET, "ld d,srl (ix%c%02Xh)" }, // 3a +{ SRL_I, REG_IX, INV, REG_E, 23, TYPE_OFFSET, "ld e,srl (ix%c%02Xh)" }, // 3b +{ SRL_I, REG_IX, INV, REG_H, 23, TYPE_OFFSET, "ld h,srl (ix%c%02Xh)" }, // 3c +{ SRL_I, REG_IX, INV, REG_L, 23, TYPE_OFFSET, "ld l,srl (ix%c%02Xh)" }, // 3d +{ SRL_I, REG_IX, INV, INV, 23, TYPE_OFFSET, "srl (ix%c%02Xh)" }, // 3e +{ SRL_I, REG_IX, INV, REG_A, 23, TYPE_OFFSET, "ld a,srl (ix%c%02Xh)" }, // 3f +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 40 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 41 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 42 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 43 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 44 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 45 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 46 +{ BIT_I, 0, REG_IX, INV, 20, TYPE_OFFSET, "bit 0,(ix%c%02Xh)" }, // 47 +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 48 +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 49 +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 4a +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 4b +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 4c +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 4d +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 4e +{ BIT_I, 1, REG_IX, INV, 20, TYPE_OFFSET, "bit 1,(ix%c%02Xh)" }, // 4f +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 50 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 51 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 52 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 53 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 54 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 55 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 56 +{ BIT_I, 2, REG_IX, INV, 20, TYPE_OFFSET, "bit 2,(ix%c%02Xh)" }, // 57 +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 58 +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 59 +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 5a +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 5b +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 5c +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 5d +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 5e +{ BIT_I, 3, REG_IX, INV, 20, TYPE_OFFSET, "bit 3,(ix%c%02Xh)" }, // 5f +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 60 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 61 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 62 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 63 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 64 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 65 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 66 +{ BIT_I, 4, REG_IX, INV, 20, TYPE_OFFSET, "bit 4,(ix%c%02Xh)" }, // 67 +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 68 +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 69 +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 6a +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 6b +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 6c +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 6d +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 6e +{ BIT_I, 5, REG_IX, INV, 20, TYPE_OFFSET, "bit 5,(ix%c%02Xh)" }, // 6f +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 70 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 71 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 72 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 73 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 74 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 75 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 76 +{ BIT_I, 6, REG_IX, INV, 20, TYPE_OFFSET, "bit 6,(ix%c%02Xh)" }, // 77 +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 78 +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 79 +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 7a +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 7b +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 7c +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 7d +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 7e +{ BIT_I, 7, REG_IX, INV, 20, TYPE_OFFSET, "bit 7,(ix%c%02Xh)" }, // 7f +{ RES_I, 0, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 0,(ix%c%02Xh)" }, // 80 +{ RES_I, 0, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 0,(ix%c%02Xh)" }, // 81 +{ RES_I, 0, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 0,(ix%c%02Xh)" }, // 82 +{ RES_I, 0, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 0,(ix%c%02Xh)" }, // 83 +{ RES_I, 0, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 0,(ix%c%02Xh)" }, // 84 +{ RES_I, 0, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 0,(ix%c%02Xh)" }, // 85 +{ RES_I, 0, REG_IX, INV, 23, TYPE_OFFSET, "res 0,(ix%c%02Xh)" }, // 86 +{ RES_I, 0, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 0,(ix%c%02Xh)" }, // 87 +{ RES_I, 1, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 1,(ix%c%02Xh)" }, // 88 +{ RES_I, 1, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 1,(ix%c%02Xh)" }, // 89 +{ RES_I, 1, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 1,(ix%c%02Xh)" }, // 8a +{ RES_I, 1, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 1,(ix%c%02Xh)" }, // 8b +{ RES_I, 1, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 1,(ix%c%02Xh)" }, // 8c +{ RES_I, 1, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 1,(ix%c%02Xh)" }, // 8d +{ RES_I, 1, REG_IX, INV, 23, TYPE_OFFSET, "res 1,(ix%c%02Xh)" }, // 8e +{ RES_I, 1, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 1,(ix%c%02Xh)" }, // 8f +{ RES_I, 2, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 2,(ix%c%02Xh)" }, // 90 +{ RES_I, 2, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 2,(ix%c%02Xh)" }, // 91 +{ RES_I, 2, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 2,(ix%c%02Xh)" }, // 92 +{ RES_I, 2, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 2,(ix%c%02Xh)" }, // 93 +{ RES_I, 2, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 2,(ix%c%02Xh)" }, // 94 +{ RES_I, 2, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 2,(ix%c%02Xh)" }, // 95 +{ RES_I, 2, REG_IX, INV, 23, TYPE_OFFSET, "res 2,(ix%c%02Xh)" }, // 96 +{ RES_I, 2, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 2,(ix%c%02Xh)" }, // 97 +{ RES_I, 3, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 3,(ix%c%02Xh)" }, // 98 +{ RES_I, 3, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 3,(ix%c%02Xh)" }, // 99 +{ RES_I, 3, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 3,(ix%c%02Xh)" }, // 9a +{ RES_I, 3, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 3,(ix%c%02Xh)" }, // 9b +{ RES_I, 3, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 3,(ix%c%02Xh)" }, // 9c +{ RES_I, 3, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 3,(ix%c%02Xh)" }, // 9d +{ RES_I, 3, REG_IX, INV, 23, TYPE_OFFSET, "res 3,(ix%c%02Xh)" }, // 9e +{ RES_I, 3, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 3,(ix%c%02Xh)" }, // 9f +{ RES_I, 4, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 4,(ix%c%02Xh)" }, // a0 +{ RES_I, 4, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 4,(ix%c%02Xh)" }, // a1 +{ RES_I, 4, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 4,(ix%c%02Xh)" }, // a2 +{ RES_I, 4, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 4,(ix%c%02Xh)" }, // a3 +{ RES_I, 4, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 4,(ix%c%02Xh)" }, // a4 +{ RES_I, 4, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 4,(ix%c%02Xh)" }, // a5 +{ RES_I, 4, REG_IX, INV, 23, TYPE_OFFSET, "res 4,(ix%c%02Xh)" }, // a6 +{ RES_I, 4, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 4,(ix%c%02Xh)" }, // a7 +{ RES_I, 5, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 5,(ix%c%02Xh)" }, // a8 +{ RES_I, 5, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 5,(ix%c%02Xh)" }, // a9 +{ RES_I, 5, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 5,(ix%c%02Xh)" }, // aa +{ RES_I, 5, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 5,(ix%c%02Xh)" }, // ab +{ RES_I, 5, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 5,(ix%c%02Xh)" }, // ac +{ RES_I, 5, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 5,(ix%c%02Xh)" }, // ad +{ RES_I, 5, REG_IX, INV, 23, TYPE_OFFSET, "res 5,(ix%c%02Xh)" }, // ae +{ RES_I, 5, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 5,(ix%c%02Xh)" }, // af +{ RES_I, 6, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 6,(ix%c%02Xh)" }, // b0 +{ RES_I, 6, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 6,(ix%c%02Xh)" }, // b1 +{ RES_I, 6, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 6,(ix%c%02Xh)" }, // b2 +{ RES_I, 6, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 6,(ix%c%02Xh)" }, // b3 +{ RES_I, 6, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 6,(ix%c%02Xh)" }, // b4 +{ RES_I, 6, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 6,(ix%c%02Xh)" }, // b5 +{ RES_I, 6, REG_IX, INV, 23, TYPE_OFFSET, "res 6,(ix%c%02Xh)" }, // b6 +{ RES_I, 6, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 6,(ix%c%02Xh)" }, // b7 +{ RES_I, 7, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,res 7,(ix%c%02Xh)" }, // b8 +{ RES_I, 7, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,res 7,(ix%c%02Xh)" }, // b9 +{ RES_I, 7, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,res 7,(ix%c%02Xh)" }, // ba +{ RES_I, 7, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,res 7,(ix%c%02Xh)" }, // bb +{ RES_I, 7, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,res 7,(ix%c%02Xh)" }, // bc +{ RES_I, 7, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,res 7,(ix%c%02Xh)" }, // bd +{ RES_I, 7, REG_IX, INV, 23, TYPE_OFFSET, "res 7,(ix%c%02Xh)" }, // be +{ RES_I, 7, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,res 7,(ix%c%02Xh)" }, // bf +{ SET_I, 0, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 0,(ix%c%02Xh)" }, // c0 +{ SET_I, 0, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 0,(ix%c%02Xh)" }, // c1 +{ SET_I, 0, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 0,(ix%c%02Xh)" }, // c2 +{ SET_I, 0, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 0,(ix%c%02Xh)" }, // c3 +{ SET_I, 0, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 0,(ix%c%02Xh)" }, // c4 +{ SET_I, 0, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 0,(ix%c%02Xh)" }, // c5 +{ SET_I, 0, REG_IX, INV, 23, TYPE_OFFSET, "set 0,(ix%c%02Xh)" }, // c6 +{ SET_I, 0, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 0,(ix%c%02Xh)" }, // c7 +{ SET_I, 1, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 1,(ix%c%02Xh)" }, // c8 +{ SET_I, 1, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 1,(ix%c%02Xh)" }, // c9 +{ SET_I, 1, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 1,(ix%c%02Xh)" }, // ca +{ SET_I, 1, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 1,(ix%c%02Xh)" }, // cb +{ SET_I, 1, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 1,(ix%c%02Xh)" }, // cc +{ SET_I, 1, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 1,(ix%c%02Xh)" }, // cd +{ SET_I, 1, REG_IX, INV, 23, TYPE_OFFSET, "set 1,(ix%c%02Xh)" }, // ce +{ SET_I, 1, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 1,(ix%c%02Xh)" }, // cf +{ SET_I, 2, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 2,(ix%c%02Xh)" }, // d0 +{ SET_I, 2, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 2,(ix%c%02Xh)" }, // d1 +{ SET_I, 2, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 2,(ix%c%02Xh)" }, // d2 +{ SET_I, 2, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 2,(ix%c%02Xh)" }, // d3 +{ SET_I, 2, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 2,(ix%c%02Xh)" }, // d4 +{ SET_I, 2, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 2,(ix%c%02Xh)" }, // d5 +{ SET_I, 2, REG_IX, INV, 23, TYPE_OFFSET, "set 2,(ix%c%02Xh)" }, // d6 +{ SET_I, 2, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 2,(ix%c%02Xh)" }, // d7 +{ SET_I, 3, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 3,(ix%c%02Xh)" }, // d8 +{ SET_I, 3, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 3,(ix%c%02Xh)" }, // d9 +{ SET_I, 3, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 3,(ix%c%02Xh)" }, // da +{ SET_I, 3, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 3,(ix%c%02Xh)" }, // db +{ SET_I, 3, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 3,(ix%c%02Xh)" }, // dc +{ SET_I, 3, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 3,(ix%c%02Xh)" }, // dd +{ SET_I, 3, REG_IX, INV, 23, TYPE_OFFSET, "set 3,(ix%c%02Xh)" }, // de +{ SET_I, 3, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 3,(ix%c%02Xh)" }, // df +{ SET_I, 4, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 4,(ix%c%02Xh)" }, // e0 +{ SET_I, 4, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 4,(ix%c%02Xh)" }, // e1 +{ SET_I, 4, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 4,(ix%c%02Xh)" }, // e2 +{ SET_I, 4, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 4,(ix%c%02Xh)" }, // e3 +{ SET_I, 4, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 4,(ix%c%02Xh)" }, // e4 +{ SET_I, 4, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 4,(ix%c%02Xh)" }, // e5 +{ SET_I, 4, REG_IX, INV, 23, TYPE_OFFSET, "set 4,(ix%c%02Xh)" }, // e6 +{ SET_I, 4, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 4,(ix%c%02Xh)" }, // e7 +{ SET_I, 5, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 5,(ix%c%02Xh)" }, // e8 +{ SET_I, 5, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 5,(ix%c%02Xh)" }, // e9 +{ SET_I, 5, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 5,(ix%c%02Xh)" }, // ea +{ SET_I, 5, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 5,(ix%c%02Xh)" }, // eb +{ SET_I, 5, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 5,(ix%c%02Xh)" }, // ec +{ SET_I, 5, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 5,(ix%c%02Xh)" }, // ed +{ SET_I, 5, REG_IX, INV, 23, TYPE_OFFSET, "set 5,(ix%c%02Xh)" }, // ee +{ SET_I, 5, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 5,(ix%c%02Xh)" }, // ef +{ SET_I, 6, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 6,(ix%c%02Xh)" }, // f0 +{ SET_I, 6, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 6,(ix%c%02Xh)" }, // f1 +{ SET_I, 6, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 6,(ix%c%02Xh)" }, // f2 +{ SET_I, 6, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 6,(ix%c%02Xh)" }, // f3 +{ SET_I, 6, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 6,(ix%c%02Xh)" }, // f4 +{ SET_I, 6, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 6,(ix%c%02Xh)" }, // f5 +{ SET_I, 6, REG_IX, INV, 23, TYPE_OFFSET, "set 6,(ix%c%02Xh)" }, // f6 +{ SET_I, 6, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 6,(ix%c%02Xh)" }, // f7 +{ SET_I, 7, REG_IX, REG_B, 23, TYPE_OFFSET, "ld b,set 7,(ix%c%02Xh)" }, // f8 +{ SET_I, 7, REG_IX, REG_C, 23, TYPE_OFFSET, "ld c,set 7,(ix%c%02Xh)" }, // f9 +{ SET_I, 7, REG_IX, REG_D, 23, TYPE_OFFSET, "ld d,set 7,(ix%c%02Xh)" }, // fa +{ SET_I, 7, REG_IX, REG_E, 23, TYPE_OFFSET, "ld e,set 7,(ix%c%02Xh)" }, // fb +{ SET_I, 7, REG_IX, REG_H, 23, TYPE_OFFSET, "ld h,set 7,(ix%c%02Xh)" }, // fc +{ SET_I, 7, REG_IX, REG_L, 23, TYPE_OFFSET, "ld l,set 7,(ix%c%02Xh)" }, // fd +{ SET_I, 7, REG_IX, INV, 23, TYPE_OFFSET, "set 7,(ix%c%02Xh)" }, // fe +{ SET_I, 7, REG_IX, REG_A, 23, TYPE_OFFSET, "ld a,set 7,(ix%c%02Xh)" }, // ff diff --git a/tables/ed_prefix.tab b/tables/ed_prefix.tab new file mode 100644 index 0000000..2b71cbe --- /dev/null +++ b/tables/ed_prefix.tab @@ -0,0 +1,256 @@ +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 00 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 01 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 02 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 03 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 04 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 05 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 06 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 07 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 08 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 09 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 0a +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 0b +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 0c +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 0d +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 0e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 0f +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 10 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 11 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 12 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 13 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 14 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 15 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 16 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 17 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 18 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 19 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 1a +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 1b +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 1c +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 1d +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 1e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 1f +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 20 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 21 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 22 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 23 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 24 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 25 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 26 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 27 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 28 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 29 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 2a +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 2b +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 2c +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 2d +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 2e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 2f +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 30 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 31 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 32 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 33 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 34 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 35 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 36 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 37 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 38 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 39 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 3a +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 3b +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 3c +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 3d +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 3e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 3f +{ IN_R_R, REG_B, REG_C, INV, 12, TYPE_NONE, "in b,(c)" }, // 40 +{ OUT_R_R, REG_C, REG_B, INV, 12, TYPE_NONE, "out (c),b" }, // 41 +{ SBC_RR_RR, REG_HL, REG_BC, INV, 15, TYPE_NONE, "sbc hl,bc" }, // 42 +{ LD_MNN_RR, INV, REG_BC, INV, 20, TYPE_IMM_NN, "ld (%04hXh),bc" }, // 43 +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 44 +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 45 +{ IM, 0, INV, INV, 8, TYPE_NONE, "im 0" }, // 46 +{ LD_R_R, REG_I, REG_A, INV, 9, TYPE_NONE, "ld i,a" }, // 47 +{ IN_R_R, REG_C, REG_C, INV, 12, TYPE_NONE, "in c,(c)" }, // 48 +{ OUT_R_R, REG_C, REG_C, INV, 12, TYPE_NONE, "out (c),c" }, // 49 +{ ADC_RR_RR, REG_HL, REG_BC, INV, 15, TYPE_NONE, "adc hl,bc" }, // 4a +{ LD_RR_MNN, REG_BC, INV, INV, 20, TYPE_IMM_NN, "ld bc,(%04hXh)" }, // 4b +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 4c +{ RETI, INV, INV, INV, 14, TYPE_NONE, "reti" }, // 4d +{ IM, 0, INV, INV, 8, TYPE_NONE, "im 0" }, // 4e +{ LD_R_R, REG_R, REG_A, INV, 9, TYPE_NONE, "ld r,a" }, // 4f +{ IN_R_R, REG_D, REG_C, INV, 12, TYPE_NONE, "in d,(c)" }, // 50 +{ OUT_R_R, REG_C, REG_D, INV, 12, TYPE_NONE, "out (c),d" }, // 51 +{ SBC_RR_RR, REG_HL, REG_DE, INV, 15, TYPE_NONE, "sbc hl,de" }, // 52 +{ LD_MNN_RR, INV, REG_DE, INV, 20, TYPE_IMM_NN, "ld (%04hXh),de" }, // 53 +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 54 +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 55 +{ IM, 1, INV, INV, 8, TYPE_NONE, "im 1" }, // 56 +{ LD_R_R, REG_A, REG_I, INV, 9, TYPE_NONE, "ld a,i" }, // 57 +{ IN_R_R, REG_E, REG_C, INV, 12, TYPE_NONE, "in e,(c)" }, // 58 +{ OUT_R_R, REG_C, REG_E, INV, 12, TYPE_NONE, "out (c),e" }, // 59 +{ ADC_RR_RR, REG_HL, REG_DE, INV, 15, TYPE_NONE, "adc hl,de" }, // 5a +{ LD_RR_MNN, REG_DE, INV, INV, 20, TYPE_IMM_NN, "ld de,(%04hXh)" }, // 5b +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 5c +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 5d +{ IM, 2, INV, INV, 8, TYPE_NONE, "im 2" }, // 5e +{ LD_R_R, REG_A, REG_R, INV, 9, TYPE_NONE, "ld a,r" }, // 5f +{ IN_R_R, REG_H, REG_C, INV, 12, TYPE_NONE, "in h,(c)" }, // 60 +{ OUT_R_R, REG_C, REG_H, INV, 12, TYPE_NONE, "out (c),h" }, // 61 +{ SBC_RR_RR, REG_HL, REG_HL, INV, 15, TYPE_NONE, "sbc hl,hl" }, // 62 +{ LD_MNN_RR, INV, REG_HL, INV, 16, TYPE_IMM_NN, "ld (%04hXh),hl" }, // 63 +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 64 +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 65 +{ IM, 0, INV, INV, 8, TYPE_NONE, "im 0" }, // 66 +{ RRD, INV, INV, INV, 18, TYPE_NONE, "rrd" }, // 67 +{ IN_R_R, REG_L, REG_C, INV, 12, TYPE_NONE, "in l,(c)" }, // 68 +{ OUT_R_R, REG_C, REG_L, INV, 12, TYPE_NONE, "out (c),l" }, // 69 +{ ADC_RR_RR, REG_HL, REG_HL, INV, 15, TYPE_NONE, "adc hl,hl" }, // 6a +{ LD_RR_MNN, REG_HL, INV, INV, 16, TYPE_IMM_NN, "ld hl,(%04hXh)" }, // 6b +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 6c +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 6d +{ IM, 0, INV, INV, 8, TYPE_NONE, "im 0" }, // 6e +{ RLD, INV, INV, INV, 18, TYPE_NONE, "rld" }, // 6f +{ IN_R_R, REG_F, REG_C, INV, 12, TYPE_NONE, "in f,(c)" }, // 70 +{ OUT_R, REG_C, 0, INV, 12, TYPE_NONE, "out (c),0" }, // 71 +{ SBC_RR_RR, REG_HL, REG_SP, INV, 15, TYPE_NONE, "sbc hl,sp" }, // 72 +{ LD_MNN_RR, INV, REG_SP, INV, 20, TYPE_IMM_NN, "ld (%04hXh),sp" }, // 73 +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 74 +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 75 +{ IM, 1, INV, INV, 8, TYPE_NONE, "im 1" }, // 76 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 77 +{ IN_R_R, REG_A, REG_C, INV, 12, TYPE_NONE, "in a,(c)" }, // 78 +{ OUT_R_R, REG_C, REG_A, INV, 12, TYPE_NONE, "out (c),a" }, // 79 +{ ADC_RR_RR, REG_HL, REG_SP, INV, 15, TYPE_NONE, "adc hl,sp" }, // 7a +{ LD_RR_MNN, REG_SP, INV, INV, 20, TYPE_IMM_NN, "ld sp,(%04hXh)" }, // 7b +{ NEG, INV, INV, INV, 8, TYPE_NONE, "neg" }, // 7c +{ RETN, INV, INV, INV, 14, TYPE_NONE, "retn" }, // 7d +{ IM, 2, INV, INV, 8, TYPE_NONE, "im 2" }, // 7e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 7f +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 80 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 81 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 82 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 83 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 84 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 85 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 86 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 87 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 88 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 89 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 8a +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 8b +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 8c +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 8d +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 8e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 8f +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 90 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 91 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 92 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 93 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 94 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 95 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 96 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 97 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 98 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 99 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 9a +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 9b +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 9c +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 9d +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 9e +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 9f +{ LDI, INV, INV, INV, 16, TYPE_NONE, "ldi" }, // a0 +{ CPI, INV, INV, INV, 16, TYPE_NONE, "cpi" }, // a1 +{ INI, INV, INV, INV, 16, TYPE_NONE, "ini" }, // a2 +{ OUTI, INV, INV, INV, 16, TYPE_NONE, "outi" }, // a3 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // a4 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // a5 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // a6 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // a7 +{ LDD, INV, INV, INV, 16, TYPE_NONE, "ldd" }, // a8 +{ CPD, INV, INV, INV, 16, TYPE_NONE, "cpd" }, // a9 +{ IND, INV, INV, INV, 16, TYPE_NONE, "ind" }, // aa +{ OUTD, INV, INV, INV, 16, TYPE_NONE, "outd" }, // ab +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ac +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ad +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ae +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // af +{ LDIR, INV, INV, 16, 21, TYPE_NONE, "ldir" }, // b0 +{ CPIR, INV, INV, 16, 21, TYPE_NONE, "cpir" }, // b1 +{ INIR, INV, INV, 16, 21, TYPE_NONE, "inir" }, // b2 +{ OTIR, INV, INV, 16, 21, TYPE_NONE, "otir" }, // b3 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // b4 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // b5 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // b6 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // b7 +{ LDDR, INV, INV, 16, 21, TYPE_NONE, "lddr" }, // b8 +{ CPDR, INV, INV, 16, 21, TYPE_NONE, "cpdr" }, // b9 +{ INDR, INV, INV, 16, 21, TYPE_NONE, "indr" }, // ba +{ OTDR, INV, INV, 16, 21, TYPE_NONE, "otdr" }, // bb +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // bc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // bd +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // be +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // bf +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c0 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c1 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c2 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c3 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c4 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c5 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c6 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c7 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c8 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // c9 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ca +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cb +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cd +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ce +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cf +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d0 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d1 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d2 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d3 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d4 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d5 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d6 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d7 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d8 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // d9 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // da +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // db +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // dc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // dd +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // de +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // df +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e0 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e1 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e2 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e3 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e4 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e5 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e6 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e7 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e8 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // e9 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ea +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // eb +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ec +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ed +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ee +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ef +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f0 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f1 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f2 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f3 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f4 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f5 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f6 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f7 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f8 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // f9 +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fa +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fb +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fd +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fe +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ff diff --git a/tables/fd_prefix.tab b/tables/fd_prefix.tab new file mode 100644 index 0000000..000872b --- /dev/null +++ b/tables/fd_prefix.tab @@ -0,0 +1,256 @@ +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // 00 +{ LD_RR_NN, REG_BC, INV, INV, 14, TYPE_IMM_NN, "ld bc,%04hXh" }, // 01 +{ LD_MRR_R, REG_BC, REG_A, INV, 11, TYPE_NONE, "ld (bc),a" }, // 02 +{ INC_RR, REG_BC, INV, INV, 10, TYPE_NONE, "inc bc" }, // 03 +{ INC_R, REG_B, INV, INV, 8, TYPE_NONE, "inc b" }, // 04 +{ DEC_R, REG_B, INV, INV, 8, TYPE_NONE, "dec b" }, // 05 +{ LD_R_N, REG_B, INV, INV, 11, TYPE_IMM_N, "ld b,%02hhXh" }, // 06 +{ RLCA, INV, INV, INV, 8, TYPE_NONE, "rlca" }, // 07 +{ EX_RR_RR, REG_AF, REG_AFP, INV, 8, TYPE_NONE, "ex af,af'" }, // 08 +{ ADD_RR_RR, REG_IY, REG_BC, INV, 15, TYPE_NONE, "add iy,bc" }, // 09 +{ LD_R_MRR, REG_A, REG_BC, INV, 11, TYPE_NONE, "ld a,(bc)" }, // 0a +{ DEC_RR, REG_BC, INV, INV, 10, TYPE_NONE, "dec bc" }, // 0b +{ INC_R, REG_C, INV, INV, 8, TYPE_NONE, "inc c" }, // 0c +{ DEC_R, REG_C, INV, INV, 8, TYPE_NONE, "dec c" }, // 0d +{ LD_R_N, REG_C, INV, INV, 11, TYPE_IMM_N, "ld c,%02hhXh" }, // 0e +{ RRCA, INV, INV, INV, 8, TYPE_NONE, "rrca" }, // 0f +{ DJNZ, INV, INV, 12, 17, TYPE_DISP, "djnz (pc%c%Xh)" }, // 10 +{ LD_RR_NN, REG_DE, INV, INV, 14, TYPE_IMM_NN, "ld de,%04hXh" }, // 11 +{ LD_MRR_R, REG_DE, REG_A, INV, 11, TYPE_NONE, "ld (de),a" }, // 12 +{ INC_RR, REG_DE, INV, INV, 10, TYPE_NONE, "inc de" }, // 13 +{ INC_R, REG_D, INV, INV, 8, TYPE_NONE, "inc d" }, // 14 +{ DEC_R, REG_D, INV, INV, 8, TYPE_NONE, "dec d" }, // 15 +{ LD_R_N, REG_D, INV, INV, 11, TYPE_IMM_N, "ld d,%02hhXh" }, // 16 +{ RLA, INV, INV, INV, 8, TYPE_NONE, "rla" }, // 17 +{ JR, INV, INV, INV, 16, TYPE_DISP, "jr (pc%c%Xh)" }, // 18 +{ ADD_RR_RR, REG_IY, REG_DE, INV, 15, TYPE_NONE, "add iy,de" }, // 19 +{ LD_R_MRR, REG_A, REG_DE, INV, 11, TYPE_NONE, "ld a,(de)" }, // 1a +{ DEC_RR, REG_DE, INV, INV, 10, TYPE_NONE, "dec de" }, // 1b +{ INC_R, REG_E, INV, INV, 8, TYPE_NONE, "inc e" }, // 1c +{ DEC_R, REG_E, INV, INV, 8, TYPE_NONE, "dec e" }, // 1d +{ LD_R_N, REG_E, INV, INV, 11, TYPE_IMM_N, "ld e,%02hhXh" }, // 1e +{ RRA, INV, INV, INV, 8, TYPE_NONE, "rra" }, // 1f +{ JR_C, COND_NZ, INV, 11, 16, TYPE_DISP, "jr nz,(pc%c%Xh)" }, // 20 +{ LD_RR_NN, REG_IY, INV, INV, 14, TYPE_IMM_NN, "ld iy,%04hXh" }, // 21 +{ LD_MNN_RR, INV, REG_IY, INV, 16, TYPE_IMM_NN, "ld (%04hXh),iy" }, // 22 +{ INC_RR, REG_IY, INV, INV, 10, TYPE_NONE, "inc iy" }, // 23 +{ INC_R, REG_IYH, INV, INV, 10, TYPE_NONE, "inc iyh" }, // 24 +{ DEC_R, REG_IYH, INV, INV, 10, TYPE_NONE, "dec iyh" }, // 25 +{ LD_R_N, REG_IYH, INV, INV, 11, TYPE_IMM_N, "ld iyh,%02hhXh" }, // 26 +{ DAA, INV, INV, INV, 8, TYPE_NONE, "daa" }, // 27 +{ JR_C, COND_Z, INV, 11, 16, TYPE_DISP, "jr z,(pc%c%Xh)" }, // 28 +{ ADD_RR_RR, REG_IY, REG_IY, INV, 15, TYPE_NONE, "add iy,iy" }, // 29 +{ LD_RR_MNN, REG_IY, INV, INV, 14, TYPE_IMM_NN, "ld iy,(%04hXh)" }, // 2a +{ DEC_RR, REG_IY, INV, INV, 10, TYPE_NONE, "dec iy" }, // 2b +{ INC_R, REG_IYL, INV, INV, 10, TYPE_NONE, "inc iyl" }, // 2c +{ DEC_R, REG_IYL, INV, INV, 10, TYPE_NONE, "dec iyl" }, // 2d +{ LD_R_N, REG_IYL, INV, INV, 11, TYPE_IMM_N, "ld iyl,%02hhXh" }, // 2e +{ CPL, INV, INV, INV, 8, TYPE_NONE, "cpl" }, // 2f +{ JR_C, COND_NC, INV, 11, 16, TYPE_DISP, "jr nc,(pc%c%Xh)" }, // 30 +{ LD_RR_NN, REG_SP, INV, INV, 14, TYPE_IMM_NN, "ld sp,%04hXh" }, // 31 +{ LD_MNN_R, INV, REG_A, INV, 17, TYPE_IMM_NN, "ld (%04hXh),a" }, // 32 +{ INC_RR, REG_SP, INV, INV, 10, TYPE_NONE, "inc sp" }, // 33 +{ INC_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "inc (iy%c%02Xh)" }, // 34 +{ DEC_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "dec (iy%c%02Xh)" }, // 35 +{ LD_I_N, REG_IY, INV, INV, 19, TYPE_OFFSET_IMM_N, "ld (iy%c%02Xh),%02hhXh" }, // 36 +{ SCF, INV, INV, INV, 8, TYPE_NONE, "scf" }, // 37 +{ JR_C, COND_C, INV, 11, 16, TYPE_DISP, "jr c,(pc%c%Xh)" }, // 38 +{ ADD_RR_RR, REG_IY, REG_SP, INV, 15, TYPE_NONE, "add iy,sp" }, // 39 +{ LD_R_MNN, REG_A, INV, INV, 17, TYPE_IMM_NN, "ld a,(%04hXh)" }, // 3a +{ DEC_RR, REG_SP, INV, INV, 10, TYPE_NONE, "dec sp" }, // 3b +{ INC_R, REG_A, INV, INV, 8, TYPE_NONE, "inc a" }, // 3c +{ DEC_R, REG_A, INV, INV, 8, TYPE_NONE, "dec a" }, // 3d +{ LD_R_N, REG_A, INV, INV, 11, TYPE_IMM_N, "ld a,%02hhXh" }, // 3e +{ CCF, INV, INV, INV, 8, TYPE_NONE, "ccf" }, // 3f +{ LD_R_R, REG_B, REG_B, INV, 8, TYPE_NONE, "ld b,b" }, // 40 +{ LD_R_R, REG_B, REG_C, INV, 8, TYPE_NONE, "ld b,c" }, // 41 +{ LD_R_R, REG_B, REG_D, INV, 8, TYPE_NONE, "ld b,d" }, // 42 +{ LD_R_R, REG_B, REG_E, INV, 8, TYPE_NONE, "ld b,e" }, // 43 +{ LD_R_R, REG_B, REG_IYH, INV, 8, TYPE_NONE, "ld b,iyh" }, // 44 +{ LD_R_R, REG_B, REG_IYL, INV, 8, TYPE_NONE, "ld b,iyl" }, // 45 +{ LD_R_I, REG_B, REG_IY, INV, 19, TYPE_OFFSET, "ld b,(iy%c%02Xh)" }, // 46 +{ LD_R_R, REG_B, REG_A, INV, 8, TYPE_NONE, "ld b,a" }, // 47 +{ LD_R_R, REG_C, REG_B, INV, 8, TYPE_NONE, "ld c,b" }, // 48 +{ LD_R_R, REG_C, REG_C, INV, 8, TYPE_NONE, "ld c,c" }, // 49 +{ LD_R_R, REG_C, REG_D, INV, 8, TYPE_NONE, "ld c,d" }, // 4a +{ LD_R_R, REG_C, REG_E, INV, 8, TYPE_NONE, "ld c,e" }, // 4b +{ LD_R_R, REG_C, REG_IYH, INV, 8, TYPE_NONE, "ld c,iyh" }, // 4c +{ LD_R_R, REG_C, REG_IYL, INV, 8, TYPE_NONE, "ld c,iyl" }, // 4d +{ LD_R_I, REG_C, REG_IY, INV, 19, TYPE_OFFSET, "ld c,(iy%c%02Xh)" }, // 4e +{ LD_R_R, REG_C, REG_A, INV, 8, TYPE_NONE, "ld c,a" }, // 4f +{ LD_R_R, REG_D, REG_B, INV, 8, TYPE_NONE, "ld d,b" }, // 50 +{ LD_R_R, REG_D, REG_C, INV, 8, TYPE_NONE, "ld d,c" }, // 51 +{ LD_R_R, REG_D, REG_D, INV, 8, TYPE_NONE, "ld d,d" }, // 52 +{ LD_R_R, REG_D, REG_E, INV, 8, TYPE_NONE, "ld d,e" }, // 53 +{ LD_R_R, REG_D, REG_IYH, INV, 8, TYPE_NONE, "ld d,iyh" }, // 54 +{ LD_R_R, REG_D, REG_IYL, INV, 8, TYPE_NONE, "ld d,iyl" }, // 55 +{ LD_R_I, REG_D, REG_IY, INV, 19, TYPE_OFFSET, "ld d,(iy%c%02Xh)" }, // 56 +{ LD_R_R, REG_D, REG_A, INV, 8, TYPE_NONE, "ld d,a" }, // 57 +{ LD_R_R, REG_E, REG_B, INV, 8, TYPE_NONE, "ld e,b" }, // 58 +{ LD_R_R, REG_E, REG_C, INV, 8, TYPE_NONE, "ld e,c" }, // 59 +{ LD_R_R, REG_E, REG_D, INV, 8, TYPE_NONE, "ld e,d" }, // 5a +{ LD_R_R, REG_E, REG_E, INV, 8, TYPE_NONE, "ld e,e" }, // 5b +{ LD_R_R, REG_E, REG_IYH, INV, 8, TYPE_NONE, "ld e,iyh" }, // 5c +{ LD_R_R, REG_E, REG_IYL, INV, 8, TYPE_NONE, "ld e,iyl" }, // 5d +{ LD_R_I, REG_E, REG_IY, INV, 19, TYPE_OFFSET, "ld e,(iy%c%02Xh)" }, // 5e +{ LD_R_R, REG_E, REG_A, INV, 8, TYPE_NONE, "ld e,a" }, // 5f +{ LD_R_R, REG_IYH, REG_B, INV, 8, TYPE_NONE, "ld iyh,b" }, // 60 +{ LD_R_R, REG_IYH, REG_C, INV, 8, TYPE_NONE, "ld iyh,c" }, // 61 +{ LD_R_R, REG_IYH, REG_D, INV, 8, TYPE_NONE, "ld iyh,d" }, // 62 +{ LD_R_R, REG_IYH, REG_E, INV, 8, TYPE_NONE, "ld iyh,e" }, // 63 +{ LD_R_R, REG_IYH, REG_IYH, INV, 8, TYPE_NONE, "ld iyh,iyh" }, // 64 +{ LD_R_R, REG_IYH, REG_IYL, INV, 8, TYPE_NONE, "ld iyh,iyl" }, // 65 +{ LD_R_I, REG_H, REG_IY, INV, 19, TYPE_OFFSET, "ld h,(iy%c%02Xh)" }, // 66 +{ LD_R_R, REG_IYH, REG_A, INV, 8, TYPE_NONE, "ld iyh,a" }, // 67 +{ LD_R_R, REG_IYL, REG_B, INV, 8, TYPE_NONE, "ld iyl,b" }, // 68 +{ LD_R_R, REG_IYL, REG_C, INV, 8, TYPE_NONE, "ld iyl,c" }, // 69 +{ LD_R_R, REG_IYL, REG_D, INV, 8, TYPE_NONE, "ld iyl,d" }, // 6a +{ LD_R_R, REG_IYL, REG_E, INV, 8, TYPE_NONE, "ld iyl,e" }, // 6b +{ LD_R_R, REG_IYL, REG_IYH, INV, 8, TYPE_NONE, "ld iyl,iyh" }, // 6c +{ LD_R_R, REG_IYL, REG_IYL, INV, 8, TYPE_NONE, "ld iyl,iyl" }, // 6d +{ LD_R_I, REG_L, REG_IY, INV, 19, TYPE_OFFSET, "ld l,(iy%c%02Xh)" }, // 6e +{ LD_R_R, REG_IYL, REG_A, INV, 8, TYPE_NONE, "ld iyl,a" }, // 6f +{ LD_I_R, REG_IY, REG_B, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),b" }, // 70 +{ LD_I_R, REG_IY, REG_C, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),c" }, // 71 +{ LD_I_R, REG_IY, REG_D, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),d" }, // 72 +{ LD_I_R, REG_IY, REG_E, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),e" }, // 73 +{ LD_I_R, REG_IY, REG_H, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),h" }, // 74 +{ LD_I_R, REG_IY, REG_L, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),l" }, // 75 +{ HALT, INV, INV, INV, 8, TYPE_NONE, "halt" }, // 76 +{ LD_I_R, REG_IY, REG_A, INV, 19, TYPE_OFFSET, "ld (iy%c%02Xh),a" }, // 77 +{ LD_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "ld a,b" }, // 78 +{ LD_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "ld a,c" }, // 79 +{ LD_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "ld a,d" }, // 7a +{ LD_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "ld a,e" }, // 7b +{ LD_R_R, REG_A, REG_IYH, INV, 8, TYPE_NONE, "ld a,iyh" }, // 7c +{ LD_R_R, REG_A, REG_IYL, INV, 8, TYPE_NONE, "ld a,iyl" }, // 7d +{ LD_R_I, REG_A, REG_IY, INV, 19, TYPE_OFFSET, "ld a,(iy%c%02Xh)" }, // 7e +{ LD_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "ld a,a" }, // 7f +{ ADD_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "add a,b" }, // 80 +{ ADD_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "add a,c" }, // 81 +{ ADD_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "add a,d" }, // 82 +{ ADD_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "add a,e" }, // 83 +{ ADD_R_R, REG_A, REG_IYH, INV, 8, TYPE_NONE, "add a,iyh" }, // 84 +{ ADD_R_R, REG_A, REG_IYL, INV, 8, TYPE_NONE, "add a,iyl" }, // 85 +{ ADD_R_I, REG_A, REG_IY, INV, 19, TYPE_OFFSET, "add a,(iy%c%02Xh)" }, // 86 +{ ADD_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "add a,a" }, // 87 +{ ADC_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "adc a,b" }, // 88 +{ ADC_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "adc a,c" }, // 89 +{ ADC_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "adc a,d" }, // 8a +{ ADC_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "adc a,e" }, // 8b +{ ADC_R_R, REG_A, REG_IYH, INV, 8, TYPE_NONE, "adc a,iyh" }, // 8c +{ ADC_R_R, REG_A, REG_IYL, INV, 8, TYPE_NONE, "adc a,iyl" }, // 8d +{ ADC_R_I, REG_A, REG_IY, INV, 19, TYPE_OFFSET, "adc a,(iy%c%02Xh)" }, // 8e +{ ADC_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "adc a,a" }, // 8f +{ SUB_R, REG_B, INV, INV, 8, TYPE_NONE, "sub b" }, // 90 +{ SUB_R, REG_C, INV, INV, 8, TYPE_NONE, "sub c" }, // 91 +{ SUB_R, REG_D, INV, INV, 8, TYPE_NONE, "sub d" }, // 92 +{ SUB_R, REG_E, INV, INV, 8, TYPE_NONE, "sub e" }, // 93 +{ SUB_R, REG_IYH, INV, INV, 8, TYPE_NONE, "sub iyh" }, // 94 +{ SUB_R, REG_IYL, INV, INV, 8, TYPE_NONE, "sub iyl" }, // 95 +{ SUB_I, REG_IY, INV, INV, 19, TYPE_OFFSET, "sub (iy%c%02Xh)" }, // 96 +{ SUB_R, REG_A, INV, INV, 8, TYPE_NONE, "sub a" }, // 97 +{ SBC_R_R, REG_A, REG_B, INV, 8, TYPE_NONE, "sbc a,b" }, // 98 +{ SBC_R_R, REG_A, REG_C, INV, 8, TYPE_NONE, "sbc a,c" }, // 99 +{ SBC_R_R, REG_A, REG_D, INV, 8, TYPE_NONE, "sbc a,d" }, // 9a +{ SBC_R_R, REG_A, REG_E, INV, 8, TYPE_NONE, "sbc a,e" }, // 9b +{ SBC_R_R, REG_A, REG_IYH, INV, 8, TYPE_NONE, "sbc a,iyh" }, // 9c +{ SBC_R_R, REG_A, REG_IYL, INV, 8, TYPE_NONE, "sbc a,iyl" }, // 9d +{ SBC_R_I, REG_A, REG_IY, INV, 19, TYPE_OFFSET, "sbc a,(iy%c%02Xh)" }, // 9e +{ SBC_R_R, REG_A, REG_A, INV, 8, TYPE_NONE, "sbc a,a" }, // 9f +{ AND_R, REG_B, INV, INV, 8, TYPE_NONE, "and b" }, // a0 +{ AND_R, REG_C, INV, INV, 8, TYPE_NONE, "and c" }, // a1 +{ AND_R, REG_D, INV, INV, 8, TYPE_NONE, "and d" }, // a2 +{ AND_R, REG_E, INV, INV, 8, TYPE_NONE, "and e" }, // a3 +{ AND_R, REG_IYH, INV, INV, 8, TYPE_NONE, "and iyh" }, // a4 +{ AND_R, REG_IYL, INV, INV, 8, TYPE_NONE, "and iyl" }, // a5 +{ AND_I, REG_IY, INV, INV, 19, TYPE_OFFSET, "and (iy%c%02Xh)" }, // a6 +{ AND_R, REG_A, INV, INV, 8, TYPE_NONE, "and a" }, // a7 +{ XOR_R, REG_B, INV, INV, 8, TYPE_NONE, "xor b" }, // a8 +{ XOR_R, REG_C, INV, INV, 8, TYPE_NONE, "xor c" }, // a9 +{ XOR_R, REG_D, INV, INV, 8, TYPE_NONE, "xor d" }, // aa +{ XOR_R, REG_E, INV, INV, 8, TYPE_NONE, "xor e" }, // ab +{ XOR_R, REG_IYH, INV, INV, 8, TYPE_NONE, "xor iyh" }, // ac +{ XOR_R, REG_IYL, INV, INV, 8, TYPE_NONE, "xor iyl" }, // ad +{ XOR_I, REG_IY, INV, INV, 19, TYPE_OFFSET, "xor (iy%c%02Xh)" }, // ae +{ XOR_R, REG_A, INV, INV, 8, TYPE_NONE, "xor a" }, // af +{ OR_R, REG_B, INV, INV, 8, TYPE_NONE, "or b" }, // b0 +{ OR_R, REG_C, INV, INV, 8, TYPE_NONE, "or c" }, // b1 +{ OR_R, REG_D, INV, INV, 8, TYPE_NONE, "or d" }, // b2 +{ OR_R, REG_E, INV, INV, 8, TYPE_NONE, "or e" }, // b3 +{ OR_R, REG_IYH, INV, INV, 8, TYPE_NONE, "or iyh" }, // b4 +{ OR_R, REG_IYL, INV, INV, 8, TYPE_NONE, "or iyl" }, // b5 +{ OR_I, REG_IY, INV, INV, 19, TYPE_OFFSET, "or (iy%c%02Xh)" }, // b6 +{ OR_R, REG_A, INV, INV, 8, TYPE_NONE, "or a" }, // b7 +{ CP_R, REG_B, INV, INV, 8, TYPE_NONE, "cp b" }, // b8 +{ CP_R, REG_C, INV, INV, 8, TYPE_NONE, "cp c" }, // b9 +{ CP_R, REG_D, INV, INV, 8, TYPE_NONE, "cp d" }, // ba +{ CP_R, REG_E, INV, INV, 8, TYPE_NONE, "cp e" }, // bb +{ CP_R, REG_IYH, INV, INV, 8, TYPE_NONE, "cp iyh" }, // bc +{ CP_R, REG_IYL, INV, INV, 8, TYPE_NONE, "cp iyl" }, // bd +{ CP_I, REG_IY, INV, INV, 19, TYPE_OFFSET, "cp (iy%c%02Xh)" }, // be +{ CP_R, REG_A, INV, INV, 8, TYPE_NONE, "cp a" }, // bf +{ RET_C, COND_NZ, INV, 9, 15, TYPE_NONE, "ret nz" }, // c0 +{ POP_RR, REG_BC, INV, INV, 14, TYPE_NONE, "pop bc" }, // c1 +{ JP_C_MNN, COND_NZ, INV, INV, 14, TYPE_IMM_NN, "jp nz,(%04hXh)" }, // c2 +{ JP_MNN, INV, INV, INV, 14, TYPE_IMM_NN, "jp (%04hXh)" }, // c3 +{ CALL_C_MNN, COND_NZ, INV, 14, 21, TYPE_IMM_NN, "call nz,(%04hXh)" }, // c4 +{ PUSH_RR, REG_BC, INV, INV, 15, TYPE_NONE, "push bc" }, // c5 +{ ADD_R_N, REG_A, INV, INV, 11, TYPE_IMM_N, "add a,%02hhXh" }, // c6 +{ RST, 0x0, INV, INV, 15, TYPE_NONE, "rst 0h" }, // c7 +{ RET_C, COND_Z, INV, 9, 15, TYPE_NONE, "ret z" }, // c8 +{ RET, INV, INV, INV, 14, TYPE_NONE, "ret" }, // c9 +{ JP_C_MNN, COND_Z, INV, INV, 14, TYPE_IMM_NN, "jp z,(%04hXh)" }, // ca +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cb +{ CALL_C_MNN, COND_Z, INV, 14, 21, TYPE_IMM_NN, "call z,(%04hXh)" }, // cc +{ CALL_MNN, INV, INV, INV, 21, TYPE_IMM_NN, "call (%04hXh)" }, // cd +{ ADC_R_N, REG_A, INV, INV, 11, TYPE_IMM_N, "adc a,%02hhXh" }, // ce +{ RST, 0x8, INV, INV, 15, TYPE_NONE, "rst 8h" }, // cf +{ RET_C, COND_NC, INV, INV, 9, TYPE_NONE, "ret nc" }, // d0 +{ POP_RR, REG_DE, INV, INV, 14, TYPE_NONE, "pop de" }, // d1 +{ JP_C_MNN, COND_NC, INV, INV, 14, TYPE_IMM_NN, "jp nc,(%04hXh)" }, // d2 +{ OUT_MN_R, INV, REG_A, INV, 15, TYPE_IMM_N, "out (%02hhXh),a" }, // d3 +{ CALL_C_MNN, COND_NC, INV, 14, 21, TYPE_IMM_NN, "call nc,(%04hXh)" }, // d4 +{ PUSH_RR, REG_DE, INV, INV, 15, TYPE_NONE, "push de" }, // d5 +{ SUB_N, INV, INV, INV, 11, TYPE_IMM_N, "sub %02hhXh" }, // d6 +{ RST, 0x10, INV, INV, 15, TYPE_NONE, "rst 10h" }, // d7 +{ RET_C, COND_C, INV, INV, 9, TYPE_NONE, "ret c" }, // d8 +{ EXX, INV, INV, INV, 8, TYPE_NONE, "exx" }, // d9 +{ JP_C_MNN, COND_C, INV, INV, 14, TYPE_IMM_NN, "jp c,(%04hXh)" }, // da +{ IN_R_MN, REG_A, INV, INV, 15, TYPE_IMM_N, "in a,(%02hhXh)" }, // db +{ CALL_C_MNN, COND_C, INV, 14, 21, TYPE_IMM_NN, "call c,(%04hXh)" }, // dc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // dd +{ SBC_R_N, REG_A, INV, INV, 19, TYPE_IMM_N, "sbc a,%02hhXh" }, // de +{ RST, 0x18, INV, INV, 15, TYPE_NONE, "rst 18h" }, // df +{ RET_C, COND_PO, INV, 9, 15, TYPE_NONE, "ret po" }, // e0 +{ POP_RR, REG_IY, INV, INV, 14, TYPE_NONE, "pop iy" }, // e1 +{ JP_C_MNN, COND_PO, INV, INV, 14, TYPE_IMM_NN, "jp po,(%04hXh)" }, // e2 +{ EX_MRR_RR, REG_SP, REG_IY, INV, 23, TYPE_NONE, "ex (sp),iy" }, // e3 +{ CALL_C_MNN, COND_PO, INV, 14, 21, TYPE_IMM_NN, "call po,(%04hXh)" }, // e4 +{ PUSH_RR, REG_IY, INV, INV, 15, TYPE_NONE, "push iy" }, // e5 +{ AND_N, INV, INV, INV, 11, TYPE_IMM_N, "and %02hhXh" }, // e6 +{ RST, 0x20, INV, INV, 15, TYPE_NONE, "rst 20h" }, // e7 +{ RET_C, COND_PE, INV, 9, 15, TYPE_NONE, "ret pe" }, // e8 +{ JP_MRR, REG_IY, INV, INV, 8, TYPE_NONE, "jp (iy)" }, // e9 +{ JP_C_MNN, COND_PE, INV, INV, 14, TYPE_IMM_NN, "jp pe,(%04hXh)" }, // ea +{ EX_RR_RR, REG_DE, REG_HL, INV, 8, TYPE_NONE, "ex de,hl" }, // eb +{ CALL_C_MNN, COND_PE, INV, 14, 21, TYPE_IMM_NN, "call pe,(%04hXh)" }, // ec +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ed +{ XOR_N, INV, INV, INV, 11, TYPE_IMM_N, "xor %02hhXh" }, // ee +{ RST, 0x28, INV, INV, 15, TYPE_NONE, "rst 28h" }, // ef +{ RET_C, COND_P, INV, 9, 15, TYPE_NONE, "ret p" }, // f0 +{ POP_RR, REG_AF, INV, INV, 14, TYPE_NONE, "pop af" }, // f1 +{ JP_C_MNN, COND_P, INV, INV, 14, TYPE_IMM_NN, "jp p,(%04hXh)" }, // f2 +{ DI, INV, INV, INV, 8, TYPE_NONE, "di" }, // f3 +{ CALL_C_MNN, COND_P, INV, 14, 21, TYPE_IMM_NN, "call p,(%04hXh)" }, // f4 +{ PUSH_RR, REG_AF, INV, INV, 15, TYPE_NONE, "push af" }, // f5 +{ OR_N, INV, INV, INV, 11, TYPE_IMM_N, "or %02hhXh" }, // f6 +{ RST, 0x30, INV, INV, 15, TYPE_NONE, "rst 30h" }, // f7 +{ RET_C, COND_M, INV, 9, 15, TYPE_NONE, "ret m" }, // f8 +{ LD_RR_RR, REG_SP, REG_IY, INV, 10, TYPE_NONE, "ld sp,iy" }, // f9 +{ JP_C_MNN, COND_M, INV, INV, 14, TYPE_IMM_NN, "jp m,(%04hXh)" }, // fa +{ EI, INV, INV, INV, 8, TYPE_NONE, "ei" }, // fb +{ CALL_C_MNN, COND_M, INV, 14, 21, TYPE_IMM_NN, "call m,(%04hXh)" }, // fc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fd +{ CP_N, INV, INV, INV, 11, TYPE_IMM_N, "cp %02hhXh" }, // fe +{ RST, 0x38, INV, INV, 15, TYPE_NONE, "rst 38h" }, // ff diff --git a/tables/fdcb_prefix.tab b/tables/fdcb_prefix.tab new file mode 100644 index 0000000..d7ce14f --- /dev/null +++ b/tables/fdcb_prefix.tab @@ -0,0 +1,256 @@ +{ RLC_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,rlc (iy%c%02Xh)" }, // 00 +{ RLC_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,rlc (iy%c%02Xh)" }, // 01 +{ RLC_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,rlc (iy%c%02Xh)" }, // 02 +{ RLC_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,rlc (iy%c%02Xh)" }, // 03 +{ RLC_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,rlc (iy%c%02Xh)" }, // 04 +{ RLC_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,rlc (iy%c%02Xh)" }, // 05 +{ RLC_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "rlc (iy%c%02Xh)" }, // 06 +{ RLC_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,rlc (iy%c%02Xh)" }, // 07 +{ RRC_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,rrc (iy%c%02Xh)" }, // 08 +{ RRC_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,rrc (iy%c%02Xh)" }, // 09 +{ RRC_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,rrc (iy%c%02Xh)" }, // 0a +{ RRC_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,rrc (iy%c%02Xh)" }, // 0b +{ RRC_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,rrc (iy%c%02Xh)" }, // 0c +{ RRC_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,rrc (iy%c%02Xh)" }, // 0d +{ RRC_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "rrc (iy%c%02Xh)" }, // 0e +{ RRC_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,rrc (iy%c%02Xh)" }, // 0f +{ RL_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,rl (iy%c%02Xh)" }, // 10 +{ RL_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,rl (iy%c%02Xh)" }, // 11 +{ RL_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,rl (iy%c%02Xh)" }, // 12 +{ RL_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,rl (iy%c%02Xh)" }, // 13 +{ RL_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,rl (iy%c%02Xh)" }, // 14 +{ RL_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,rl (iy%c%02Xh)" }, // 15 +{ RL_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "rl (iy%c%02Xh)" }, // 16 +{ RL_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,rl (iy%c%02Xh)" }, // 17 +{ RR_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,rr (iy%c%02Xh)" }, // 18 +{ RR_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,rr (iy%c%02Xh)" }, // 19 +{ RR_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,rr (iy%c%02Xh)" }, // 1a +{ RR_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,rr (iy%c%02Xh)" }, // 1b +{ RR_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,rr (iy%c%02Xh)" }, // 1c +{ RR_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,rr (iy%c%02Xh)" }, // 1d +{ RR_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "rr (iy%c%02Xh)" }, // 1e +{ RR_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,rr (iy%c%02Xh)" }, // 1f +{ SLA_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,sla (iy%c%02Xh)" }, // 20 +{ SLA_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,sla (iy%c%02Xh)" }, // 21 +{ SLA_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,sla (iy%c%02Xh)" }, // 22 +{ SLA_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,sla (iy%c%02Xh)" }, // 23 +{ SLA_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,sla (iy%c%02Xh)" }, // 24 +{ SLA_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,sla (iy%c%02Xh)" }, // 25 +{ SLA_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "sla (iy%c%02Xh)" }, // 26 +{ SLA_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,sla (iy%c%02Xh)" }, // 27 +{ SRA_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,sra (iy%c%02Xh)" }, // 28 +{ SRA_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,sra (iy%c%02Xh)" }, // 29 +{ SRA_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,sra (iy%c%02Xh)" }, // 2a +{ SRA_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,sra (iy%c%02Xh)" }, // 2b +{ SRA_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,sra (iy%c%02Xh)" }, // 2c +{ SRA_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,sra (iy%c%02Xh)" }, // 2d +{ SRA_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "sra (iy%c%02Xh)" }, // 2e +{ SRA_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,sra (iy%c%02Xh)" }, // 2f +{ SLL_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,sll (iy%c%02Xh)" }, // 30 +{ SLL_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,sll (iy%c%02Xh)" }, // 31 +{ SLL_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,sll (iy%c%02Xh)" }, // 32 +{ SLL_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,sll (iy%c%02Xh)" }, // 33 +{ SLL_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,sll (iy%c%02Xh)" }, // 34 +{ SLL_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,sll (iy%c%02Xh)" }, // 35 +{ SLL_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "sll (iy%c%02Xh)" }, // 36 +{ SLL_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,sll (iy%c%02Xh)" }, // 37 +{ SRL_I, REG_IY, INV, REG_B, 23, TYPE_OFFSET, "ld b,srl (iy%c%02Xh)" }, // 38 +{ SRL_I, REG_IY, INV, REG_C, 23, TYPE_OFFSET, "ld c,srl (iy%c%02Xh)" }, // 39 +{ SRL_I, REG_IY, INV, REG_D, 23, TYPE_OFFSET, "ld d,srl (iy%c%02Xh)" }, // 3a +{ SRL_I, REG_IY, INV, REG_E, 23, TYPE_OFFSET, "ld e,srl (iy%c%02Xh)" }, // 3b +{ SRL_I, REG_IY, INV, REG_H, 23, TYPE_OFFSET, "ld h,srl (iy%c%02Xh)" }, // 3c +{ SRL_I, REG_IY, INV, REG_L, 23, TYPE_OFFSET, "ld l,srl (iy%c%02Xh)" }, // 3d +{ SRL_I, REG_IY, INV, INV, 23, TYPE_OFFSET, "srl (iy%c%02Xh)" }, // 3e +{ SRL_I, REG_IY, INV, REG_A, 23, TYPE_OFFSET, "ld a,srl (iy%c%02Xh)" }, // 3f +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 40 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 41 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 42 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 43 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 44 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 45 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 46 +{ BIT_I, 0, REG_IY, INV, 20, TYPE_OFFSET, "bit 0,(iy%c%02Xh)" }, // 47 +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 48 +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 49 +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 4a +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 4b +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 4c +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 4d +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 4e +{ BIT_I, 1, REG_IY, INV, 20, TYPE_OFFSET, "bit 1,(iy%c%02Xh)" }, // 4f +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 50 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 51 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 52 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 53 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 54 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 55 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 56 +{ BIT_I, 2, REG_IY, INV, 20, TYPE_OFFSET, "bit 2,(iy%c%02Xh)" }, // 57 +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 58 +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 59 +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 5a +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 5b +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 5c +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 5d +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 5e +{ BIT_I, 3, REG_IY, INV, 20, TYPE_OFFSET, "bit 3,(iy%c%02Xh)" }, // 5f +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 60 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 61 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 62 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 63 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 64 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 65 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 66 +{ BIT_I, 4, REG_IY, INV, 20, TYPE_OFFSET, "bit 4,(iy%c%02Xh)" }, // 67 +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 68 +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 69 +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 6a +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 6b +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 6c +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 6d +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 6e +{ BIT_I, 5, REG_IY, INV, 20, TYPE_OFFSET, "bit 5,(iy%c%02Xh)" }, // 6f +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 70 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 71 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 72 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 73 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 74 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 75 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 76 +{ BIT_I, 6, REG_IY, INV, 20, TYPE_OFFSET, "bit 6,(iy%c%02Xh)" }, // 77 +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 78 +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 79 +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 7a +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 7b +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 7c +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 7d +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 7e +{ BIT_I, 7, REG_IY, INV, 20, TYPE_OFFSET, "bit 7,(iy%c%02Xh)" }, // 7f +{ RES_I, 0, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 0,(iy%c%02Xh)" }, // 80 +{ RES_I, 0, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 0,(iy%c%02Xh)" }, // 81 +{ RES_I, 0, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 0,(iy%c%02Xh)" }, // 82 +{ RES_I, 0, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 0,(iy%c%02Xh)" }, // 83 +{ RES_I, 0, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 0,(iy%c%02Xh)" }, // 84 +{ RES_I, 0, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 0,(iy%c%02Xh)" }, // 85 +{ RES_I, 0, REG_IY, INV, 23, TYPE_OFFSET, "res 0,(iy%c%02Xh)" }, // 86 +{ RES_I, 0, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 0,(iy%c%02Xh)" }, // 87 +{ RES_I, 1, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 1,(iy%c%02Xh)" }, // 88 +{ RES_I, 1, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 1,(iy%c%02Xh)" }, // 89 +{ RES_I, 1, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 1,(iy%c%02Xh)" }, // 8a +{ RES_I, 1, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 1,(iy%c%02Xh)" }, // 8b +{ RES_I, 1, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 1,(iy%c%02Xh)" }, // 8c +{ RES_I, 1, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 1,(iy%c%02Xh)" }, // 8d +{ RES_I, 1, REG_IY, INV, 23, TYPE_OFFSET, "res 1,(iy%c%02Xh)" }, // 8e +{ RES_I, 1, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 1,(iy%c%02Xh)" }, // 8f +{ RES_I, 2, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 2,(iy%c%02Xh)" }, // 90 +{ RES_I, 2, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 2,(iy%c%02Xh)" }, // 91 +{ RES_I, 2, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 2,(iy%c%02Xh)" }, // 92 +{ RES_I, 2, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 2,(iy%c%02Xh)" }, // 93 +{ RES_I, 2, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 2,(iy%c%02Xh)" }, // 94 +{ RES_I, 2, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 2,(iy%c%02Xh)" }, // 95 +{ RES_I, 2, REG_IY, INV, 23, TYPE_OFFSET, "res 2,(iy%c%02Xh)" }, // 96 +{ RES_I, 2, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 2,(iy%c%02Xh)" }, // 97 +{ RES_I, 3, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 3,(iy%c%02Xh)" }, // 98 +{ RES_I, 3, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 3,(iy%c%02Xh)" }, // 99 +{ RES_I, 3, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 3,(iy%c%02Xh)" }, // 9a +{ RES_I, 3, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 3,(iy%c%02Xh)" }, // 9b +{ RES_I, 3, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 3,(iy%c%02Xh)" }, // 9c +{ RES_I, 3, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 3,(iy%c%02Xh)" }, // 9d +{ RES_I, 3, REG_IY, INV, 23, TYPE_OFFSET, "res 3,(iy%c%02Xh)" }, // 9e +{ RES_I, 3, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 3,(iy%c%02Xh)" }, // 9f +{ RES_I, 4, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 4,(iy%c%02Xh)" }, // a0 +{ RES_I, 4, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 4,(iy%c%02Xh)" }, // a1 +{ RES_I, 4, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 4,(iy%c%02Xh)" }, // a2 +{ RES_I, 4, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 4,(iy%c%02Xh)" }, // a3 +{ RES_I, 4, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 4,(iy%c%02Xh)" }, // a4 +{ RES_I, 4, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 4,(iy%c%02Xh)" }, // a5 +{ RES_I, 4, REG_IY, INV, 23, TYPE_OFFSET, "res 4,(iy%c%02Xh)" }, // a6 +{ RES_I, 4, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 4,(iy%c%02Xh)" }, // a7 +{ RES_I, 5, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 5,(iy%c%02Xh)" }, // a8 +{ RES_I, 5, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 5,(iy%c%02Xh)" }, // a9 +{ RES_I, 5, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 5,(iy%c%02Xh)" }, // aa +{ RES_I, 5, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 5,(iy%c%02Xh)" }, // ab +{ RES_I, 5, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 5,(iy%c%02Xh)" }, // ac +{ RES_I, 5, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 5,(iy%c%02Xh)" }, // ad +{ RES_I, 5, REG_IY, INV, 23, TYPE_OFFSET, "res 5,(iy%c%02Xh)" }, // ae +{ RES_I, 5, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 5,(iy%c%02Xh)" }, // af +{ RES_I, 6, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 6,(iy%c%02Xh)" }, // b0 +{ RES_I, 6, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 6,(iy%c%02Xh)" }, // b1 +{ RES_I, 6, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 6,(iy%c%02Xh)" }, // b2 +{ RES_I, 6, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 6,(iy%c%02Xh)" }, // b3 +{ RES_I, 6, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 6,(iy%c%02Xh)" }, // b4 +{ RES_I, 6, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 6,(iy%c%02Xh)" }, // b5 +{ RES_I, 6, REG_IY, INV, 23, TYPE_OFFSET, "res 6,(iy%c%02Xh)" }, // b6 +{ RES_I, 6, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 6,(iy%c%02Xh)" }, // b7 +{ RES_I, 7, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,res 7,(iy%c%02Xh)" }, // b8 +{ RES_I, 7, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,res 7,(iy%c%02Xh)" }, // b9 +{ RES_I, 7, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,res 7,(iy%c%02Xh)" }, // ba +{ RES_I, 7, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,res 7,(iy%c%02Xh)" }, // bb +{ RES_I, 7, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,res 7,(iy%c%02Xh)" }, // bc +{ RES_I, 7, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,res 7,(iy%c%02Xh)" }, // bd +{ RES_I, 7, REG_IY, INV, 23, TYPE_OFFSET, "res 7,(iy%c%02Xh)" }, // be +{ RES_I, 7, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,res 7,(iy%c%02Xh)" }, // bf +{ SET_I, 0, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 0,(iy%c%02Xh)" }, // c0 +{ SET_I, 0, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 0,(iy%c%02Xh)" }, // c1 +{ SET_I, 0, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 0,(iy%c%02Xh)" }, // c2 +{ SET_I, 0, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 0,(iy%c%02Xh)" }, // c3 +{ SET_I, 0, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 0,(iy%c%02Xh)" }, // c4 +{ SET_I, 0, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 0,(iy%c%02Xh)" }, // c5 +{ SET_I, 0, REG_IY, INV, 23, TYPE_OFFSET, "set 0,(iy%c%02Xh)" }, // c6 +{ SET_I, 0, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 0,(iy%c%02Xh)" }, // c7 +{ SET_I, 1, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 1,(iy%c%02Xh)" }, // c8 +{ SET_I, 1, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 1,(iy%c%02Xh)" }, // c9 +{ SET_I, 1, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 1,(iy%c%02Xh)" }, // ca +{ SET_I, 1, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 1,(iy%c%02Xh)" }, // cb +{ SET_I, 1, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 1,(iy%c%02Xh)" }, // cc +{ SET_I, 1, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 1,(iy%c%02Xh)" }, // cd +{ SET_I, 1, REG_IY, INV, 23, TYPE_OFFSET, "set 1,(iy%c%02Xh)" }, // ce +{ SET_I, 1, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 1,(iy%c%02Xh)" }, // cf +{ SET_I, 2, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 2,(iy%c%02Xh)" }, // d0 +{ SET_I, 2, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 2,(iy%c%02Xh)" }, // d1 +{ SET_I, 2, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 2,(iy%c%02Xh)" }, // d2 +{ SET_I, 2, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 2,(iy%c%02Xh)" }, // d3 +{ SET_I, 2, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 2,(iy%c%02Xh)" }, // d4 +{ SET_I, 2, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 2,(iy%c%02Xh)" }, // d5 +{ SET_I, 2, REG_IY, INV, 23, TYPE_OFFSET, "set 2,(iy%c%02Xh)" }, // d6 +{ SET_I, 2, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 2,(iy%c%02Xh)" }, // d7 +{ SET_I, 3, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 3,(iy%c%02Xh)" }, // d8 +{ SET_I, 3, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 3,(iy%c%02Xh)" }, // d9 +{ SET_I, 3, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 3,(iy%c%02Xh)" }, // da +{ SET_I, 3, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 3,(iy%c%02Xh)" }, // db +{ SET_I, 3, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 3,(iy%c%02Xh)" }, // dc +{ SET_I, 3, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 3,(iy%c%02Xh)" }, // dd +{ SET_I, 3, REG_IY, INV, 23, TYPE_OFFSET, "set 3,(iy%c%02Xh)" }, // de +{ SET_I, 3, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 3,(iy%c%02Xh)" }, // df +{ SET_I, 4, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 4,(iy%c%02Xh)" }, // e0 +{ SET_I, 4, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 4,(iy%c%02Xh)" }, // e1 +{ SET_I, 4, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 4,(iy%c%02Xh)" }, // e2 +{ SET_I, 4, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 4,(iy%c%02Xh)" }, // e3 +{ SET_I, 4, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 4,(iy%c%02Xh)" }, // e4 +{ SET_I, 4, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 4,(iy%c%02Xh)" }, // e5 +{ SET_I, 4, REG_IY, INV, 23, TYPE_OFFSET, "set 4,(iy%c%02Xh)" }, // e6 +{ SET_I, 4, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 4,(iy%c%02Xh)" }, // e7 +{ SET_I, 5, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 5,(iy%c%02Xh)" }, // e8 +{ SET_I, 5, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 5,(iy%c%02Xh)" }, // e9 +{ SET_I, 5, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 5,(iy%c%02Xh)" }, // ea +{ SET_I, 5, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 5,(iy%c%02Xh)" }, // eb +{ SET_I, 5, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 5,(iy%c%02Xh)" }, // ec +{ SET_I, 5, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 5,(iy%c%02Xh)" }, // ed +{ SET_I, 5, REG_IY, INV, 23, TYPE_OFFSET, "set 5,(iy%c%02Xh)" }, // ee +{ SET_I, 5, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 5,(iy%c%02Xh)" }, // ef +{ SET_I, 6, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 6,(iy%c%02Xh)" }, // f0 +{ SET_I, 6, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 6,(iy%c%02Xh)" }, // f1 +{ SET_I, 6, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 6,(iy%c%02Xh)" }, // f2 +{ SET_I, 6, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 6,(iy%c%02Xh)" }, // f3 +{ SET_I, 6, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 6,(iy%c%02Xh)" }, // f4 +{ SET_I, 6, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 6,(iy%c%02Xh)" }, // f5 +{ SET_I, 6, REG_IY, INV, 23, TYPE_OFFSET, "set 6,(iy%c%02Xh)" }, // f6 +{ SET_I, 6, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 6,(iy%c%02Xh)" }, // f7 +{ SET_I, 7, REG_IY, REG_B, 23, TYPE_OFFSET, "ld b,set 7,(iy%c%02Xh)" }, // f8 +{ SET_I, 7, REG_IY, REG_C, 23, TYPE_OFFSET, "ld c,set 7,(iy%c%02Xh)" }, // f9 +{ SET_I, 7, REG_IY, REG_D, 23, TYPE_OFFSET, "ld d,set 7,(iy%c%02Xh)" }, // fa +{ SET_I, 7, REG_IY, REG_E, 23, TYPE_OFFSET, "ld e,set 7,(iy%c%02Xh)" }, // fb +{ SET_I, 7, REG_IY, REG_H, 23, TYPE_OFFSET, "ld h,set 7,(iy%c%02Xh)" }, // fc +{ SET_I, 7, REG_IY, REG_L, 23, TYPE_OFFSET, "ld l,set 7,(iy%c%02Xh)" }, // fd +{ SET_I, 7, REG_IY, INV, 23, TYPE_OFFSET, "set 7,(iy%c%02Xh)" }, // fe +{ SET_I, 7, REG_IY, REG_A, 23, TYPE_OFFSET, "ld a,set 7,(iy%c%02Xh)" }, // ff diff --git a/tables/no_prefix.tab b/tables/no_prefix.tab new file mode 100644 index 0000000..2ad41f3 --- /dev/null +++ b/tables/no_prefix.tab @@ -0,0 +1,256 @@ +{ NOP, INV, INV, INV, 4, TYPE_NONE, "nop" }, // 00 +{ LD_RR_NN, REG_BC, INV, INV, 10, TYPE_IMM_NN, "ld bc,%04hXh" }, // 01 +{ LD_MRR_R, REG_BC, REG_A, INV, 7, TYPE_NONE, "ld (bc),a" }, // 02 +{ INC_RR, REG_BC, INV, INV, 6, TYPE_NONE, "inc bc" }, // 03 +{ INC_R, REG_B, INV, INV, 4, TYPE_NONE, "inc b" }, // 04 +{ DEC_R, REG_B, INV, INV, 4, TYPE_NONE, "dec b" }, // 05 +{ LD_R_N, REG_B, INV, INV, 7, TYPE_IMM_N, "ld b,%02hhXh" }, // 06 +{ RLCA, INV, INV, INV, 4, TYPE_NONE, "rlca" }, // 07 +{ EX_RR_RR, REG_AF, REG_AFP, INV, 4, TYPE_NONE, "ex af,af'" }, // 08 +{ ADD_RR_RR, REG_HL, REG_BC, INV, 11, TYPE_NONE, "add hl,bc" }, // 09 +{ LD_R_MRR, REG_A, REG_BC, INV, 7, TYPE_NONE, "ld a,(bc)" }, // 0a +{ DEC_RR, REG_BC, INV, INV, 6, TYPE_NONE, "dec bc" }, // 0b +{ INC_R, REG_C, INV, INV, 4, TYPE_NONE, "inc c" }, // 0c +{ DEC_R, REG_C, INV, INV, 4, TYPE_NONE, "dec c" }, // 0d +{ LD_R_N, REG_C, INV, INV, 7, TYPE_IMM_N, "ld c,%02hhXh" }, // 0e +{ RRCA, INV, INV, INV, 4, TYPE_NONE, "rrca" }, // 0f +{ DJNZ, INV, INV, 8, 13, TYPE_DISP, "djnz (pc%c%Xh)" }, // 10 +{ LD_RR_NN, REG_DE, INV, INV, 10, TYPE_IMM_NN, "ld de,%04hXh" }, // 11 +{ LD_MRR_R, REG_DE, REG_A, INV, 7, TYPE_NONE, "ld (de),a" }, // 12 +{ INC_RR, REG_DE, INV, INV, 6, TYPE_NONE, "inc de" }, // 13 +{ INC_R, REG_D, INV, INV, 4, TYPE_NONE, "inc d" }, // 14 +{ DEC_R, REG_D, INV, INV, 4, TYPE_NONE, "dec d" }, // 15 +{ LD_R_N, REG_D, INV, INV, 7, TYPE_IMM_N, "ld d,%02hhXh" }, // 16 +{ RLA, INV, INV, INV, 4, TYPE_NONE, "rla" }, // 17 +{ JR, INV, INV, INV, 12, TYPE_DISP, "jr (pc%c%Xh)" }, // 18 +{ ADD_RR_RR, REG_HL, REG_DE, INV, 11, TYPE_NONE, "add hl,de" }, // 19 +{ LD_R_MRR, REG_A, REG_DE, INV, 7, TYPE_NONE, "ld a,(de)" }, // 1a +{ DEC_RR, REG_DE, INV, INV, 6, TYPE_NONE, "dec de" }, // 1b +{ INC_R, REG_E, INV, INV, 4, TYPE_NONE, "inc e" }, // 1c +{ DEC_R, REG_E, INV, INV, 4, TYPE_NONE, "dec e" }, // 1d +{ LD_R_N, REG_E, INV, INV, 7, TYPE_IMM_N, "ld e,%02hhXh" }, // 1e +{ RRA, INV, INV, INV, 4, TYPE_NONE, "rra" }, // 1f +{ JR_C, COND_NZ, INV, 7, 12, TYPE_DISP, "jr nz,(pc%c%Xh)" }, // 20 +{ LD_RR_NN, REG_HL, INV, INV, 10, TYPE_IMM_NN, "ld hl,%04hXh" }, // 21 +{ LD_MNN_RR, INV, REG_HL, INV, 16, TYPE_IMM_NN, "ld (%04hXh),hl" }, // 22 +{ INC_RR, REG_HL, INV, INV, 6, TYPE_NONE, "inc hl" }, // 23 +{ INC_R, REG_H, INV, INV, 4, TYPE_NONE, "inc h" }, // 24 +{ DEC_R, REG_H, INV, INV, 4, TYPE_NONE, "dec h" }, // 25 +{ LD_R_N, REG_H, INV, INV, 7, TYPE_IMM_N, "ld h,%02hhXh" }, // 26 +{ DAA, INV, INV, INV, 4, TYPE_NONE, "daa" }, // 27 +{ JR_C, COND_Z, INV, 7, 12, TYPE_DISP, "jr z,(pc%c%Xh)" }, // 28 +{ ADD_RR_RR, REG_HL, REG_HL, INV, 11, TYPE_NONE, "add hl,hl" }, // 29 +{ LD_RR_MNN, REG_HL, INV, INV, 16, TYPE_IMM_NN, "ld hl,(%04hXh)" }, // 2a +{ DEC_RR, REG_HL, INV, INV, 6, TYPE_NONE, "dec hl" }, // 2b +{ INC_R, REG_L, INV, INV, 4, TYPE_NONE, "inc l" }, // 2c +{ DEC_R, REG_L, INV, INV, 4, TYPE_NONE, "dec l" }, // 2d +{ LD_R_N, REG_L, INV, INV, 7, TYPE_IMM_N, "ld l,%02hhXh" }, // 2e +{ CPL, INV, INV, INV, 4, TYPE_NONE, "cpl" }, // 2f +{ JR_C, COND_NC, INV, 7, 12, TYPE_DISP, "jr nc,(pc%c%Xh)" }, // 30 +{ LD_RR_NN, REG_SP, INV, INV, 10, TYPE_IMM_NN, "ld sp,%04hXh" }, // 31 +{ LD_MNN_R, INV, REG_A, INV, 13, TYPE_IMM_NN, "ld (%04hXh),a" }, // 32 +{ INC_RR, REG_SP, INV, INV, 6, TYPE_NONE, "inc sp" }, // 33 +{ INC_MRR, REG_HL, INV, INV, 11, TYPE_NONE, "inc (hl)" }, // 34 +{ DEC_MRR, REG_HL, INV, INV, 11, TYPE_NONE, "dec (hl)" }, // 35 +{ LD_MRR_N, REG_HL, INV, INV, 10, TYPE_IMM_N, "ld (hl),%02hhXh" }, // 36 +{ SCF, INV, INV, INV, 4, TYPE_NONE, "scf" }, // 37 +{ JR_C, COND_C, INV, 7, 12, TYPE_DISP, "jr c,(pc%c%Xh)" }, // 38 +{ ADD_RR_RR, REG_HL, REG_SP, INV, 11, TYPE_NONE, "add hl,sp" }, // 39 +{ LD_R_MNN, REG_A, INV, INV, 13, TYPE_IMM_NN, "ld a,(%04hXh)" }, // 3a +{ DEC_RR, REG_SP, INV, INV, 6, TYPE_NONE, "dec sp" }, // 3b +{ INC_R, REG_A, INV, INV, 4, TYPE_NONE, "inc a" }, // 3c +{ DEC_R, REG_A, INV, INV, 4, TYPE_NONE, "dec a" }, // 3d +{ LD_R_N, REG_A, INV, INV, 7, TYPE_IMM_N, "ld a,%02hhXh" }, // 3e +{ CCF, INV, INV, INV, 4, TYPE_NONE, "ccf" }, // 3f +{ LD_R_R, REG_B, REG_B, INV, 4, TYPE_NONE, "ld b,b" }, // 40 +{ LD_R_R, REG_B, REG_C, INV, 4, TYPE_NONE, "ld b,c" }, // 41 +{ LD_R_R, REG_B, REG_D, INV, 4, TYPE_NONE, "ld b,d" }, // 42 +{ LD_R_R, REG_B, REG_E, INV, 4, TYPE_NONE, "ld b,e" }, // 43 +{ LD_R_R, REG_B, REG_H, INV, 4, TYPE_NONE, "ld b,h" }, // 44 +{ LD_R_R, REG_B, REG_L, INV, 4, TYPE_NONE, "ld b,l" }, // 45 +{ LD_R_MRR, REG_B, REG_HL, INV, 7, TYPE_NONE, "ld b,(hl)" }, // 46 +{ LD_R_R, REG_B, REG_A, INV, 4, TYPE_NONE, "ld b,a" }, // 47 +{ LD_R_R, REG_C, REG_B, INV, 4, TYPE_NONE, "ld c,b" }, // 48 +{ LD_R_R, REG_C, REG_C, INV, 4, TYPE_NONE, "ld c,c" }, // 49 +{ LD_R_R, REG_C, REG_D, INV, 4, TYPE_NONE, "ld c,d" }, // 4a +{ LD_R_R, REG_C, REG_E, INV, 4, TYPE_NONE, "ld c,e" }, // 4b +{ LD_R_R, REG_C, REG_H, INV, 4, TYPE_NONE, "ld c,h" }, // 4c +{ LD_R_R, REG_C, REG_L, INV, 4, TYPE_NONE, "ld c,l" }, // 4d +{ LD_R_MRR, REG_C, REG_HL, INV, 7, TYPE_NONE, "ld c,(hl)" }, // 4e +{ LD_R_R, REG_C, REG_A, INV, 4, TYPE_NONE, "ld c,a" }, // 4f +{ LD_R_R, REG_D, REG_B, INV, 4, TYPE_NONE, "ld d,b" }, // 50 +{ LD_R_R, REG_D, REG_C, INV, 4, TYPE_NONE, "ld d,c" }, // 51 +{ LD_R_R, REG_D, REG_D, INV, 4, TYPE_NONE, "ld d,d" }, // 52 +{ LD_R_R, REG_D, REG_E, INV, 4, TYPE_NONE, "ld d,e" }, // 53 +{ LD_R_R, REG_D, REG_H, INV, 4, TYPE_NONE, "ld d,h" }, // 54 +{ LD_R_R, REG_D, REG_L, INV, 4, TYPE_NONE, "ld d,l" }, // 55 +{ LD_R_MRR, REG_D, REG_HL, INV, 7, TYPE_NONE, "ld d,(hl)" }, // 56 +{ LD_R_R, REG_D, REG_A, INV, 4, TYPE_NONE, "ld d,a" }, // 57 +{ LD_R_R, REG_E, REG_B, INV, 4, TYPE_NONE, "ld e,b" }, // 58 +{ LD_R_R, REG_E, REG_C, INV, 4, TYPE_NONE, "ld e,c" }, // 59 +{ LD_R_R, REG_E, REG_D, INV, 4, TYPE_NONE, "ld e,d" }, // 5a +{ LD_R_R, REG_E, REG_E, INV, 4, TYPE_NONE, "ld e,e" }, // 5b +{ LD_R_R, REG_E, REG_H, INV, 4, TYPE_NONE, "ld e,h" }, // 5c +{ LD_R_R, REG_E, REG_L, INV, 4, TYPE_NONE, "ld e,l" }, // 5d +{ LD_R_MRR, REG_E, REG_HL, INV, 7, TYPE_NONE, "ld e,(hl)" }, // 5e +{ LD_R_R, REG_E, REG_A, INV, 4, TYPE_NONE, "ld e,a" }, // 5f +{ LD_R_R, REG_H, REG_B, INV, 4, TYPE_NONE, "ld h,b" }, // 60 +{ LD_R_R, REG_H, REG_C, INV, 4, TYPE_NONE, "ld h,c" }, // 61 +{ LD_R_R, REG_H, REG_D, INV, 4, TYPE_NONE, "ld h,d" }, // 62 +{ LD_R_R, REG_H, REG_E, INV, 4, TYPE_NONE, "ld h,e" }, // 63 +{ LD_R_R, REG_H, REG_H, INV, 4, TYPE_NONE, "ld h,h" }, // 64 +{ LD_R_R, REG_H, REG_L, INV, 4, TYPE_NONE, "ld h,l" }, // 65 +{ LD_R_MRR, REG_H, REG_HL, INV, 7, TYPE_NONE, "ld h,(hl)" }, // 66 +{ LD_R_R, REG_H, REG_A, INV, 4, TYPE_NONE, "ld h,a" }, // 67 +{ LD_R_R, REG_L, REG_B, INV, 4, TYPE_NONE, "ld l,b" }, // 68 +{ LD_R_R, REG_L, REG_C, INV, 4, TYPE_NONE, "ld l,c" }, // 69 +{ LD_R_R, REG_L, REG_D, INV, 4, TYPE_NONE, "ld l,d" }, // 6a +{ LD_R_R, REG_L, REG_E, INV, 4, TYPE_NONE, "ld l,e" }, // 6b +{ LD_R_R, REG_L, REG_H, INV, 4, TYPE_NONE, "ld l,h" }, // 6c +{ LD_R_R, REG_L, REG_L, INV, 4, TYPE_NONE, "ld l,l" }, // 6d +{ LD_R_MRR, REG_L, REG_HL, INV, 7, TYPE_NONE, "ld l,(hl)" }, // 6e +{ LD_R_R, REG_L, REG_A, INV, 4, TYPE_NONE, "ld l,a" }, // 6f +{ LD_MRR_R, REG_HL, REG_B, INV, 7, TYPE_NONE, "ld (hl),b" }, // 70 +{ LD_MRR_R, REG_HL, REG_C, INV, 7, TYPE_NONE, "ld (hl),c" }, // 71 +{ LD_MRR_R, REG_HL, REG_D, INV, 7, TYPE_NONE, "ld (hl),d" }, // 72 +{ LD_MRR_R, REG_HL, REG_E, INV, 7, TYPE_NONE, "ld (hl),e" }, // 73 +{ LD_MRR_R, REG_HL, REG_H, INV, 7, TYPE_NONE, "ld (hl),h" }, // 74 +{ LD_MRR_R, REG_HL, REG_L, INV, 7, TYPE_NONE, "ld (hl),l" }, // 75 +{ HALT, INV, INV, INV, 4, TYPE_NONE, "halt" }, // 76 +{ LD_MRR_R, REG_HL, REG_A, INV, 7, TYPE_NONE, "ld (hl),a" }, // 77 +{ LD_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "ld a,b" }, // 78 +{ LD_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "ld a,c" }, // 79 +{ LD_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "ld a,d" }, // 7a +{ LD_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "ld a,e" }, // 7b +{ LD_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "ld a,h" }, // 7c +{ LD_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "ld a,l" }, // 7d +{ LD_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "ld a,(hl)" }, // 7e +{ LD_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "ld a,a" }, // 7f +{ ADD_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "add a,b" }, // 80 +{ ADD_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "add a,c" }, // 81 +{ ADD_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "add a,d" }, // 82 +{ ADD_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "add a,e" }, // 83 +{ ADD_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "add a,h" }, // 84 +{ ADD_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "add a,l" }, // 85 +{ ADD_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "add a,(hl)" }, // 86 +{ ADD_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "add a,a" }, // 87 +{ ADC_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "adc a,b" }, // 88 +{ ADC_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "adc a,c" }, // 89 +{ ADC_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "adc a,d" }, // 8a +{ ADC_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "adc a,e" }, // 8b +{ ADC_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "adc a,h" }, // 8c +{ ADC_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "adc a,l" }, // 8d +{ ADC_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "adc a,(hl)" }, // 8e +{ ADC_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "adc a,a" }, // 8f +{ SUB_R, REG_B, INV, INV, 4, TYPE_NONE, "sub b" }, // 90 +{ SUB_R, REG_C, INV, INV, 4, TYPE_NONE, "sub c" }, // 91 +{ SUB_R, REG_D, INV, INV, 4, TYPE_NONE, "sub d" }, // 92 +{ SUB_R, REG_E, INV, INV, 4, TYPE_NONE, "sub e" }, // 93 +{ SUB_R, REG_H, INV, INV, 4, TYPE_NONE, "sub h" }, // 94 +{ SUB_R, REG_L, INV, INV, 4, TYPE_NONE, "sub l" }, // 95 +{ SUB_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "sub (hl)" }, // 96 +{ SUB_R, REG_A, INV, INV, 4, TYPE_NONE, "sub a" }, // 97 +{ SBC_R_R, REG_A, REG_B, INV, 4, TYPE_NONE, "sbc a,b" }, // 98 +{ SBC_R_R, REG_A, REG_C, INV, 4, TYPE_NONE, "sbc a,c" }, // 99 +{ SBC_R_R, REG_A, REG_D, INV, 4, TYPE_NONE, "sbc a,d" }, // 9a +{ SBC_R_R, REG_A, REG_E, INV, 4, TYPE_NONE, "sbc a,e" }, // 9b +{ SBC_R_R, REG_A, REG_H, INV, 4, TYPE_NONE, "sbc a,h" }, // 9c +{ SBC_R_R, REG_A, REG_L, INV, 4, TYPE_NONE, "sbc a,l" }, // 9d +{ SBC_R_MRR, REG_A, REG_HL, INV, 7, TYPE_NONE, "sbc a,(hl)" }, // 9e +{ SBC_R_R, REG_A, REG_A, INV, 4, TYPE_NONE, "sbc a,a" }, // 9f +{ AND_R, REG_B, INV, INV, 4, TYPE_NONE, "and b" }, // a0 +{ AND_R, REG_C, INV, INV, 4, TYPE_NONE, "and c" }, // a1 +{ AND_R, REG_D, INV, INV, 4, TYPE_NONE, "and d" }, // a2 +{ AND_R, REG_E, INV, INV, 4, TYPE_NONE, "and e" }, // a3 +{ AND_R, REG_H, INV, INV, 4, TYPE_NONE, "and h" }, // a4 +{ AND_R, REG_L, INV, INV, 4, TYPE_NONE, "and l" }, // a5 +{ AND_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "and (hl)" }, // a6 +{ AND_R, REG_A, INV, INV, 4, TYPE_NONE, "and a" }, // a7 +{ XOR_R, REG_B, INV, INV, 4, TYPE_NONE, "xor b" }, // a8 +{ XOR_R, REG_C, INV, INV, 4, TYPE_NONE, "xor c" }, // a9 +{ XOR_R, REG_D, INV, INV, 4, TYPE_NONE, "xor d" }, // aa +{ XOR_R, REG_E, INV, INV, 4, TYPE_NONE, "xor e" }, // ab +{ XOR_R, REG_H, INV, INV, 4, TYPE_NONE, "xor h" }, // ac +{ XOR_R, REG_L, INV, INV, 4, TYPE_NONE, "xor l" }, // ad +{ XOR_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "xor (hl)" }, // ae +{ XOR_R, REG_A, INV, INV, 4, TYPE_NONE, "xor a" }, // af +{ OR_R, REG_B, INV, INV, 4, TYPE_NONE, "or b" }, // b0 +{ OR_R, REG_C, INV, INV, 4, TYPE_NONE, "or c" }, // b1 +{ OR_R, REG_D, INV, INV, 4, TYPE_NONE, "or d" }, // b2 +{ OR_R, REG_E, INV, INV, 4, TYPE_NONE, "or e" }, // b3 +{ OR_R, REG_H, INV, INV, 4, TYPE_NONE, "or h" }, // b4 +{ OR_R, REG_L, INV, INV, 4, TYPE_NONE, "or l" }, // b5 +{ OR_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "or (hl)" }, // b6 +{ OR_R, REG_A, INV, INV, 4, TYPE_NONE, "or a" }, // b7 +{ CP_R, REG_B, INV, INV, 4, TYPE_NONE, "cp b" }, // b8 +{ CP_R, REG_C, INV, INV, 4, TYPE_NONE, "cp c" }, // b9 +{ CP_R, REG_D, INV, INV, 4, TYPE_NONE, "cp d" }, // ba +{ CP_R, REG_E, INV, INV, 4, TYPE_NONE, "cp e" }, // bb +{ CP_R, REG_H, INV, INV, 4, TYPE_NONE, "cp h" }, // bc +{ CP_R, REG_L, INV, INV, 4, TYPE_NONE, "cp l" }, // bd +{ CP_MRR, REG_HL, INV, INV, 7, TYPE_NONE, "cp (hl)" }, // be +{ CP_R, REG_A, INV, INV, 4, TYPE_NONE, "cp a" }, // bf +{ RET_C, COND_NZ, INV, 5, 11, TYPE_NONE, "ret nz" }, // c0 +{ POP_RR, REG_BC, INV, INV, 10, TYPE_NONE, "pop bc" }, // c1 +{ JP_C_MNN, COND_NZ, INV, INV, 10, TYPE_IMM_NN, "jp nz,(%04hXh)" }, // c2 +{ JP_MNN, INV, INV, INV, 10, TYPE_IMM_NN, "jp (%04hXh)" }, // c3 +{ CALL_C_MNN, COND_NZ, INV, 10, 17, TYPE_IMM_NN, "call nz,(%04hXh)" }, // c4 +{ PUSH_RR, REG_BC, INV, INV, 11, TYPE_NONE, "push bc" }, // c5 +{ ADD_R_N, REG_A, INV, INV, 7, TYPE_IMM_N, "add a,%02hhXh" }, // c6 +{ RST, 0x0, INV, INV, 11, TYPE_NONE, "rst 0h" }, // c7 +{ RET_C, COND_Z, INV, 5, 11, TYPE_NONE, "ret z" }, // c8 +{ RET, INV, INV, INV, 10, TYPE_NONE, "ret" }, // c9 +{ JP_C_MNN, COND_Z, INV, INV, 10, TYPE_IMM_NN, "jp z,(%04hXh)" }, // ca +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // cb +{ CALL_C_MNN, COND_Z, INV, 10, 17, TYPE_IMM_NN, "call z,(%04hXh)" }, // cc +{ CALL_MNN, INV, INV, INV, 17, TYPE_IMM_NN, "call (%04hXh)" }, // cd +{ ADC_R_N, REG_A, INV, INV, 7, TYPE_IMM_N, "adc a,%02hhXh" }, // ce +{ RST, 0x8, INV, INV, 11, TYPE_NONE, "rst 8h" }, // cf +{ RET_C, COND_NC, INV, INV, 5, TYPE_NONE, "ret nc" }, // d0 +{ POP_RR, REG_DE, INV, INV, 10, TYPE_NONE, "pop de" }, // d1 +{ JP_C_MNN, COND_NC, INV, INV, 10, TYPE_IMM_NN, "jp nc,(%04hXh)" }, // d2 +{ OUT_MN_R, INV, REG_A, INV, 11, TYPE_IMM_N, "out (%02hhXh),a" }, // d3 +{ CALL_C_MNN, COND_NC, INV, 10, 17, TYPE_IMM_NN, "call nc,(%04hXh)" }, // d4 +{ PUSH_RR, REG_DE, INV, INV, 11, TYPE_NONE, "push de" }, // d5 +{ SUB_N, INV, INV, INV, 7, TYPE_IMM_N, "sub %02hhXh" }, // d6 +{ RST, 0x10, INV, INV, 11, TYPE_NONE, "rst 10h" }, // d7 +{ RET_C, COND_C, INV, INV, 5, TYPE_NONE, "ret c" }, // d8 +{ EXX, INV, INV, INV, 4, TYPE_NONE, "exx" }, // d9 +{ JP_C_MNN, COND_C, INV, INV, 10, TYPE_IMM_NN, "jp c,(%04hXh)" }, // da +{ IN_R_MN, REG_A, INV, INV, 11, TYPE_IMM_N, "in a,(%02hhXh)" }, // db +{ CALL_C_MNN, COND_C, INV, 10, 17, TYPE_IMM_NN, "call c,(%04hXh)" }, // dc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // dd +{ SBC_R_N, REG_A, INV, INV, 15, TYPE_IMM_N, "sbc a,%02hhXh" }, // de +{ RST, 0x18, INV, INV, 11, TYPE_NONE, "rst 18h" }, // df +{ RET_C, COND_PO, INV, 5, 11, TYPE_NONE, "ret po" }, // e0 +{ POP_RR, REG_HL, INV, INV, 10, TYPE_NONE, "pop hl" }, // e1 +{ JP_C_MNN, COND_PO, INV, INV, 10, TYPE_IMM_NN, "jp po,(%04hXh)" }, // e2 +{ EX_MRR_RR, REG_SP, REG_HL, INV, 19, TYPE_NONE, "ex (sp),hl" }, // e3 +{ CALL_C_MNN, COND_PO, INV, 10, 17, TYPE_IMM_NN, "call po,(%04hXh)" }, // e4 +{ PUSH_RR, REG_HL, INV, INV, 11, TYPE_NONE, "push hl" }, // e5 +{ AND_N, INV, INV, INV, 7, TYPE_IMM_N, "and %02hhXh" }, // e6 +{ RST, 0x20, INV, INV, 11, TYPE_NONE, "rst 20h" }, // e7 +{ RET_C, COND_PE, INV, 5, 11, TYPE_NONE, "ret pe" }, // e8 +{ JP_MRR, REG_HL, INV, INV, 4, TYPE_NONE, "jp (hl)" }, // e9 +{ JP_C_MNN, COND_PE, INV, INV, 10, TYPE_IMM_NN, "jp pe,(%04hXh)" }, // ea +{ EX_RR_RR, REG_DE, REG_HL, INV, 4, TYPE_NONE, "ex de,hl" }, // eb +{ CALL_C_MNN, COND_PE, INV, 10, 17, TYPE_IMM_NN, "call pe,(%04hXh)" }, // ec +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // ed +{ XOR_N, INV, INV, INV, 7, TYPE_IMM_N, "xor %02hhXh" }, // ee +{ RST, 0x28, INV, INV, 11, TYPE_NONE, "rst 28h" }, // ef +{ RET_C, COND_P, INV, 5, 11, TYPE_NONE, "ret p" }, // f0 +{ POP_RR, REG_AF, INV, INV, 10, TYPE_NONE, "pop af" }, // f1 +{ JP_C_MNN, COND_P, INV, INV, 10, TYPE_IMM_NN, "jp p,(%04hXh)" }, // f2 +{ DI, INV, INV, INV, 4, TYPE_NONE, "di" }, // f3 +{ CALL_C_MNN, COND_P, INV, 10, 17, TYPE_IMM_NN, "call p,(%04hXh)" }, // f4 +{ PUSH_RR, REG_AF, INV, INV, 11, TYPE_NONE, "push af" }, // f5 +{ OR_N, INV, INV, INV, 7, TYPE_IMM_N, "or %02hhXh" }, // f6 +{ RST, 0x30, INV, INV, 11, TYPE_NONE, "rst 30h" }, // f7 +{ RET_C, COND_M, INV, 5, 11, TYPE_NONE, "ret m" }, // f8 +{ LD_RR_RR, REG_SP, REG_HL, INV, 6, TYPE_NONE, "ld sp,hl" }, // f9 +{ JP_C_MNN, COND_M, INV, INV, 10, TYPE_IMM_NN, "jp m,(%04hXh)" }, // fa +{ EI, INV, INV, INV, 4, TYPE_NONE, "ei" }, // fb +{ CALL_C_MNN, COND_M, INV, 10, 17, TYPE_IMM_NN, "call m,(%04hXh)" }, // fc +{ NOP, INV, INV, INV, 8, TYPE_NONE, "nop" }, // fd +{ CP_N, INV, INV, INV, 7, TYPE_IMM_N, "cp %02hhXh" }, // fe +{ RST, 0x38, INV, INV, 11, TYPE_NONE, "rst 38h" }, // ff