From da8a5a729b6bd7601c6668a3089e97b06693fb23 Mon Sep 17 00:00:00 2001
From: pjht <pterpstra@pterpstra.com>
Date: Thu, 8 Feb 2024 09:36:57 -0600
Subject: [PATCH] Switch to using cards to provide memory

---
 src/load_bin_window.rs |  4 ++--
 src/state.rs           | 35 +++++++++++++++++++----------------
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/src/load_bin_window.rs b/src/load_bin_window.rs
index 9d2f78c..2c29e65 100644
--- a/src/load_bin_window.rs
+++ b/src/load_bin_window.rs
@@ -65,7 +65,7 @@ impl LoadBinWindow {
         match self.ftype {
             BinaryType::Raw => {
                 let bin = std::fs::read(path).unwrap();
-                state.write_binary(self.start_addr as usize, &bin);
+                state.write_binary(self.start_addr, &bin);
             }
             BinaryType::IntelHex => {
                 let data = std::fs::read_to_string(path).unwrap();
@@ -73,7 +73,7 @@ impl LoadBinWindow {
                     let record = record.unwrap();
                     match record {
                         ihex::Record::Data { offset, value } => {
-                            state.write_binary(offset as usize, &value);
+                            state.write_binary(offset, &value);
                         }
                         ihex::Record::StartLinearAddress(_) => todo!(),
                         ihex::Record::EndOfFile => (),
diff --git a/src/state.rs b/src/state.rs
index e6b0919..35e86d6 100644
--- a/src/state.rs
+++ b/src/state.rs
@@ -1,7 +1,5 @@
 use std::sync::mpsc::Sender;
 
-use rand::RngCore;
-
 use crate::{
     audio::AudioMessage,
     card::{Card, Type},
@@ -11,7 +9,6 @@ use crate::{
 };
 
 pub struct EmuState {
-    mem: [u8; 65536],
     cpu: I8080,
     running: bool,
     audio_tx: Sender<AudioMessage>,
@@ -26,14 +23,11 @@ impl EmuState {
         options: Options,
         cards: Vec<(String, String)>,
     ) -> Self {
-        let mut mem = [0; 65536];
-        rand::thread_rng().fill_bytes(&mut mem);
         let cards = cards.iter().map(|(typ_name, settings)| {
             let typ = Type::get(&typ_name).unwrap();
             (typ, typ.new_card(ron::from_str(&settings).unwrap()).unwrap())
         }).collect();
         let mut slf = Self {
-            mem,
             cpu: I8080::new(),
             running: false,
             audio_tx,
@@ -77,13 +71,12 @@ impl EmuState {
                         ActionSwitch::Deposit => {
                             if state == SwitchState::Up {
                                 // Assume M1
-                                self.mem[self.cpu.get_mem_cycle().address() as usize] =
-                                    self.fp_state.ad_sws() as u8;
+
+                                self.write_mem(self.cpu.get_mem_cycle().address(), self.fp_state.ad_sws() as u8);
                             } else if state == SwitchState::Down {
                                 // Assume M1
                                 self.cpu.finish_m_cycle(0x0); // NOP
-                                self.mem[self.cpu.get_mem_cycle().address() as usize] =
-                                    self.fp_state.ad_sws() as u8;
+                                self.write_mem(self.cpu.get_mem_cycle().address(), self.fp_state.ad_sws() as u8);
                             }
                         }
                         ActionSwitch::Reset => {
@@ -123,7 +116,8 @@ impl EmuState {
         self.fp_state.set_status(cycle.get_status());
         match cycle {
             MemCycle::Fetch(a) | MemCycle::Read(a) | MemCycle::StackRead(a) => {
-                self.fp_state.set_data(self.mem[a as usize]);
+                let data = self.read_mem(a);
+                self.fp_state.set_data(data);
             }
             MemCycle::Write(_, _)
             | MemCycle::StackWrite(_, _)
@@ -142,9 +136,9 @@ impl EmuState {
     pub fn run_cpu_cycle(&mut self) {
         let cycle = self.cpu.get_mem_cycle();
         let data = match cycle {
-            MemCycle::Fetch(a) | MemCycle::Read(a) | MemCycle::StackRead(a) => self.mem[a as usize],
+            MemCycle::Fetch(a) | MemCycle::Read(a) | MemCycle::StackRead(a) => self.read_mem(a),
             MemCycle::Write(a, d) | MemCycle::StackWrite(a, d) => {
-                self.mem[a as usize] = d;
+                self.write_mem(a, d);
                 0
             }
             MemCycle::In(_) => 0,
@@ -159,9 +153,11 @@ impl EmuState {
         self.cpu.finish_m_cycle(data);
     }
 
-    pub fn write_binary(&mut self, start: usize, data: &[u8]) {
-        assert!(0x1_0000 - start >= data.len());
-        self.mem[start..(start + data.len())].copy_from_slice(data);
+    pub fn write_binary(&mut self, start: u16, data: &[u8]) {
+        assert!(0x1_0000 - (start as usize) >= data.len());
+        for (i, byte) in data.iter().enumerate() {
+            self.write_mem(i as u16 + start, *byte);
+        }
     }
 
     pub fn update_options(&mut self, new_opts: Options) {
@@ -214,4 +210,11 @@ impl EmuState {
     pub fn save_cards(&self) -> Vec<(String, String)> {
         self.cards.iter().map(|(typ, card)| (typ.name().to_string(), card.get_settings())).collect()
     }
+
+    fn read_mem(&mut self, address: u16) -> u8 {
+        self.cards.iter_mut().find_map(|(_, card)| card.read_mem(address)).unwrap_or(0xFF)
+    }
+    fn write_mem(&mut self, address: u16, data: u8) {
+        self.cards.iter_mut().find_map(|(_, card)| card.write_mem(address, data));
+    }
 }