diff --git a/src/state.rs b/src/state.rs
index 8211607..5227a4b 100644
--- a/src/state.rs
+++ b/src/state.rs
@@ -108,25 +108,19 @@ impl EmuState {
             return;
         }
         let cycle = self.cpu.get_mem_cycle();
+        self.fp_state.set_addr(cycle.address());
         self.fp_state.set_status(cycle.get_status());
         match cycle {
             MemCycle::Fetch(a) | MemCycle::Read(a) | MemCycle::StackRead(a) => {
-                self.fp_state.set_addr(a);
                 self.fp_state.set_data(self.mem[a as usize]);
             }
-            MemCycle::Write(a, _) | MemCycle::StackWrite(a, _) | MemCycle::Out(a, _) => {
-                self.fp_state.set_addr(a);
+            MemCycle::Write(_, _) | MemCycle::StackWrite(_, _) | MemCycle::Out(_, _) | MemCycle::Hlta => {
                 self.fp_state.set_data(0xff);
             }
-            MemCycle::In(a) => {
-                self.fp_state.set_addr(a);
+            MemCycle::In(_) => {
                 self.fp_state.set_data(0);
             }
             MemCycle::Inta(_) => todo!(),
-            MemCycle::Hlta => {
-                self.fp_state.set_addr(0xffff);
-                self.fp_state.set_data(0xff);
-            }
             MemCycle::IntaHlt(_) => todo!(),
         }
     }