EESchema Schematic File Version 4 LIBS:motherboard-cache EELAYER 29 0 EELAYER END $Descr USLetter 11000 8500 encoding utf-8 Sheet 2 4 Title "" Date "" Rev "" Comp "" Comment1 "" Comment2 "" Comment3 "" Comment4 "" $EndDescr $Comp L Memory_RAM:AS6C4008-55PCN U? U 1 1 5D7FBFC9 P 1450 1850 AR Path="/5D7FBFC9" Ref="U?" Part="1" AR Path="/5D7E5BE3/5D7FBFC9" Ref="U3" Part="1" F 0 "U3" H 1700 3000 50 0000 C CNN F 1 "AS6C4008-55PCN" H 1850 2900 50 0000 C CNN F 2 "Package_DIP:DIP-32_W15.24mm_Socket" H 1450 1950 50 0001 C CNN F 3 "https://www.alliancememory.com/wp-content/uploads/pdf/AS6C4008.pdf" H 1450 1950 50 0001 C CNN 1 1450 1850 1 0 0 -1 $EndComp Text GLabel 950 950 0 50 3State ~ 0 A0 Text GLabel 950 1050 0 50 3State ~ 0 A1 Text GLabel 950 1150 0 50 3State ~ 0 A2 Text GLabel 950 1250 0 50 3State ~ 0 A3 Text GLabel 950 1350 0 50 3State ~ 0 A4 Text GLabel 950 1450 0 50 3State ~ 0 A5 Text GLabel 950 1550 0 50 3State ~ 0 A6 Text GLabel 950 1650 0 50 3State ~ 0 A7 Text GLabel 950 1750 0 50 3State ~ 0 A8 Text GLabel 950 1850 0 50 3State ~ 0 A9 Text GLabel 950 1950 0 50 3State ~ 0 A10 Text GLabel 950 2050 0 50 3State ~ 0 A11 Text GLabel 950 2150 0 50 3State ~ 0 A12 Text GLabel 950 2250 0 50 3State ~ 0 A13 Text GLabel 1950 2050 2 50 Input ~ 0 ~RD Text GLabel 1950 2150 2 50 Input ~ 0 ~WR $Comp L power:GND #PWR? U 1 1 5D7FBFE5 P 1450 2950 AR Path="/5D7FBFE5" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D7FBFE5" Ref="#PWR020" Part="1" F 0 "#PWR020" H 1450 2700 50 0001 C CNN F 1 "GND" H 1455 2777 50 0000 C CNN F 2 "" H 1450 2950 50 0001 C CNN F 3 "" H 1450 2950 50 0001 C CNN 1 1450 2950 1 0 0 -1 $EndComp Text GLabel 1950 950 2 50 3State ~ 0 D0 Text GLabel 1950 1050 2 50 3State ~ 0 D1 Text GLabel 1950 1150 2 50 3State ~ 0 D2 Text GLabel 1950 1250 2 50 3State ~ 0 D3 Text GLabel 1950 1350 2 50 3State ~ 0 D4 Text GLabel 1950 1450 2 50 3State ~ 0 D5 Text GLabel 1950 1550 2 50 3State ~ 0 D6 Text GLabel 1950 1650 2 50 3State ~ 0 D7 $Comp L power:+5V #PWR? U 1 1 5D7FBFF3 P 1450 750 AR Path="/5D7FBFF3" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D7FBFF3" Ref="#PWR019" Part="1" F 0 "#PWR019" H 1450 600 50 0001 C CNN F 1 "+5V" H 1465 923 50 0000 C CNN F 2 "" H 1450 750 50 0001 C CNN F 3 "" H 1450 750 50 0001 C CNN 1 1450 750 1 0 0 -1 $EndComp $Comp L Memory_RAM:AS6C4008-55PCN U? U 1 1 5D7FBFF9 P 3200 1850 AR Path="/5D7FBFF9" Ref="U?" Part="1" AR Path="/5D7E5BE3/5D7FBFF9" Ref="U4" Part="1" F 0 "U4" H 3450 3000 50 0000 C CNN F 1 "AS6C4008-55PCN" H 3600 2900 50 0000 C CNN F 2 "Package_DIP:DIP-32_W15.24mm_Socket" H 3200 1950 50 0001 C CNN F 3 "https://www.alliancememory.com/wp-content/uploads/pdf/AS6C4008.pdf" H 3200 1950 50 0001 C CNN 1 3200 1850 1 0 0 -1 $EndComp Text GLabel 2700 950 0 50 3State ~ 0 A0 Text GLabel 2700 1050 0 50 3State ~ 0 A1 Text GLabel 2700 1150 0 50 3State ~ 0 A2 Text GLabel 2700 1250 0 50 3State ~ 0 A3 Text GLabel 2700 1350 0 50 3State ~ 0 A4 Text GLabel 2700 1450 0 50 3State ~ 0 A5 Text GLabel 2700 1550 0 50 3State ~ 0 A6 Text GLabel 2700 1650 0 50 3State ~ 0 A7 Text GLabel 2700 1750 0 50 3State ~ 0 A8 Text GLabel 2700 1850 0 50 3State ~ 0 A9 Text GLabel 2700 1950 0 50 3State ~ 0 A10 Text GLabel 2700 2050 0 50 3State ~ 0 A11 Text GLabel 2700 2150 0 50 3State ~ 0 A12 Text GLabel 2700 2250 0 50 3State ~ 0 A13 Text GLabel 3700 2050 2 50 Input ~ 0 ~RD Text GLabel 3700 2150 2 50 Input ~ 0 ~WR Text GLabel 3700 950 2 50 3State ~ 0 D0 Text GLabel 3700 1050 2 50 3State ~ 0 D1 Text GLabel 3700 1150 2 50 3State ~ 0 D2 Text GLabel 3700 1250 2 50 3State ~ 0 D3 Text GLabel 3700 1350 2 50 3State ~ 0 D4 Text GLabel 3700 1450 2 50 3State ~ 0 D5 Text GLabel 3700 1550 2 50 3State ~ 0 D6 Text GLabel 3700 1650 2 50 3State ~ 0 D7 $Comp L power:+5V #PWR? U 1 1 5D7FC023 P 3200 750 AR Path="/5D7FC023" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D7FC023" Ref="#PWR023" Part="1" F 0 "#PWR023" H 3200 600 50 0001 C CNN F 1 "+5V" H 3215 923 50 0000 C CNN F 2 "" H 3200 750 50 0001 C CNN F 3 "" H 3200 750 50 0001 C CNN 1 3200 750 1 0 0 -1 $EndComp Text GLabel 5250 900 2 50 3State ~ 0 D0 Text GLabel 5250 1000 2 50 3State ~ 0 D1 Text GLabel 5250 1100 2 50 3State ~ 0 D2 Text GLabel 5250 1200 2 50 3State ~ 0 D3 Text GLabel 5250 1300 2 50 3State ~ 0 D4 Text GLabel 5250 1400 2 50 3State ~ 0 D5 Text GLabel 5250 1500 2 50 3State ~ 0 D6 Text GLabel 5250 1600 2 50 3State ~ 0 D7 $Comp L Memory_EEPROM:28C256 U? U 1 1 5D7FFB91 P 4850 1800 AR Path="/5D7FFB91" Ref="U?" Part="1" AR Path="/5D7E5BE3/5D7FFB91" Ref="U5" Part="1" F 0 "U5" H 5000 3000 50 0000 C CNN F 1 "28C256" H 5050 2900 50 0000 C CNN F 2 "Package_DIP:DIP-28_W15.24mm_Socket" H 4850 1800 50 0001 C CNN F 3 "http://ww1.microchip.com/downloads/en/DeviceDoc/doc0006.pdf" H 4850 1800 50 0001 C CNN 1 4850 1800 1 0 0 -1 $EndComp $Comp L power:GND #PWR? U 1 1 5D7FFB97 P 4850 2900 AR Path="/5D7FFB97" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D7FFB97" Ref="#PWR028" Part="1" F 0 "#PWR028" H 4850 2650 50 0001 C CNN F 1 "GND" H 4855 2727 50 0000 C CNN F 2 "" H 4850 2900 50 0001 C CNN F 3 "" H 4850 2900 50 0001 C CNN 1 4850 2900 1 0 0 -1 $EndComp $Comp L power:+5V #PWR? U 1 1 5D7FFB9D P 4850 700 AR Path="/5D7FFB9D" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D7FFB9D" Ref="#PWR027" Part="1" F 0 "#PWR027" H 4850 550 50 0001 C CNN F 1 "+5V" H 4865 873 50 0000 C CNN F 2 "" H 4850 700 50 0001 C CNN F 3 "" H 4850 700 50 0001 C CNN 1 4850 700 1 0 0 -1 $EndComp Text GLabel 4450 900 0 50 3State ~ 0 A0 Text GLabel 4450 1000 0 50 3State ~ 0 A1 Text GLabel 4450 1100 0 50 3State ~ 0 A2 Text GLabel 4450 1200 0 50 3State ~ 0 A3 Text GLabel 4450 1300 0 50 3State ~ 0 A4 Text GLabel 4450 1400 0 50 3State ~ 0 A5 Text GLabel 4450 1500 0 50 3State ~ 0 A6 Text GLabel 4450 1600 0 50 3State ~ 0 A7 Text GLabel 4450 1700 0 50 3State ~ 0 A8 Text GLabel 4450 1800 0 50 3State ~ 0 A9 Text GLabel 4450 1900 0 50 3State ~ 0 A10 Text GLabel 4450 2000 0 50 3State ~ 0 A11 Text GLabel 4450 2100 0 50 3State ~ 0 A12 Text GLabel 4450 2200 0 50 3State ~ 0 A13 Text GLabel 4450 2600 0 50 Input ~ 0 ~RD Text GLabel 4450 2500 0 50 Input ~ 0 ~WR Text HLabel 4450 2300 0 50 Input ~ 0 MEM_A14 Text HLabel 2700 2750 0 50 Input ~ 0 MEM_A18 Text HLabel 2700 2650 0 50 Input ~ 0 MEM_A17 Text HLabel 2700 2550 0 50 Input ~ 0 MEM_A16 Text HLabel 2700 2450 0 50 Input ~ 0 MEM_A15 Text HLabel 2700 2350 0 50 Input ~ 0 MEM_A14 Text HLabel 950 2750 0 50 Input ~ 0 MEM_A18 Text HLabel 950 2650 0 50 Input ~ 0 MEM_A17 Text HLabel 950 2550 0 50 Input ~ 0 MEM_A16 Text HLabel 950 2450 0 50 Input ~ 0 MEM_A15 Text HLabel 950 2350 0 50 Input ~ 0 MEM_A14 Text HLabel 4450 2700 0 50 Input ~ 0 MEM_ROM Text HLabel 3700 1950 2 50 Input ~ 0 MEM_512K2 Text HLabel 1950 1950 2 50 Input ~ 0 MEM_512K1 $Comp L power:GND #PWR024 U 1 1 5D8280A2 P 3200 2950 F 0 "#PWR024" H 3200 2700 50 0001 C CNN F 1 "GND" H 3205 2777 50 0000 C CNN F 2 "" H 3200 2950 50 0001 C CNN F 3 "" H 3200 2950 50 0001 C CNN 1 3200 2950 1 0 0 -1 $EndComp NoConn ~ -1950 6250 NoConn ~ 600 3550 $Comp L power:+5V #PWR? U 1 1 5D8ABD55 P 2750 3550 AR Path="/5D8ABD55" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D8ABD55" Ref="#PWR021" Part="1" F 0 "#PWR021" H 2750 3400 50 0001 C CNN F 1 "+5V" H 2765 3723 50 0000 C CNN F 2 "" H 2750 3550 50 0001 C CNN F 3 "" H 2750 3550 50 0001 C CNN 1 2750 3550 1 0 0 -1 $EndComp $Comp L power:GND #PWR? U 1 1 5D8ABD5B P 2750 3750 AR Path="/5D8ABD5B" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D8ABD5B" Ref="#PWR022" Part="1" F 0 "#PWR022" H 2750 3500 50 0001 C CNN F 1 "GND" H 2755 3577 50 0000 C CNN F 2 "" H 2750 3750 50 0001 C CNN F 3 "" H 2750 3750 50 0001 C CNN 1 2750 3750 1 0 0 -1 $EndComp $Comp L Device:C_Small C? U 1 1 5D8ABD61 P 2750 3650 AR Path="/5D8ABD61" Ref="C?" Part="1" AR Path="/5D7E5BE3/5D8ABD61" Ref="C3" Part="1" F 0 "C3" H 2842 3696 50 0000 L CNN F 1 "0.1u" H 2842 3605 50 0000 L CNN F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 2750 3650 50 0001 C CNN F 3 "~" H 2750 3650 50 0001 C CNN 1 2750 3650 1 0 0 -1 $EndComp $Comp L power:+5V #PWR? U 1 1 5D8AC5F3 P 3250 3550 AR Path="/5D8AC5F3" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D8AC5F3" Ref="#PWR025" Part="1" F 0 "#PWR025" H 3250 3400 50 0001 C CNN F 1 "+5V" H 3265 3723 50 0000 C CNN F 2 "" H 3250 3550 50 0001 C CNN F 3 "" H 3250 3550 50 0001 C CNN 1 3250 3550 1 0 0 -1 $EndComp $Comp L power:GND #PWR? U 1 1 5D8AC5F9 P 3250 3750 AR Path="/5D8AC5F9" Ref="#PWR?" Part="1" AR Path="/5D7E5BE3/5D8AC5F9" Ref="#PWR026" Part="1" F 0 "#PWR026" H 3250 3500 50 0001 C CNN F 1 "GND" H 3255 3577 50 0000 C CNN F 2 "" H 3250 3750 50 0001 C CNN F 3 "" H 3250 3750 50 0001 C CNN 1 3250 3750 1 0 0 -1 $EndComp $Comp L Device:C_Small C? U 1 1 5D8AC5FF P 3250 3650 AR Path="/5D8AC5FF" Ref="C?" Part="1" AR Path="/5D7E5BE3/5D8AC5FF" Ref="C4" Part="1" F 0 "C4" H 3342 3696 50 0000 L CNN F 1 "0.1u" H 3342 3605 50 0000 L CNN F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 3250 3650 50 0001 C CNN F 3 "~" H 3250 3650 50 0001 C CNN 1 3250 3650 1 0 0 -1 $EndComp $EndSCHEMATC