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riscv32: align stack pointer to 16-bytes

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Even though rv32 is only 32-bits, all RISC-V stacks must be aligned to a
16-byte boundary. For discussion on this, see:

https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/21

As an example of why this is important, the `c.addi16sp` compressed
instruction is only able to adjust the stack pointer by 16-byte
increments.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2023-12-27 23:43:26 +08:00 committed by Gary Guo
parent ad1b65a9b6
commit cf89c1934c
1 changed files with 4 additions and 4 deletions
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8
src/unwinder/arch/riscv32.rs
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@ -176,7 +176,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
asm!( asm!(
" "
mv t0, sp mv t0, sp
add sp, sp, -0x188 add sp, sp, -0x190
sw ra, 0x180(sp) sw ra, 0x180(sp)
", ",
code!(save_gp), code!(save_gp),
@ -186,7 +186,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
mv a0, sp mv a0, sp
jalr t0 jalr t0
lw ra, 0x180(sp) lw ra, 0x180(sp)
add sp, sp, 0x188 add sp, sp, 0x190
ret ret
", ",
options(noreturn) options(noreturn)
@ -197,7 +197,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
asm!( asm!(
" "
mv t0, sp mv t0, sp
add sp, sp, -0x88 add sp, sp, -0x90
sw ra, 0x80(sp) sw ra, 0x80(sp)
", ",
code!(save_gp), code!(save_gp),
@ -206,7 +206,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
mv a0, sp mv a0, sp
jalr t0 jalr t0
lw ra, 0x80(sp) lw ra, 0x80(sp)
add sp, sp, 0x88 add sp, sp, 0x90
ret ret
", ",
options(noreturn) options(noreturn)