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Rollup merge of #53950 - michaelwoerister:more-lto-cli, r=alexcrichton
2018-09-14 00:46:45 +08:00
debuginfo
Merge indexed_set.rs into bitvec.rs, and rename it bit_set.rs.
2018-09-18 07:08:09 +10:00
llvm
Provide a way of accessing the ThinLTO module import map in rustc.
2018-08-31 15:22:52 +02:00
mir
Refactor 'ReadForMatch' into 'FakeRead' and add the cause of the fake read
2018-09-18 14:36:37 +02:00
abi.rs
Remove Ty prefix from Ty{Adt|Array|Slice|RawPtr|Ref|FnDef|FnPtr|Dynamic|Closure|Generator|GeneratorWitness|Never|Tuple|Projection|Anon|Infer|Error}
2018-08-22 16:07:44 +01:00
allocator.rs
asm.rs
attributes.rs
Rollup merge of #52514 - DiamondLovesYou:amdgpu-fixes, r=eddyb
2018-09-12 12:17:22 +08:00
base.rs
Always add all modules to the global ThinLTO module analysis when compiling incrementally.
2018-08-31 15:22:52 +02:00
build.rs
builder.rs
Fix an AMDGPU related load bit range metadata assertion.
2018-08-23 14:31:10 -05:00
callee.rs
AMDGPU ignores noinline when it slaps alwaysinline everywhere.
2018-08-23 14:30:57 -05:00
Cargo.toml
Support local ThinLTO with incremental compilation.
2018-08-31 15:22:52 +02:00
common.rs
Remove Ty prefix from Ty{Adt|Array|Slice|RawPtr|Ref|FnDef|FnPtr|Dynamic|Closure|Generator|GeneratorWitness|Never|Tuple|Projection|Anon|Infer|Error}
2018-08-22 16:07:44 +01:00
consts.rs
Rename hir::map::NodeKind to hir::Node
2018-08-27 21:46:23 +01:00
context.rs
Remove Ty prefix from Ty{Bool|Char|Int|Uint|Float|Str}
2018-08-22 16:08:49 +01:00
declare.rs
diagnostics.rs
glue.rs
Remove Ty prefix from Ty{Bool|Char|Int|Uint|Float|Str}
2018-08-22 16:08:49 +01:00
intrinsic.rs
renamed mk_nil to mk_unit
2018-09-10 11:07:13 +09:00
lib.rs
stabalize infer outlives requirements (RFC 2093).
2018-09-11 11:40:04 -04:00
llvm_util.rs
Auto merge of #53878 - alexcrichton:wasm-atomics-feature, r=eddyb
2018-09-05 13:19:19 +00:00
metadata.rs
meth.rs
mono_item.rs
AMDGPU ignores noinline when it slaps alwaysinline everywhere.
2018-08-23 14:30:57 -05:00
README.md
type_.rs
type_of.rs
rustc_codegen_llvm: don't assume offsets are always aligned.
2018-09-06 20:56:20 +03:00
value.rs
