149 lines
4.3 KiB
Rust
149 lines
4.3 KiB
Rust
//@ revisions: x86 x86-avx2 x86-avx512 aarch64
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//@ [x86] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
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//@ [x86] needs-llvm-components: x86
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//@ [x86-avx2] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
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//@ [x86-avx2] compile-flags: -C target-feature=+avx2
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//@ [x86-avx2] needs-llvm-components: x86
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//@ [x86-avx512] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
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//@ [x86-avx512] compile-flags: -C target-feature=+avx512f,+avx512vl,+avx512bw,+avx512dq
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//@ [x86-avx512] needs-llvm-components: x86
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//@ [aarch64] compile-flags: --target=aarch64-unknown-linux-gnu
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//@ [aarch64] needs-llvm-components: aarch64
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//@ assembly-output: emit-asm
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//@ compile-flags: --crate-type=lib -O -C panic=abort
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#![feature(no_core, lang_items, repr_simd, intrinsics)]
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#![no_core]
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#![allow(non_camel_case_types)]
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// Because we don't have core yet.
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#[lang = "sized"]
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pub trait Sized {}
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#[lang = "copy"]
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trait Copy {}
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#[repr(simd)]
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pub struct m8x16([i8; 16]);
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#[repr(simd)]
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pub struct m8x64([i8; 64]);
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#[repr(simd)]
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pub struct m32x4([i32; 4]);
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#[repr(simd)]
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pub struct m64x2([i64; 2]);
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#[repr(simd)]
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pub struct m64x4([i64; 4]);
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extern "rust-intrinsic" {
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fn simd_bitmask<V, B>(mask: V) -> B;
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}
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// CHECK-LABEL: bitmask_m8x16
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#[no_mangle]
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pub unsafe extern "C" fn bitmask_m8x16(mask: m8x16) -> u16 {
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// The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary.
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// Note that x86 has no byte shift, llvm uses a word shift to move the least significant bit
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// of each byte into the right position.
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//
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// x86-NOT: psllw
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// x86: movmskb eax, xmm0
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//
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// x86-avx2-NOT: vpsllw
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// x86-avx2: vpmovmskb eax, xmm0
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//
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// x86-avx512-NOT: vpsllw xmm0
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// x86-avx512: vpmovmskb eax, xmm0
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//
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// aarch64: adrp
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// aarch64-NEXT: cmlt
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// aarch64-NEXT: ldr
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// aarch64-NEXT: and
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// aarch64-NEXT: ext
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// aarch64-NEXT: zip1
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// aarch64-NEXT: addv
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// aarch64-NEXT: fmov
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simd_bitmask(mask)
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}
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// CHECK-LABEL: bitmask_m8x64
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#[no_mangle]
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pub unsafe extern "C" fn bitmask_m8x64(mask: m8x64) -> u64 {
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// The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary.
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// Note that x86 has no byte shift, llvm uses a word shift to move the least significant bit
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// of each byte into the right position.
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//
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// The parameter is a 512 bit vector which in the C abi is only valid for avx512 targets.
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//
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// x86-avx512-NOT: vpsllw
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// x86-avx512: vpmovb2m k0, zmm0
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// x86-avx512: kmovq rax, k0
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simd_bitmask(mask)
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}
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// CHECK-LABEL: bitmask_m32x4
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#[no_mangle]
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pub unsafe extern "C" fn bitmask_m32x4(mask: m32x4) -> u8 {
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// The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary.
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//
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// x86-NOT: psllq
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// x86: movmskps eax, xmm0
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//
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// x86-avx2-NOT: vpsllq
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// x86-avx2: vmovmskps eax, xmm0
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//
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// x86-avx512-NOT: vpsllq
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// x86-avx512: vmovmskps eax, xmm0
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//
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// aarch64: adrp
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// aarch64-NEXT: cmlt
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// aarch64-NEXT: ldr
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// aarch64-NEXT: and
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// aarch64-NEXT: addv
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// aarch64-NEXT: fmov
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// aarch64-NEXT: and
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simd_bitmask(mask)
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}
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// CHECK-LABEL: bitmask_m64x2
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#[no_mangle]
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pub unsafe extern "C" fn bitmask_m64x2(mask: m64x2) -> u8 {
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// The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary.
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//
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// x86-NOT: psllq
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// x86: movmskpd eax, xmm0
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//
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// x86-avx2-NOT: vpsllq
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// x86-avx2: vmovmskpd eax, xmm0
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//
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// x86-avx512-NOT: vpsllq
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// x86-avx512: vmovmskpd eax, xmm0
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//
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// aarch64: adrp
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// aarch64-NEXT: cmlt
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// aarch64-NEXT: ldr
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// aarch64-NEXT: and
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// aarch64-NEXT: addp
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// aarch64-NEXT: fmov
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// aarch64-NEXT: and
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simd_bitmask(mask)
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}
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// CHECK-LABEL: bitmask_m64x4
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#[no_mangle]
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pub unsafe extern "C" fn bitmask_m64x4(mask: m64x4) -> u8 {
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// The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary.
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//
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// The parameter is a 256 bit vector which in the C abi is only valid for avx/avx512 targets.
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//
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// x86-avx2-NOT: vpsllq
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// x86-avx2: vmovmskpd eax, ymm0
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//
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// x86-avx512-NOT: vpsllq
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// x86-avx512: vmovmskpd eax, ymm0
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simd_bitmask(mask)
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}
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