b0d45536ac
Update stdarch submodule and remove special handling in cranelift codegen for some AVX and SSE2 LLVM intrinsics https://github.com/rust-lang/stdarch/pull/1463 reimplemented some x86 intrinsics to avoid using some x86-specific LLVM intrinsics: * Store unaligned (`_mm*_storeu_*`) use `<*mut _>::write_unaligned` instead of `llvm.x86.*.storeu.*`. * Shift by immediate (`_mm*_s{ll,rl,ra}i_epi*`) use `if` (srl, sll) or `min` (sra) to simulate the behaviour when the RHS is out of range. RHS is constant, so the `if`/`min` will be optimized away. This PR updates the stdarch submodule to pull these changes and removes special handling for those LLVM intrinsics from cranelift codegen. I left gcc codegen untouched because there are some autogenerated lists. |
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| .. | ||
| abi | ||
| debuginfo | ||
| driver | ||
| intrinsics | ||
| optimize | ||
| allocator.rs | ||
| analyze.rs | ||
| archive.rs | ||
| base.rs | ||
| cast.rs | ||
| codegen_i128.rs | ||
| common.rs | ||
| compiler_builtins.rs | ||
| concurrency_limiter.rs | ||
| config.rs | ||
| constant.rs | ||
| discriminant.rs | ||
| global_asm.rs | ||
| inline_asm.rs | ||
| lib.rs | ||
| linkage.rs | ||
| main_shim.rs | ||
| num.rs | ||
| pointer.rs | ||
| pretty_clif.rs | ||
| toolchain.rs | ||
| trap.rs | ||
| unsize.rs | ||
| value_and_place.rs | ||
| vtable.rs | ||