873 lines
34 KiB
Rust
873 lines
34 KiB
Rust
//! Codegen of `asm!` invocations.
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use crate::prelude::*;
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use std::fmt::Write;
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use rustc_ast::ast::{InlineAsmOptions, InlineAsmTemplatePiece};
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use rustc_middle::mir::InlineAsmOperand;
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use rustc_span::sym;
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use rustc_target::asm::*;
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enum CInlineAsmOperand<'tcx> {
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In {
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reg: InlineAsmRegOrRegClass,
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value: CValue<'tcx>,
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},
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Out {
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reg: InlineAsmRegOrRegClass,
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late: bool,
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place: Option<CPlace<'tcx>>,
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},
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InOut {
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reg: InlineAsmRegOrRegClass,
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_late: bool,
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in_value: CValue<'tcx>,
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out_place: Option<CPlace<'tcx>>,
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},
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Const {
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value: String,
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},
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Symbol {
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symbol: String,
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},
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}
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pub(crate) fn codegen_inline_asm<'tcx>(
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fx: &mut FunctionCx<'_, '_, 'tcx>,
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span: Span,
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template: &[InlineAsmTemplatePiece],
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operands: &[InlineAsmOperand<'tcx>],
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options: InlineAsmOptions,
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destination: Option<mir::BasicBlock>,
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) {
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// FIXME add .eh_frame unwind info directives
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if !template.is_empty() {
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// Used by panic_abort
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if template[0] == InlineAsmTemplatePiece::String("int $$0x29".to_string()) {
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fx.bcx.ins().trap(TrapCode::User(1));
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return;
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}
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// Used by stdarch
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if template[0] == InlineAsmTemplatePiece::String("mov ".to_string())
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&& matches!(
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template[1],
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InlineAsmTemplatePiece::Placeholder {
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operand_idx: 0,
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modifier: Some('r'),
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span: _
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}
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)
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&& template[2] == InlineAsmTemplatePiece::String(", rbx".to_string())
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&& template[3] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[4] == InlineAsmTemplatePiece::String("cpuid".to_string())
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&& template[5] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[6] == InlineAsmTemplatePiece::String("xchg ".to_string())
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&& matches!(
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template[7],
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InlineAsmTemplatePiece::Placeholder {
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operand_idx: 0,
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modifier: Some('r'),
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span: _
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}
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)
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&& template[8] == InlineAsmTemplatePiece::String(", rbx".to_string())
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{
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assert_eq!(operands.len(), 4);
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let (leaf, eax_place) = match operands[1] {
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InlineAsmOperand::InOut {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::ax)),
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late: _,
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ref in_value,
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out_place: Some(out_place),
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} => (
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crate::base::codegen_operand(fx, in_value).load_scalar(fx),
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crate::base::codegen_place(fx, out_place),
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),
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_ => unreachable!(),
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};
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let ebx_place = match operands[0] {
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InlineAsmOperand::Out {
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reg:
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InlineAsmRegOrRegClass::RegClass(InlineAsmRegClass::X86(
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X86InlineAsmRegClass::reg,
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)),
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late: _,
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place: Some(place),
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} => crate::base::codegen_place(fx, place),
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_ => unreachable!(),
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};
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let (sub_leaf, ecx_place) = match operands[2] {
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InlineAsmOperand::InOut {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::cx)),
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late: _,
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ref in_value,
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out_place: Some(out_place),
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} => (
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crate::base::codegen_operand(fx, in_value).load_scalar(fx),
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crate::base::codegen_place(fx, out_place),
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),
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_ => unreachable!(),
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};
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let edx_place = match operands[3] {
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InlineAsmOperand::Out {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::dx)),
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late: _,
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place: Some(place),
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} => crate::base::codegen_place(fx, place),
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_ => unreachable!(),
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};
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let (eax, ebx, ecx, edx) = crate::intrinsics::codegen_cpuid_call(fx, leaf, sub_leaf);
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eax_place.write_cvalue(fx, CValue::by_val(eax, fx.layout_of(fx.tcx.types.u32)));
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ebx_place.write_cvalue(fx, CValue::by_val(ebx, fx.layout_of(fx.tcx.types.u32)));
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ecx_place.write_cvalue(fx, CValue::by_val(ecx, fx.layout_of(fx.tcx.types.u32)));
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edx_place.write_cvalue(fx, CValue::by_val(edx, fx.layout_of(fx.tcx.types.u32)));
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let destination_block = fx.get_block(destination.unwrap());
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fx.bcx.ins().jump(destination_block, &[]);
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return;
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}
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// Used by compiler-builtins
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if fx.tcx.symbol_name(fx.instance).name.starts_with("___chkstk") {
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// ___chkstk, ___chkstk_ms and __alloca are only used on Windows
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crate::trap::trap_unimplemented(fx, "Stack probes are not supported");
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return;
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} else if fx.tcx.symbol_name(fx.instance).name == "__alloca" {
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crate::trap::trap_unimplemented(fx, "Alloca is not supported");
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return;
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}
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// Used by measureme
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if template[0] == InlineAsmTemplatePiece::String("xor %eax, %eax".to_string())
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&& template[1] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[2] == InlineAsmTemplatePiece::String("mov %rbx, ".to_string())
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&& matches!(
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template[3],
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InlineAsmTemplatePiece::Placeholder {
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operand_idx: 0,
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modifier: Some('r'),
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span: _
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}
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)
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&& template[4] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[5] == InlineAsmTemplatePiece::String("cpuid".to_string())
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&& template[6] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[7] == InlineAsmTemplatePiece::String("mov ".to_string())
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&& matches!(
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template[8],
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InlineAsmTemplatePiece::Placeholder {
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operand_idx: 0,
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modifier: Some('r'),
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span: _
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}
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)
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&& template[9] == InlineAsmTemplatePiece::String(", %rbx".to_string())
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{
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let destination_block = fx.get_block(destination.unwrap());
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fx.bcx.ins().jump(destination_block, &[]);
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return;
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} else if template[0] == InlineAsmTemplatePiece::String("rdpmc".to_string()) {
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// Return zero dummy values for all performance counters
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match operands[0] {
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InlineAsmOperand::In {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::cx)),
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value: _,
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} => {}
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_ => unreachable!(),
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};
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let lo = match operands[1] {
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InlineAsmOperand::Out {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::ax)),
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late: true,
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place: Some(place),
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} => crate::base::codegen_place(fx, place),
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_ => unreachable!(),
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};
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let hi = match operands[2] {
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InlineAsmOperand::Out {
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reg: InlineAsmRegOrRegClass::Reg(InlineAsmReg::X86(X86InlineAsmReg::dx)),
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late: true,
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place: Some(place),
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} => crate::base::codegen_place(fx, place),
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_ => unreachable!(),
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};
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let u32_layout = fx.layout_of(fx.tcx.types.u32);
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let zero = fx.bcx.ins().iconst(types::I32, 0);
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lo.write_cvalue(fx, CValue::by_val(zero, u32_layout));
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hi.write_cvalue(fx, CValue::by_val(zero, u32_layout));
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let destination_block = fx.get_block(destination.unwrap());
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fx.bcx.ins().jump(destination_block, &[]);
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return;
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} else if template[0] == InlineAsmTemplatePiece::String("lock xadd ".to_string())
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&& matches!(
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template[1],
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InlineAsmTemplatePiece::Placeholder { operand_idx: 1, modifier: None, span: _ }
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)
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&& template[2] == InlineAsmTemplatePiece::String(", (".to_string())
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&& matches!(
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template[3],
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InlineAsmTemplatePiece::Placeholder { operand_idx: 0, modifier: None, span: _ }
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)
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&& template[4] == InlineAsmTemplatePiece::String(")".to_string())
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{
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let destination_block = fx.get_block(destination.unwrap());
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fx.bcx.ins().jump(destination_block, &[]);
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return;
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}
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}
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let operands = operands
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.into_iter()
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.map(|operand| match *operand {
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InlineAsmOperand::In { reg, ref value } => {
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CInlineAsmOperand::In { reg, value: crate::base::codegen_operand(fx, value) }
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}
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InlineAsmOperand::Out { reg, late, ref place } => CInlineAsmOperand::Out {
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reg,
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late,
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place: place.map(|place| crate::base::codegen_place(fx, place)),
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},
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InlineAsmOperand::InOut { reg, late, ref in_value, ref out_place } => {
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CInlineAsmOperand::InOut {
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reg,
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_late: late,
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in_value: crate::base::codegen_operand(fx, in_value),
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out_place: out_place.map(|place| crate::base::codegen_place(fx, place)),
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}
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}
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InlineAsmOperand::Const { ref value } => {
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let (const_value, ty) = crate::constant::eval_mir_constant(fx, value)
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.unwrap_or_else(|| span_bug!(span, "asm const cannot be resolved"));
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let value = rustc_codegen_ssa::common::asm_const_to_str(
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fx.tcx,
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span,
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const_value,
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fx.layout_of(ty),
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);
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CInlineAsmOperand::Const { value }
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}
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InlineAsmOperand::SymFn { ref value } => {
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let literal = fx.monomorphize(value.literal);
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if let ty::FnDef(def_id, args) = *literal.ty().kind() {
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let instance = ty::Instance::resolve_for_fn_ptr(
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fx.tcx,
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ty::ParamEnv::reveal_all(),
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def_id,
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args,
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)
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.unwrap();
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let symbol = fx.tcx.symbol_name(instance);
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// Pass a wrapper rather than the function itself as the function itself may not
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// be exported from the main codegen unit and may thus be unreachable from the
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// object file created by an external assembler.
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let inline_asm_index = fx.cx.inline_asm_index.get();
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fx.cx.inline_asm_index.set(inline_asm_index + 1);
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let wrapper_name = format!(
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"__inline_asm_{}_wrapper_n{}",
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fx.cx.cgu_name.as_str().replace('.', "__").replace('-', "_"),
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inline_asm_index
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);
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let sig =
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get_function_sig(fx.tcx, fx.target_config.default_call_conv, instance);
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create_wrapper_function(
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fx.module,
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&mut fx.cx.unwind_context,
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sig,
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&wrapper_name,
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symbol.name,
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);
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CInlineAsmOperand::Symbol { symbol: wrapper_name }
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} else {
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span_bug!(span, "invalid type for asm sym (fn)");
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}
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}
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InlineAsmOperand::SymStatic { def_id } => {
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assert!(fx.tcx.is_static(def_id));
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let instance = Instance::mono(fx.tcx, def_id).polymorphize(fx.tcx);
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CInlineAsmOperand::Symbol { symbol: fx.tcx.symbol_name(instance).name.to_owned() }
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}
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})
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.collect::<Vec<_>>();
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let mut inputs = Vec::new();
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let mut outputs = Vec::new();
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let mut asm_gen = InlineAssemblyGenerator {
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tcx: fx.tcx,
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arch: fx.tcx.sess.asm_arch.unwrap(),
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enclosing_def_id: fx.instance.def_id(),
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template,
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operands: &operands,
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options,
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registers: Vec::new(),
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stack_slots_clobber: Vec::new(),
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stack_slots_input: Vec::new(),
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stack_slots_output: Vec::new(),
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stack_slot_size: Size::from_bytes(0),
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};
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asm_gen.allocate_registers();
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asm_gen.allocate_stack_slots();
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let inline_asm_index = fx.cx.inline_asm_index.get();
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fx.cx.inline_asm_index.set(inline_asm_index + 1);
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let asm_name = format!(
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"__inline_asm_{}_n{}",
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fx.cx.cgu_name.as_str().replace('.', "__").replace('-', "_"),
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inline_asm_index
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);
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let generated_asm = asm_gen.generate_asm_wrapper(&asm_name);
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fx.cx.global_asm.push_str(&generated_asm);
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for (i, operand) in operands.iter().enumerate() {
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match operand {
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CInlineAsmOperand::In { reg: _, value } => {
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inputs.push((asm_gen.stack_slots_input[i].unwrap(), value.load_scalar(fx)));
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}
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CInlineAsmOperand::Out { reg: _, late: _, place } => {
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if let Some(place) = place {
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outputs.push((asm_gen.stack_slots_output[i].unwrap(), *place));
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}
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}
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CInlineAsmOperand::InOut { reg: _, _late: _, in_value, out_place } => {
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inputs.push((asm_gen.stack_slots_input[i].unwrap(), in_value.load_scalar(fx)));
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if let Some(out_place) = out_place {
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outputs.push((asm_gen.stack_slots_output[i].unwrap(), *out_place));
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}
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}
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CInlineAsmOperand::Const { value: _ } | CInlineAsmOperand::Symbol { symbol: _ } => {}
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}
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}
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call_inline_asm(fx, &asm_name, asm_gen.stack_slot_size, inputs, outputs);
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match destination {
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Some(destination) => {
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let destination_block = fx.get_block(destination);
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fx.bcx.ins().jump(destination_block, &[]);
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}
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None => {
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fx.bcx.ins().trap(TrapCode::UnreachableCodeReached);
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}
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}
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}
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struct InlineAssemblyGenerator<'a, 'tcx> {
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tcx: TyCtxt<'tcx>,
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arch: InlineAsmArch,
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enclosing_def_id: DefId,
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template: &'a [InlineAsmTemplatePiece],
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operands: &'a [CInlineAsmOperand<'tcx>],
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options: InlineAsmOptions,
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registers: Vec<Option<InlineAsmReg>>,
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stack_slots_clobber: Vec<Option<Size>>,
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stack_slots_input: Vec<Option<Size>>,
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stack_slots_output: Vec<Option<Size>>,
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stack_slot_size: Size,
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}
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impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
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fn allocate_registers(&mut self) {
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let sess = self.tcx.sess;
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let map = allocatable_registers(
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self.arch,
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sess.relocation_model(),
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self.tcx.asm_target_features(self.enclosing_def_id),
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&sess.target,
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);
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let mut allocated = FxHashMap::<_, (bool, bool)>::default();
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let mut regs = vec![None; self.operands.len()];
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// Add explicit registers to the allocated set.
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for (i, operand) in self.operands.iter().enumerate() {
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match *operand {
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CInlineAsmOperand::In { reg: InlineAsmRegOrRegClass::Reg(reg), .. } => {
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regs[i] = Some(reg);
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allocated.entry(reg).or_default().0 = true;
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}
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CInlineAsmOperand::Out {
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reg: InlineAsmRegOrRegClass::Reg(reg),
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late: true,
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..
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} => {
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regs[i] = Some(reg);
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allocated.entry(reg).or_default().1 = true;
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}
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CInlineAsmOperand::Out { reg: InlineAsmRegOrRegClass::Reg(reg), .. }
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| CInlineAsmOperand::InOut { reg: InlineAsmRegOrRegClass::Reg(reg), .. } => {
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regs[i] = Some(reg);
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allocated.insert(reg, (true, true));
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}
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_ => (),
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}
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}
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// Allocate out/inout/inlateout registers first because they are more constrained.
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for (i, operand) in self.operands.iter().enumerate() {
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match *operand {
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CInlineAsmOperand::Out {
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reg: InlineAsmRegOrRegClass::RegClass(class),
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late: false,
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..
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}
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| CInlineAsmOperand::InOut {
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reg: InlineAsmRegOrRegClass::RegClass(class), ..
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} => {
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let mut alloc_reg = None;
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for ® in &map[&class] {
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let mut used = false;
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reg.overlapping_regs(|r| {
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if allocated.contains_key(&r) {
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used = true;
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}
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});
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if !used {
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alloc_reg = Some(reg);
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break;
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}
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}
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let reg = alloc_reg.expect("cannot allocate registers");
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regs[i] = Some(reg);
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allocated.insert(reg, (true, true));
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}
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_ => (),
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}
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}
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// Allocate in/lateout.
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for (i, operand) in self.operands.iter().enumerate() {
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match *operand {
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CInlineAsmOperand::In { reg: InlineAsmRegOrRegClass::RegClass(class), .. } => {
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let mut alloc_reg = None;
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for ® in &map[&class] {
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let mut used = false;
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reg.overlapping_regs(|r| {
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if allocated.get(&r).copied().unwrap_or_default().0 {
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used = true;
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}
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});
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if !used {
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alloc_reg = Some(reg);
|
|
break;
|
|
}
|
|
}
|
|
|
|
let reg = alloc_reg.expect("cannot allocate registers");
|
|
regs[i] = Some(reg);
|
|
allocated.entry(reg).or_default().0 = true;
|
|
}
|
|
CInlineAsmOperand::Out {
|
|
reg: InlineAsmRegOrRegClass::RegClass(class),
|
|
late: true,
|
|
..
|
|
} => {
|
|
let mut alloc_reg = None;
|
|
for ® in &map[&class] {
|
|
let mut used = false;
|
|
reg.overlapping_regs(|r| {
|
|
if allocated.get(&r).copied().unwrap_or_default().1 {
|
|
used = true;
|
|
}
|
|
});
|
|
|
|
if !used {
|
|
alloc_reg = Some(reg);
|
|
break;
|
|
}
|
|
}
|
|
|
|
let reg = alloc_reg.expect("cannot allocate registers");
|
|
regs[i] = Some(reg);
|
|
allocated.entry(reg).or_default().1 = true;
|
|
}
|
|
_ => (),
|
|
}
|
|
}
|
|
|
|
self.registers = regs;
|
|
}
|
|
|
|
fn allocate_stack_slots(&mut self) {
|
|
let mut slot_size = Size::from_bytes(0);
|
|
let mut slots_clobber = vec![None; self.operands.len()];
|
|
let mut slots_input = vec![None; self.operands.len()];
|
|
let mut slots_output = vec![None; self.operands.len()];
|
|
|
|
let new_slot_fn = |slot_size: &mut Size, reg_class: InlineAsmRegClass| {
|
|
let reg_size =
|
|
reg_class.supported_types(self.arch).iter().map(|(ty, _)| ty.size()).max().unwrap();
|
|
let align = rustc_target::abi::Align::from_bytes(reg_size.bytes()).unwrap();
|
|
let offset = slot_size.align_to(align);
|
|
*slot_size = offset + reg_size;
|
|
offset
|
|
};
|
|
let mut new_slot = |x| new_slot_fn(&mut slot_size, x);
|
|
|
|
// Allocate stack slots for saving clobbered registers
|
|
let abi_clobber = InlineAsmClobberAbi::parse(self.arch, &self.tcx.sess.target, sym::C)
|
|
.unwrap()
|
|
.clobbered_regs();
|
|
for (i, reg) in self.registers.iter().enumerate().filter_map(|(i, r)| r.map(|r| (i, r))) {
|
|
let mut need_save = true;
|
|
// If the register overlaps with a register clobbered by function call, then
|
|
// we don't need to save it.
|
|
for r in abi_clobber {
|
|
r.overlapping_regs(|r| {
|
|
if r == reg {
|
|
need_save = false;
|
|
}
|
|
});
|
|
|
|
if !need_save {
|
|
break;
|
|
}
|
|
}
|
|
|
|
if need_save {
|
|
slots_clobber[i] = Some(new_slot(reg.reg_class()));
|
|
}
|
|
}
|
|
|
|
// Allocate stack slots for inout
|
|
for (i, operand) in self.operands.iter().enumerate() {
|
|
match *operand {
|
|
CInlineAsmOperand::InOut { reg, out_place: Some(_), .. } => {
|
|
let slot = new_slot(reg.reg_class());
|
|
slots_input[i] = Some(slot);
|
|
slots_output[i] = Some(slot);
|
|
}
|
|
_ => (),
|
|
}
|
|
}
|
|
|
|
let slot_size_before_input = slot_size;
|
|
let mut new_slot = |x| new_slot_fn(&mut slot_size, x);
|
|
|
|
// Allocate stack slots for input
|
|
for (i, operand) in self.operands.iter().enumerate() {
|
|
match *operand {
|
|
CInlineAsmOperand::In { reg, .. }
|
|
| CInlineAsmOperand::InOut { reg, out_place: None, .. } => {
|
|
slots_input[i] = Some(new_slot(reg.reg_class()));
|
|
}
|
|
_ => (),
|
|
}
|
|
}
|
|
|
|
// Reset slot size to before input so that input and output operands can overlap
|
|
// and save some memory.
|
|
let slot_size_after_input = slot_size;
|
|
slot_size = slot_size_before_input;
|
|
let mut new_slot = |x| new_slot_fn(&mut slot_size, x);
|
|
|
|
// Allocate stack slots for output
|
|
for (i, operand) in self.operands.iter().enumerate() {
|
|
match *operand {
|
|
CInlineAsmOperand::Out { reg, place: Some(_), .. } => {
|
|
slots_output[i] = Some(new_slot(reg.reg_class()));
|
|
}
|
|
_ => (),
|
|
}
|
|
}
|
|
|
|
slot_size = slot_size.max(slot_size_after_input);
|
|
|
|
self.stack_slots_clobber = slots_clobber;
|
|
self.stack_slots_input = slots_input;
|
|
self.stack_slots_output = slots_output;
|
|
self.stack_slot_size = slot_size;
|
|
}
|
|
|
|
fn generate_asm_wrapper(&self, asm_name: &str) -> String {
|
|
let mut generated_asm = String::new();
|
|
writeln!(generated_asm, ".globl {}", asm_name).unwrap();
|
|
writeln!(generated_asm, ".type {},@function", asm_name).unwrap();
|
|
writeln!(generated_asm, ".section .text.{},\"ax\",@progbits", asm_name).unwrap();
|
|
writeln!(generated_asm, "{}:", asm_name).unwrap();
|
|
|
|
let is_x86 = matches!(self.arch, InlineAsmArch::X86 | InlineAsmArch::X86_64);
|
|
|
|
if is_x86 {
|
|
generated_asm.push_str(".intel_syntax noprefix\n");
|
|
}
|
|
Self::prologue(&mut generated_asm, self.arch);
|
|
|
|
// Save clobbered registers
|
|
if !self.options.contains(InlineAsmOptions::NORETURN) {
|
|
for (reg, slot) in self
|
|
.registers
|
|
.iter()
|
|
.zip(self.stack_slots_clobber.iter().copied())
|
|
.filter_map(|(r, s)| r.zip(s))
|
|
{
|
|
Self::save_register(&mut generated_asm, self.arch, reg, slot);
|
|
}
|
|
}
|
|
|
|
// Write input registers
|
|
for (reg, slot) in self
|
|
.registers
|
|
.iter()
|
|
.zip(self.stack_slots_input.iter().copied())
|
|
.filter_map(|(r, s)| r.zip(s))
|
|
{
|
|
Self::restore_register(&mut generated_asm, self.arch, reg, slot);
|
|
}
|
|
|
|
if is_x86 && self.options.contains(InlineAsmOptions::ATT_SYNTAX) {
|
|
generated_asm.push_str(".att_syntax\n");
|
|
}
|
|
|
|
// The actual inline asm
|
|
for piece in self.template {
|
|
match piece {
|
|
InlineAsmTemplatePiece::String(s) => {
|
|
generated_asm.push_str(s);
|
|
}
|
|
InlineAsmTemplatePiece::Placeholder { operand_idx, modifier, span: _ } => {
|
|
match self.operands[*operand_idx] {
|
|
CInlineAsmOperand::In { .. }
|
|
| CInlineAsmOperand::Out { .. }
|
|
| CInlineAsmOperand::InOut { .. } => {
|
|
if self.options.contains(InlineAsmOptions::ATT_SYNTAX) {
|
|
generated_asm.push('%');
|
|
}
|
|
self.registers[*operand_idx]
|
|
.unwrap()
|
|
.emit(&mut generated_asm, self.arch, *modifier)
|
|
.unwrap();
|
|
}
|
|
CInlineAsmOperand::Const { ref value } => {
|
|
generated_asm.push_str(value);
|
|
}
|
|
CInlineAsmOperand::Symbol { ref symbol } => generated_asm.push_str(symbol),
|
|
}
|
|
}
|
|
}
|
|
}
|
|
generated_asm.push('\n');
|
|
|
|
if is_x86 && self.options.contains(InlineAsmOptions::ATT_SYNTAX) {
|
|
generated_asm.push_str(".intel_syntax noprefix\n");
|
|
}
|
|
|
|
if !self.options.contains(InlineAsmOptions::NORETURN) {
|
|
// Read output registers
|
|
for (reg, slot) in self
|
|
.registers
|
|
.iter()
|
|
.zip(self.stack_slots_output.iter().copied())
|
|
.filter_map(|(r, s)| r.zip(s))
|
|
{
|
|
Self::save_register(&mut generated_asm, self.arch, reg, slot);
|
|
}
|
|
|
|
// Restore clobbered registers
|
|
for (reg, slot) in self
|
|
.registers
|
|
.iter()
|
|
.zip(self.stack_slots_clobber.iter().copied())
|
|
.filter_map(|(r, s)| r.zip(s))
|
|
{
|
|
Self::restore_register(&mut generated_asm, self.arch, reg, slot);
|
|
}
|
|
|
|
Self::epilogue(&mut generated_asm, self.arch);
|
|
} else {
|
|
Self::epilogue_noreturn(&mut generated_asm, self.arch);
|
|
}
|
|
|
|
if is_x86 {
|
|
generated_asm.push_str(".att_syntax\n");
|
|
}
|
|
writeln!(generated_asm, ".size {name}, .-{name}", name = asm_name).unwrap();
|
|
generated_asm.push_str(".text\n");
|
|
generated_asm.push_str("\n\n");
|
|
|
|
generated_asm
|
|
}
|
|
|
|
fn prologue(generated_asm: &mut String, arch: InlineAsmArch) {
|
|
match arch {
|
|
InlineAsmArch::X86 => {
|
|
generated_asm.push_str(" push ebp\n");
|
|
generated_asm.push_str(" mov ebp,[esp+8]\n");
|
|
}
|
|
InlineAsmArch::X86_64 => {
|
|
generated_asm.push_str(" push rbp\n");
|
|
generated_asm.push_str(" mov rbp,rdi\n");
|
|
}
|
|
InlineAsmArch::RiscV32 => {
|
|
generated_asm.push_str(" addi sp, sp, -8\n");
|
|
generated_asm.push_str(" sw ra, 4(sp)\n");
|
|
generated_asm.push_str(" sw s0, 0(sp)\n");
|
|
generated_asm.push_str(" mv s0, a0\n");
|
|
}
|
|
InlineAsmArch::RiscV64 => {
|
|
generated_asm.push_str(" addi sp, sp, -16\n");
|
|
generated_asm.push_str(" sd ra, 8(sp)\n");
|
|
generated_asm.push_str(" sd s0, 0(sp)\n");
|
|
generated_asm.push_str(" mv s0, a0\n");
|
|
}
|
|
_ => unimplemented!("prologue for {:?}", arch),
|
|
}
|
|
}
|
|
|
|
fn epilogue(generated_asm: &mut String, arch: InlineAsmArch) {
|
|
match arch {
|
|
InlineAsmArch::X86 => {
|
|
generated_asm.push_str(" pop ebp\n");
|
|
generated_asm.push_str(" ret\n");
|
|
}
|
|
InlineAsmArch::X86_64 => {
|
|
generated_asm.push_str(" pop rbp\n");
|
|
generated_asm.push_str(" ret\n");
|
|
}
|
|
InlineAsmArch::RiscV32 => {
|
|
generated_asm.push_str(" lw s0, 0(sp)\n");
|
|
generated_asm.push_str(" lw ra, 4(sp)\n");
|
|
generated_asm.push_str(" addi sp, sp, 8\n");
|
|
generated_asm.push_str(" ret\n");
|
|
}
|
|
InlineAsmArch::RiscV64 => {
|
|
generated_asm.push_str(" ld s0, 0(sp)\n");
|
|
generated_asm.push_str(" ld ra, 8(sp)\n");
|
|
generated_asm.push_str(" addi sp, sp, 16\n");
|
|
generated_asm.push_str(" ret\n");
|
|
}
|
|
_ => unimplemented!("epilogue for {:?}", arch),
|
|
}
|
|
}
|
|
|
|
fn epilogue_noreturn(generated_asm: &mut String, arch: InlineAsmArch) {
|
|
match arch {
|
|
InlineAsmArch::X86 | InlineAsmArch::X86_64 => {
|
|
generated_asm.push_str(" ud2\n");
|
|
}
|
|
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {
|
|
generated_asm.push_str(" ebreak\n");
|
|
}
|
|
_ => unimplemented!("epilogue_noreturn for {:?}", arch),
|
|
}
|
|
}
|
|
|
|
fn save_register(
|
|
generated_asm: &mut String,
|
|
arch: InlineAsmArch,
|
|
reg: InlineAsmReg,
|
|
offset: Size,
|
|
) {
|
|
match arch {
|
|
InlineAsmArch::X86 => {
|
|
write!(generated_asm, " mov [ebp+0x{:x}], ", offset.bytes()).unwrap();
|
|
reg.emit(generated_asm, InlineAsmArch::X86, None).unwrap();
|
|
generated_asm.push('\n');
|
|
}
|
|
InlineAsmArch::X86_64 => {
|
|
write!(generated_asm, " mov [rbp+0x{:x}], ", offset.bytes()).unwrap();
|
|
reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();
|
|
generated_asm.push('\n');
|
|
}
|
|
InlineAsmArch::RiscV32 => {
|
|
generated_asm.push_str(" sw ");
|
|
reg.emit(generated_asm, InlineAsmArch::RiscV32, None).unwrap();
|
|
writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();
|
|
}
|
|
InlineAsmArch::RiscV64 => {
|
|
generated_asm.push_str(" sd ");
|
|
reg.emit(generated_asm, InlineAsmArch::RiscV64, None).unwrap();
|
|
writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();
|
|
}
|
|
_ => unimplemented!("save_register for {:?}", arch),
|
|
}
|
|
}
|
|
|
|
fn restore_register(
|
|
generated_asm: &mut String,
|
|
arch: InlineAsmArch,
|
|
reg: InlineAsmReg,
|
|
offset: Size,
|
|
) {
|
|
match arch {
|
|
InlineAsmArch::X86 => {
|
|
generated_asm.push_str(" mov ");
|
|
reg.emit(generated_asm, InlineAsmArch::X86, None).unwrap();
|
|
writeln!(generated_asm, ", [ebp+0x{:x}]", offset.bytes()).unwrap();
|
|
}
|
|
InlineAsmArch::X86_64 => {
|
|
generated_asm.push_str(" mov ");
|
|
reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();
|
|
writeln!(generated_asm, ", [rbp+0x{:x}]", offset.bytes()).unwrap();
|
|
}
|
|
InlineAsmArch::RiscV32 => {
|
|
generated_asm.push_str(" lw ");
|
|
reg.emit(generated_asm, InlineAsmArch::RiscV32, None).unwrap();
|
|
writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();
|
|
}
|
|
InlineAsmArch::RiscV64 => {
|
|
generated_asm.push_str(" ld ");
|
|
reg.emit(generated_asm, InlineAsmArch::RiscV64, None).unwrap();
|
|
writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();
|
|
}
|
|
_ => unimplemented!("restore_register for {:?}", arch),
|
|
}
|
|
}
|
|
}
|
|
|
|
fn call_inline_asm<'tcx>(
|
|
fx: &mut FunctionCx<'_, '_, 'tcx>,
|
|
asm_name: &str,
|
|
slot_size: Size,
|
|
inputs: Vec<(Size, Value)>,
|
|
outputs: Vec<(Size, CPlace<'tcx>)>,
|
|
) {
|
|
let stack_slot = fx.bcx.func.create_sized_stack_slot(StackSlotData {
|
|
kind: StackSlotKind::ExplicitSlot,
|
|
size: u32::try_from(slot_size.bytes()).unwrap(),
|
|
});
|
|
if fx.clif_comments.enabled() {
|
|
fx.add_comment(stack_slot, "inline asm scratch slot");
|
|
}
|
|
|
|
let inline_asm_func = fx
|
|
.module
|
|
.declare_function(
|
|
asm_name,
|
|
Linkage::Import,
|
|
&Signature {
|
|
call_conv: CallConv::SystemV,
|
|
params: vec![AbiParam::new(fx.pointer_type)],
|
|
returns: vec![],
|
|
},
|
|
)
|
|
.unwrap();
|
|
let inline_asm_func = fx.module.declare_func_in_func(inline_asm_func, &mut fx.bcx.func);
|
|
if fx.clif_comments.enabled() {
|
|
fx.add_comment(inline_asm_func, asm_name);
|
|
}
|
|
|
|
for (offset, value) in inputs {
|
|
fx.bcx.ins().stack_store(value, stack_slot, i32::try_from(offset.bytes()).unwrap());
|
|
}
|
|
|
|
let stack_slot_addr = fx.bcx.ins().stack_addr(fx.pointer_type, stack_slot, 0);
|
|
fx.bcx.ins().call(inline_asm_func, &[stack_slot_addr]);
|
|
|
|
for (offset, place) in outputs {
|
|
let ty = fx.clif_type(place.layout().ty).unwrap();
|
|
let value = fx.bcx.ins().stack_load(ty, stack_slot, i32::try_from(offset.bytes()).unwrap());
|
|
place.write_cvalue(fx, CValue::by_val(value, place.layout()));
|
|
}
|
|
}
|