d792925b4d
Overload the operators using the traits so that things mostly keep working during the deprecation period.
144 lines
4.6 KiB
Rust
144 lines
4.6 KiB
Rust
// Copyright 2013 The Rust Project Developers. See the COPYRIGHT
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// file at the top-level directory of this distribution and at
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// http://rust-lang.org/COPYRIGHT.
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//
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// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
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// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
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// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
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// option. This file may not be copied, modified, or distributed
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// except according to those terms.
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//! SIMD vectors.
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//!
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//! These types can be used for accessing basic SIMD operations. Currently
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//! comparison operators are not implemented. To use SSE3+, you must enable
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//! the features, like `-C target-feature=sse3,sse4.1,sse4.2`, or a more
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//! specific `target-cpu`. No other SIMD intrinsics or high-level wrappers are
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//! provided beyond this module.
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//!
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//! # Stability Note
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//!
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//! These are all experimental. The interface may change entirely, without
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//! warning.
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#![unstable(feature = "core_simd",
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reason = "needs an RFC to flesh out the design",
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issue = "27731")]
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#![deprecated(since = "1.3.0",
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reason = "use the external `simd` crate instead")]
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#![allow(non_camel_case_types)]
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#![allow(missing_docs)]
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#![allow(deprecated)]
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use ops::{Add, Sub, Mul, Div, Shl, Shr, BitAnd, BitOr, BitXor};
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// FIXME(stage0): the contents of macro can be inlined.
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// ABIs are verified as valid as soon as they are parsed, i.e. before
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// `cfg` stripping. The `platform-intrinsic` ABI is new, so stage0
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// doesn't know about it, but it still errors out when it hits it
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// (despite this being in a `cfg(not(stage0))` module).
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macro_rules! argh {
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() => {
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extern "platform-intrinsic" {
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fn simd_add<T>(x: T, y: T) -> T;
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fn simd_sub<T>(x: T, y: T) -> T;
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fn simd_mul<T>(x: T, y: T) -> T;
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fn simd_div<T>(x: T, y: T) -> T;
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fn simd_shl<T>(x: T, y: T) -> T;
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fn simd_shr<T>(x: T, y: T) -> T;
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fn simd_and<T>(x: T, y: T) -> T;
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fn simd_or<T>(x: T, y: T) -> T;
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fn simd_xor<T>(x: T, y: T) -> T;
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}
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}
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}
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argh!();
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct i8x16(pub i8, pub i8, pub i8, pub i8,
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pub i8, pub i8, pub i8, pub i8,
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pub i8, pub i8, pub i8, pub i8,
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pub i8, pub i8, pub i8, pub i8);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct i16x8(pub i16, pub i16, pub i16, pub i16,
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pub i16, pub i16, pub i16, pub i16);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct i32x4(pub i32, pub i32, pub i32, pub i32);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct i64x2(pub i64, pub i64);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct u8x16(pub u8, pub u8, pub u8, pub u8,
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pub u8, pub u8, pub u8, pub u8,
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pub u8, pub u8, pub u8, pub u8,
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pub u8, pub u8, pub u8, pub u8);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct u16x8(pub u16, pub u16, pub u16, pub u16,
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pub u16, pub u16, pub u16, pub u16);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct u32x4(pub u32, pub u32, pub u32, pub u32);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct u64x2(pub u64, pub u64);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct f32x4(pub f32, pub f32, pub f32, pub f32);
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#[repr(simd)]
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#[derive(Copy, Clone, Debug)]
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#[repr(C)]
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pub struct f64x2(pub f64, pub f64);
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macro_rules! impl_traits {
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($($trayt: ident, $method: ident, $func: ident: $($ty: ty),*;)*) => {
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$($(
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impl $trayt<$ty> for $ty {
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type Output = Self;
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fn $method(self, other: Self) -> Self {
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unsafe {
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$func(self, other)
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}
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}
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}
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)*)*
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}
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}
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impl_traits! {
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Add, add, simd_add: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2, f32x4, f64x2;
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Sub, sub, simd_sub: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2, f32x4, f64x2;
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Mul, mul, simd_mul: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2, f32x4, f64x2;
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Div, div, simd_div: f32x4, f64x2;
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Shl, shl, simd_shl: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2;
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Shr, shr, simd_shr: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2;
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BitAnd, bitand, simd_and: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2;
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BitOr, bitor, simd_or: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2;
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BitXor, bitxor, simd_xor: u8x16, u16x8, u32x4, u64x2, i8x16, i16x8, i32x4, i64x2;
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}
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