109 lines
2.5 KiB
Rust
109 lines
2.5 KiB
Rust
//@ assembly-output: emit-asm
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//@ revisions: riscv64 riscv64-zbb loongarch64
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//@ compile-flags: -C opt-level=3
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//@ [riscv64] compile-flags: --target riscv64gc-unknown-linux-gnu
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//@ [riscv64] needs-llvm-components: riscv
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//@ [riscv64-zbb] compile-flags: --target riscv64gc-unknown-linux-gnu
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//@ [riscv64-zbb] compile-flags: -C target-feature=+zbb
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//@ [riscv64-zbb] needs-llvm-components: riscv
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//@ [loongarch64] compile-flags: --target loongarch64-unknown-linux-gnu
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//@ [loongarch64] needs-llvm-components: loongarch
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#![feature(no_core, lang_items, intrinsics, rustc_attrs)]
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#![crate_type = "lib"]
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#![no_std]
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#![no_core]
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// FIXME: Migrate these code after PR #130693 is landed.
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// vvvvv core
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#[lang = "sized"]
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trait Sized {}
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#[lang = "copy"]
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trait Copy {}
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impl Copy for i8 {}
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impl Copy for u32 {}
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impl Copy for i32 {}
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#[lang = "neg"]
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trait Neg {
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type Output;
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fn neg(self) -> Self::Output;
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}
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impl Neg for i8 {
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type Output = i8;
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fn neg(self) -> Self::Output {
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-self
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}
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}
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#[lang = "Ordering"]
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#[repr(i8)]
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enum Ordering {
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Less = -1,
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Equal = 0,
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Greater = 1,
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}
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extern "rust-intrinsic" {
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#[rustc_safe_intrinsic]
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fn three_way_compare<T: Copy>(lhs: T, rhs: T) -> Ordering;
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}
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// ^^^^^ core
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// Reimplementation of function `{integer}::max`.
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macro_rules! max {
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($a:expr, $b:expr) => {
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match three_way_compare($a, $b) {
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Ordering::Less | Ordering::Equal => $b,
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Ordering::Greater => $a,
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}
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};
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}
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#[no_mangle]
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// CHECK-LABEL: issue_114508_u32:
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pub fn issue_114508_u32(a: u32, b: u32) -> u32 {
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// CHECK-NEXT: .cfi_startproc
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// riscv64-NEXT: bltu a1, a0, .[[RET:.+]]
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// riscv64-NEXT: mv a0, a1
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// riscv64-NEXT: .[[RET]]:
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// riscv64-zbb-NEXT: maxu a0, a0, a1
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// loongarch64-NEXT: sltu $a2, $a1, $a0
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// loongarch64-NEXT: masknez $a1, $a1, $a2
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// loongarch64-NEXT: maskeqz $a0, $a0, $a2
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// loongarch64-NEXT: or $a0, $a0, $a1
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// CHECK-NEXT: ret
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max!(a, b)
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}
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#[no_mangle]
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// CHECK-LABEL: issue_114508_i32:
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pub fn issue_114508_i32(a: i32, b: i32) -> i32 {
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// CHECK-NEXT: .cfi_startproc
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// riscv64-NEXT: blt a1, a0, .[[RET:.+]]
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// riscv64-NEXT: mv a0, a1
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// riscv64-NEXT: .[[RET]]:
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// riscv64-zbb-NEXT: max a0, a0, a1
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// loongarch64-NEXT: slt $a2, $a1, $a0
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// loongarch64-NEXT: masknez $a1, $a1, $a2
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// loongarch64-NEXT: maskeqz $a0, $a0, $a2
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// loongarch64-NEXT: or $a0, $a0, $a1
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// CHECK-NEXT: ret
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max!(a, b)
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}
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