b9d4ef16c9
Add v9, v8plus, and leoncasa target feature to sparc and use v8plus in create_object_file This adds the following three unstable target features: - `v9`: SPARC-V9 instructions ([LLVM definition][sparc-v9]) - Relevant to https://github.com/rust-lang/rust/pull/131222#issuecomment-2453310963 - Relevant to https://github.com/rust-lang/rust/pull/132472#discussion_r1832606081 - This is also needed to implement https://github.com/taiki-e/atomic-maybe-uninit/pull/31 (depends on inline assembly support) more robustly. - `v8plus`: SPARC-V8+ ABI ([LLVM definition][sparc-v8plus]) - This is added in LLVM 20. In LLVM 19 and older, it is emulated to work the same way as LLVM in each LLVM version. - See https://github.com/rust-lang/rust/issues/132585#issuecomment-2453926257 for more. - `leoncasa`: CASA instruction[^1] of LEON3 and LEON4 processors ([LLVM definition][sparc-leoncasa], LLVM feature name: `hasleoncasa`) - This is needed to implement https://github.com/taiki-e/atomic-maybe-uninit/pull/31 (depends on inline assembly support) more robustly. [^1]: Atomic CAS instruction [sparc-v9]: |
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| src | ||
| Cargo.toml | ||
| messages.ftl | ||
| README.md | ||
The codegen crate contains the code to convert from MIR into LLVM IR,
and then from LLVM IR into machine code. In general it contains code
that runs towards the end of the compilation process.
For more information about how codegen works, see the rustc dev guide.