154 lines
5.3 KiB
Rust
154 lines
5.3 KiB
Rust
use crate::simd::intrinsics::{
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simd_reduce_add_ordered, simd_reduce_and, simd_reduce_max, simd_reduce_min,
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simd_reduce_mul_ordered, simd_reduce_or, simd_reduce_xor,
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};
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use crate::simd::{LaneCount, Simd, SimdElement, SupportedLaneCount};
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use core::ops::{BitAnd, BitOr, BitXor};
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macro_rules! impl_integer_reductions {
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{ $scalar:ty } => {
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impl<const LANES: usize> Simd<$scalar, LANES>
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where
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Reducing wrapping add. Returns the sum of the lanes of the vector, with wrapping addition.
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#[inline]
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pub fn reduce_sum(self) -> $scalar {
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// Safety: `self` is an integer vector
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unsafe { simd_reduce_add_ordered(self, 0) }
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}
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/// Reducing wrapping multiply. Returns the product of the lanes of the vector, with wrapping multiplication.
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#[inline]
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pub fn reduce_product(self) -> $scalar {
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// Safety: `self` is an integer vector
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unsafe { simd_reduce_mul_ordered(self, 1) }
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}
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/// Reducing maximum. Returns the maximum lane in the vector.
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#[inline]
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pub fn reduce_max(self) -> $scalar {
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// Safety: `self` is an integer vector
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unsafe { simd_reduce_max(self) }
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}
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/// Reducing minimum. Returns the minimum lane in the vector.
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#[inline]
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pub fn reduce_min(self) -> $scalar {
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// Safety: `self` is an integer vector
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unsafe { simd_reduce_min(self) }
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}
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}
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}
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}
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impl_integer_reductions! { i8 }
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impl_integer_reductions! { i16 }
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impl_integer_reductions! { i32 }
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impl_integer_reductions! { i64 }
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impl_integer_reductions! { isize }
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impl_integer_reductions! { u8 }
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impl_integer_reductions! { u16 }
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impl_integer_reductions! { u32 }
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impl_integer_reductions! { u64 }
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impl_integer_reductions! { usize }
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macro_rules! impl_float_reductions {
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{ $scalar:ty } => {
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impl<const LANES: usize> Simd<$scalar, LANES>
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where
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Reducing add. Returns the sum of the lanes of the vector.
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#[inline]
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pub fn reduce_sum(self) -> $scalar {
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// LLVM sum is inaccurate on i586
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if cfg!(all(target_arch = "x86", not(target_feature = "sse2"))) {
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self.as_array().iter().sum()
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} else {
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// Safety: `self` is a float vector
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unsafe { simd_reduce_add_ordered(self, 0.) }
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}
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}
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/// Reducing multiply. Returns the product of the lanes of the vector.
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#[inline]
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pub fn reduce_product(self) -> $scalar {
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// LLVM product is inaccurate on i586
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if cfg!(all(target_arch = "x86", not(target_feature = "sse2"))) {
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self.as_array().iter().product()
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} else {
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// Safety: `self` is a float vector
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unsafe { simd_reduce_mul_ordered(self, 1.) }
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}
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}
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/// Reducing maximum. Returns the maximum lane in the vector.
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///
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/// Returns values based on equality, so a vector containing both `0.` and `-0.` may
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/// return either. This function will not return `NaN` unless all lanes are `NaN`.
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#[inline]
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pub fn reduce_max(self) -> $scalar {
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// Safety: `self` is a float vector
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unsafe { simd_reduce_max(self) }
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}
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/// Reducing minimum. Returns the minimum lane in the vector.
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///
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/// Returns values based on equality, so a vector containing both `0.` and `-0.` may
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/// return either. This function will not return `NaN` unless all lanes are `NaN`.
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#[inline]
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pub fn reduce_min(self) -> $scalar {
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// Safety: `self` is a float vector
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unsafe { simd_reduce_min(self) }
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}
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}
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}
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}
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impl_float_reductions! { f32 }
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impl_float_reductions! { f64 }
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impl<T, const LANES: usize> Simd<T, LANES>
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where
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Self: BitAnd<Self, Output = Self>,
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T: SimdElement + BitAnd<T, Output = T>,
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Reducing bitwise "and". Returns the cumulative bitwise "and" across the lanes of
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/// the vector.
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#[inline]
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pub fn reduce_and(self) -> T {
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unsafe { simd_reduce_and(self) }
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}
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}
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impl<T, const LANES: usize> Simd<T, LANES>
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where
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Self: BitOr<Self, Output = Self>,
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T: SimdElement + BitOr<T, Output = T>,
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Reducing bitwise "or". Returns the cumulative bitwise "or" across the lanes of
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/// the vector.
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#[inline]
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pub fn reduce_or(self) -> T {
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unsafe { simd_reduce_or(self) }
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}
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}
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impl<T, const LANES: usize> Simd<T, LANES>
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where
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Self: BitXor<Self, Output = Self>,
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T: SimdElement + BitXor<T, Output = T>,
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LaneCount<LANES>: SupportedLaneCount,
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{
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/// Reducing bitwise "xor". Returns the cumulative bitwise "xor" across the lanes of
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/// the vector.
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#[inline]
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pub fn reduce_xor(self) -> T {
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unsafe { simd_reduce_xor(self) }
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}
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}
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