343 lines
15 KiB
Rust
343 lines
15 KiB
Rust
// Copyright 2015 The Rust Project Developers. See the COPYRIGHT
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// file at the top-level directory of this distribution and at
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// http://rust-lang.org/COPYRIGHT.
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//
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// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
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// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
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// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
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// option. This file may not be copied, modified, or distributed
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// except according to those terms.
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// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
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// ignore-tidy-linelength
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#![allow(unused_imports)]
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use {Intrinsic, Type};
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use IntrinsicDef::Named;
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// The default inlining settings trigger a pathological behaviour in
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// LLVM, which causes makes compilation very slow. See #28273.
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#[inline(never)]
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pub fn find(name: &str) -> Option<Intrinsic> {
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if !name.starts_with("powerpc") { return None }
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Some(match &name["powerpc".len()..] {
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"_vec_perm" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I8x16]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vperm")
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},
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"_vec_mradds" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vmhraddshs")
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},
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"_vec_cmpb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vcmpbfp")
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},
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"_vec_cmpeqb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vcmpequb")
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},
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"_vec_cmpeqh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vcmpequh")
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},
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"_vec_cmpeqw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vcmpequw")
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},
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"_vec_cmpgtub" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vcmpgtub")
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},
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"_vec_cmpgtuh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vcmpgtuh")
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},
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"_vec_cmpgtuw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vcmpgtuw")
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},
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"_vec_cmpgtsb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vcmpgtsb")
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},
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"_vec_cmpgtsh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vcmpgtsh")
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},
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"_vec_cmpgtsw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vcmpgtsw")
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},
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"_vec_maxsb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vmaxsb")
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},
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"_vec_maxub" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vmaxub")
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},
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"_vec_maxsh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vmaxsh")
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},
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"_vec_maxuh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vmaxuh")
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},
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"_vec_maxsw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vmaxsw")
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},
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"_vec_maxuw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vmaxuw")
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},
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"_vec_minsb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vminsb")
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},
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"_vec_minub" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vminub")
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},
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"_vec_minsh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vminsh")
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},
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"_vec_minuh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vminuh")
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},
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"_vec_minsw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vminsw")
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},
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"_vec_minuw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vminuw")
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},
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"_vec_subsbs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vsubsbs")
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},
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"_vec_sububs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vsububs")
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},
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"_vec_subshs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vsubshs")
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},
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"_vec_subuhs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vsubuhs")
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},
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"_vec_subsws" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vsubsws")
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},
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"_vec_subuws" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vsubuws")
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},
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"_vec_subc" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vsubcuw")
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},
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"_vec_addsbs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vaddsbs")
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},
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"_vec_addubs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vaddubs")
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},
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"_vec_addshs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vaddshs")
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},
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"_vec_adduhs" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vadduhs")
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},
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"_vec_addsws" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vaddsws")
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},
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"_vec_adduws" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vadduws")
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},
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"_vec_addc" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vaddcuw")
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},
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"_vec_mulesb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vmulesb")
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},
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"_vec_muleub" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vmuleub")
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},
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"_vec_mulesh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vmulesh")
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},
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"_vec_muleuh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vmuleuh")
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},
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"_vec_mulosb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vmulosb")
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},
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"_vec_muloub" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vmuloub")
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},
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"_vec_mulosh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vmulosh")
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},
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"_vec_mulouh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vmulouh")
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},
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"_vec_avgsb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vavgsb")
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},
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"_vec_avgub" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vavgub")
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},
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"_vec_avgsh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vavgsh")
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},
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"_vec_avguh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vavguh")
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},
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"_vec_avgsw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vavgsw")
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},
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"_vec_avguw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U32x4,
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definition: Named("llvm.ppc.altivec.vavguw")
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},
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"_vec_packssh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::I8x16,
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definition: Named("llvm.ppc.altivec.vpkshss")
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},
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"_vec_packsuh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vpkuhus")
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},
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"_vec_packssw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vpkswss")
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},
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"_vec_packsuw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vpkuwus")
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},
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"_vec_packsush" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
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output: &::U8x16,
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definition: Named("llvm.ppc.altivec.vpkshus")
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},
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"_vec_packsusw" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::U16x8,
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definition: Named("llvm.ppc.altivec.vpkswus")
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},
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"_vec_packpx" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vpkpx")
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},
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"_vec_unpacklsb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vupklsb")
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},
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"_vec_unpacklsh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vupklsh")
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},
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"_vec_unpackhsb" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
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output: &::I16x8,
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definition: Named("llvm.ppc.altivec.vupkhsb")
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},
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"_vec_unpackhsh" => Intrinsic {
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inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
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output: &::I32x4,
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definition: Named("llvm.ppc.altivec.vupkhsh")
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},
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_ => return None,
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})
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}
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