20e6c1d013
This would previously incorrectly reject two subregisters that were distinct but part of the same larger register, for example `al` and `ah`.
438 lines
20 KiB
Rust
438 lines
20 KiB
Rust
use super::LoweringContext;
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use rustc_ast::*;
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use rustc_data_structures::fx::FxHashMap;
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use rustc_data_structures::stable_set::FxHashSet;
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use rustc_errors::struct_span_err;
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use rustc_hir as hir;
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use rustc_session::parse::feature_err;
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use rustc_span::{sym, Span};
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use rustc_target::asm;
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use std::collections::hash_map::Entry;
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use std::fmt::Write;
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impl<'a, 'hir> LoweringContext<'a, 'hir> {
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crate fn lower_inline_asm(&mut self, sp: Span, asm: &InlineAsm) -> &'hir hir::InlineAsm<'hir> {
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// Rustdoc needs to support asm! from foreign architectures: don't try
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// lowering the register constraints in this case.
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let asm_arch = if self.sess.opts.actually_rustdoc { None } else { self.sess.asm_arch };
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if asm_arch.is_none() && !self.sess.opts.actually_rustdoc {
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struct_span_err!(self.sess, sp, E0472, "inline assembly is unsupported on this target")
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.emit();
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}
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if let Some(asm_arch) = asm_arch {
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// Inline assembly is currently only stable for these architectures.
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let is_stable = matches!(
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asm_arch,
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asm::InlineAsmArch::X86
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| asm::InlineAsmArch::X86_64
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| asm::InlineAsmArch::Arm
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| asm::InlineAsmArch::AArch64
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| asm::InlineAsmArch::RiscV32
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| asm::InlineAsmArch::RiscV64
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);
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if !is_stable && !self.sess.features_untracked().asm_experimental_arch {
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feature_err(
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&self.sess.parse_sess,
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sym::asm_experimental_arch,
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sp,
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"inline assembly is not stable yet on this architecture",
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)
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.emit();
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}
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}
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if asm.options.contains(InlineAsmOptions::ATT_SYNTAX)
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&& !matches!(asm_arch, Some(asm::InlineAsmArch::X86 | asm::InlineAsmArch::X86_64))
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&& !self.sess.opts.actually_rustdoc
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{
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self.sess
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.struct_span_err(sp, "the `att_syntax` option is only supported on x86")
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.emit();
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}
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if asm.options.contains(InlineAsmOptions::MAY_UNWIND)
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&& !self.sess.features_untracked().asm_unwind
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{
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feature_err(
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&self.sess.parse_sess,
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sym::asm_unwind,
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sp,
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"the `may_unwind` option is unstable",
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)
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.emit();
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}
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let mut clobber_abis = FxHashMap::default();
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if let Some(asm_arch) = asm_arch {
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for (abi_name, abi_span) in &asm.clobber_abis {
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match asm::InlineAsmClobberAbi::parse(
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asm_arch,
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&self.sess.target_features,
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&self.sess.target,
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*abi_name,
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) {
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Ok(abi) => {
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// If the abi was already in the list, emit an error
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match clobber_abis.get(&abi) {
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Some((prev_name, prev_sp)) => {
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let mut err = self.sess.struct_span_err(
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*abi_span,
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&format!("`{}` ABI specified multiple times", prev_name),
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);
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err.span_label(*prev_sp, "previously specified here");
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// Multiple different abi names may actually be the same ABI
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// If the specified ABIs are not the same name, alert the user that they resolve to the same ABI
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let source_map = self.sess.source_map();
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if source_map.span_to_snippet(*prev_sp)
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!= source_map.span_to_snippet(*abi_span)
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{
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err.note("these ABIs are equivalent on the current target");
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}
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err.emit();
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}
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None => {
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clobber_abis.insert(abi, (abi_name, *abi_span));
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}
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}
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}
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Err(&[]) => {
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self.sess
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.struct_span_err(
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*abi_span,
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"`clobber_abi` is not supported on this target",
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)
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.emit();
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}
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Err(supported_abis) => {
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let mut err =
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self.sess.struct_span_err(*abi_span, "invalid ABI for `clobber_abi`");
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let mut abis = format!("`{}`", supported_abis[0]);
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for m in &supported_abis[1..] {
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let _ = write!(abis, ", `{}`", m);
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}
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err.note(&format!(
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"the following ABIs are supported on this target: {}",
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abis
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));
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err.emit();
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}
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}
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}
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}
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// Lower operands to HIR. We use dummy register classes if an error
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// occurs during lowering because we still need to be able to produce a
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// valid HIR.
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let sess = self.sess;
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let mut operands: Vec<_> = asm
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.operands
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.iter()
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.map(|(op, op_sp)| {
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let lower_reg = |reg| match reg {
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InlineAsmRegOrRegClass::Reg(s) => {
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asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
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asm::InlineAsmReg::parse(
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asm_arch,
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&sess.target_features,
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&sess.target,
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s,
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)
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.unwrap_or_else(|e| {
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let msg = format!("invalid register `{}`: {}", s.as_str(), e);
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sess.struct_span_err(*op_sp, &msg).emit();
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asm::InlineAsmReg::Err
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})
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} else {
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asm::InlineAsmReg::Err
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})
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}
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InlineAsmRegOrRegClass::RegClass(s) => {
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asm::InlineAsmRegOrRegClass::RegClass(if let Some(asm_arch) = asm_arch {
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asm::InlineAsmRegClass::parse(asm_arch, s).unwrap_or_else(|e| {
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let msg = format!("invalid register class `{}`: {}", s.as_str(), e);
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sess.struct_span_err(*op_sp, &msg).emit();
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asm::InlineAsmRegClass::Err
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})
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} else {
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asm::InlineAsmRegClass::Err
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})
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}
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};
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let op = match *op {
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InlineAsmOperand::In { reg, ref expr } => hir::InlineAsmOperand::In {
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reg: lower_reg(reg),
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expr: self.lower_expr_mut(expr),
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},
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InlineAsmOperand::Out { reg, late, ref expr } => hir::InlineAsmOperand::Out {
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reg: lower_reg(reg),
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late,
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expr: expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
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},
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InlineAsmOperand::InOut { reg, late, ref expr } => {
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hir::InlineAsmOperand::InOut {
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reg: lower_reg(reg),
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late,
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expr: self.lower_expr_mut(expr),
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}
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}
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InlineAsmOperand::SplitInOut { reg, late, ref in_expr, ref out_expr } => {
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hir::InlineAsmOperand::SplitInOut {
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reg: lower_reg(reg),
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late,
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in_expr: self.lower_expr_mut(in_expr),
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out_expr: out_expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
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}
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}
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InlineAsmOperand::Const { ref anon_const } => {
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if !self.sess.features_untracked().asm_const {
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feature_err(
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&self.sess.parse_sess,
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sym::asm_const,
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*op_sp,
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"const operands for inline assembly are unstable",
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)
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.emit();
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}
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hir::InlineAsmOperand::Const {
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anon_const: self.lower_anon_const(anon_const),
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}
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}
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InlineAsmOperand::Sym { ref expr } => {
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if !self.sess.features_untracked().asm_sym {
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feature_err(
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&self.sess.parse_sess,
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sym::asm_sym,
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*op_sp,
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"sym operands for inline assembly are unstable",
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)
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.emit();
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}
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hir::InlineAsmOperand::Sym { expr: self.lower_expr_mut(expr) }
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}
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};
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(op, self.lower_span(*op_sp))
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})
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.collect();
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// Validate template modifiers against the register classes for the operands
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for p in &asm.template {
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if let InlineAsmTemplatePiece::Placeholder {
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operand_idx,
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modifier: Some(modifier),
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span: placeholder_span,
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} = *p
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{
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let op_sp = asm.operands[operand_idx].1;
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match &operands[operand_idx].0 {
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hir::InlineAsmOperand::In { reg, .. }
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| hir::InlineAsmOperand::Out { reg, .. }
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| hir::InlineAsmOperand::InOut { reg, .. }
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| hir::InlineAsmOperand::SplitInOut { reg, .. } => {
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let class = reg.reg_class();
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if class == asm::InlineAsmRegClass::Err {
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continue;
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}
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let valid_modifiers = class.valid_modifiers(asm_arch.unwrap());
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if !valid_modifiers.contains(&modifier) {
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let mut err = sess.struct_span_err(
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placeholder_span,
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"invalid asm template modifier for this register class",
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);
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err.span_label(placeholder_span, "template modifier");
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err.span_label(op_sp, "argument");
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if !valid_modifiers.is_empty() {
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let mut mods = format!("`{}`", valid_modifiers[0]);
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for m in &valid_modifiers[1..] {
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let _ = write!(mods, ", `{}`", m);
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}
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err.note(&format!(
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"the `{}` register class supports \
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the following template modifiers: {}",
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class.name(),
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mods
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));
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} else {
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err.note(&format!(
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"the `{}` register class does not support template modifiers",
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class.name()
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));
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}
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err.emit();
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}
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}
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hir::InlineAsmOperand::Const { .. } => {
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let mut err = sess.struct_span_err(
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placeholder_span,
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"asm template modifiers are not allowed for `const` arguments",
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);
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err.span_label(placeholder_span, "template modifier");
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err.span_label(op_sp, "argument");
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err.emit();
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}
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hir::InlineAsmOperand::Sym { .. } => {
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let mut err = sess.struct_span_err(
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placeholder_span,
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"asm template modifiers are not allowed for `sym` arguments",
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);
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err.span_label(placeholder_span, "template modifier");
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err.span_label(op_sp, "argument");
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err.emit();
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}
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}
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}
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}
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let mut used_input_regs = FxHashMap::default();
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let mut used_output_regs = FxHashMap::default();
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for (idx, &(ref op, op_sp)) in operands.iter().enumerate() {
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if let Some(reg) = op.reg() {
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let reg_class = reg.reg_class();
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if reg_class == asm::InlineAsmRegClass::Err {
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continue;
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}
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// Some register classes can only be used as clobbers. This
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// means that we disallow passing a value in/out of the asm and
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// require that the operand name an explicit register, not a
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// register class.
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if reg_class.is_clobber_only(asm_arch.unwrap()) && !op.is_clobber() {
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let msg = format!(
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"register class `{}` can only be used as a clobber, \
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not as an input or output",
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reg_class.name()
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);
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sess.struct_span_err(op_sp, &msg).emit();
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continue;
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}
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// Check for conflicts between explicit register operands.
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if let asm::InlineAsmRegOrRegClass::Reg(reg) = reg {
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let (input, output) = match op {
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hir::InlineAsmOperand::In { .. } => (true, false),
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// Late output do not conflict with inputs, but normal outputs do
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hir::InlineAsmOperand::Out { late, .. } => (!late, true),
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hir::InlineAsmOperand::InOut { .. }
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| hir::InlineAsmOperand::SplitInOut { .. } => (true, true),
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hir::InlineAsmOperand::Const { .. } | hir::InlineAsmOperand::Sym { .. } => {
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unreachable!()
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}
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};
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// Flag to output the error only once per operand
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let mut skip = false;
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reg.overlapping_regs(|r| {
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let mut check = |used_regs: &mut FxHashMap<asm::InlineAsmReg, usize>,
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input| {
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match used_regs.entry(r) {
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Entry::Occupied(o) => {
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if skip {
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return;
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}
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skip = true;
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let idx2 = *o.get();
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let &(ref op2, op_sp2) = &operands[idx2];
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let reg2 = match op2.reg() {
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Some(asm::InlineAsmRegOrRegClass::Reg(r)) => r,
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_ => unreachable!(),
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};
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let msg = format!(
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"register `{}` conflicts with register `{}`",
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reg.name(),
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reg2.name()
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);
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let mut err = sess.struct_span_err(op_sp, &msg);
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err.span_label(op_sp, &format!("register `{}`", reg.name()));
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err.span_label(op_sp2, &format!("register `{}`", reg2.name()));
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match (op, op2) {
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(
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hir::InlineAsmOperand::In { .. },
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hir::InlineAsmOperand::Out { late, .. },
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)
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| (
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hir::InlineAsmOperand::Out { late, .. },
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hir::InlineAsmOperand::In { .. },
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) => {
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assert!(!*late);
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let out_op_sp = if input { op_sp2 } else { op_sp };
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let msg = "use `lateout` instead of \
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`out` to avoid conflict";
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err.span_help(out_op_sp, msg);
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}
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_ => {}
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}
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err.emit();
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}
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Entry::Vacant(v) => {
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if r == reg {
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v.insert(idx);
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}
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}
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}
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};
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if input {
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check(&mut used_input_regs, true);
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}
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if output {
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check(&mut used_output_regs, false);
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}
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});
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}
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}
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}
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// If a clobber_abi is specified, add the necessary clobbers to the
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// operands list.
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let mut clobbered = FxHashSet::default();
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for (abi, (_, abi_span)) in clobber_abis {
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for &clobber in abi.clobbered_regs() {
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// Don't emit a clobber for a register already clobbered
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if clobbered.contains(&clobber) {
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continue;
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}
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let mut output_used = false;
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clobber.overlapping_regs(|reg| {
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if used_output_regs.contains_key(®) {
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output_used = true;
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}
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});
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if !output_used {
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operands.push((
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hir::InlineAsmOperand::Out {
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reg: asm::InlineAsmRegOrRegClass::Reg(clobber),
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late: true,
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expr: None,
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},
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self.lower_span(abi_span),
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));
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clobbered.insert(clobber);
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}
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}
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}
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let operands = self.arena.alloc_from_iter(operands);
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let template = self.arena.alloc_from_iter(asm.template.iter().cloned());
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let template_strs = self.arena.alloc_from_iter(
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asm.template_strs
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.iter()
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.map(|(sym, snippet, span)| (*sym, *snippet, self.lower_span(*span))),
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);
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let line_spans =
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self.arena.alloc_from_iter(asm.line_spans.iter().map(|span| self.lower_span(*span)));
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let hir_asm =
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hir::InlineAsm { template, template_strs, operands, options: asm.options, line_spans };
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self.arena.alloc(hir_asm)
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}
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}
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