rust/compiler/rustc_codegen_llvm
Yuki Okushi 02a0bdee0d
Rollup merge of #104066 - TimNN:riscv-layout, r=nikic
LLVM 16: Update RISCV data layout

The RISCV data layout was changed in 974e2e690b.

This updates all `riscv64*` targets, though I don't really know what the difference between the `gc` and `imac` ones is.

Passes `x test codegen` at LLVM head and with the currently bundled LLVM version. Without this patch, some tests fail with:

> error: internal compiler error: compiler/rustc_codegen_llvm/src/context.rs:192:13: data-layout for target `riscv64gc-unknown-none-elf`, `e-m:e-p:64:64-i64:64-i128:128-n64-S128`, differs from LLVM target's `riscv64` default layout, `e-m:e-p:64:64-i64:64-i128:128-n32:64-S128
2022-11-07 09:46:28 +09:00
..
src Rollup merge of #104066 - TimNN:riscv-layout, r=nikic 2022-11-07 09:46:28 +09:00
Cargo.toml Auto merge of #99324 - reez12g:issue-99144, r=jyn514 2022-10-06 03:01:57 +00:00
README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.