52 lines
3.6 KiB
Diff
52 lines
3.6 KiB
Diff
- // MIR for `unchecked_shr_signed_smaller` before Inline
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+ // MIR for `unchecked_shr_signed_smaller` after Inline
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fn unchecked_shr_signed_smaller(_1: i16, _2: u32) -> i16 {
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debug a => _1; // in scope 0 at $DIR/unchecked_shifts.rs:+0:44: +0:45
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debug b => _2; // in scope 0 at $DIR/unchecked_shifts.rs:+0:52: +0:53
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let mut _0: i16; // return place in scope 0 at $DIR/unchecked_shifts.rs:+0:63: +0:66
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let mut _3: i16; // in scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:6
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let mut _4: u32; // in scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
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+ scope 1 (inlined core::num::<impl i16>::unchecked_shr) { // at $DIR/unchecked_shifts.rs:17:7: 17:23
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+ debug self => _3; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
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+ debug rhs => _4; // in scope 1 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
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+ let mut _5: i16; // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ let mut _6: (u32,); // in scope 1 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ scope 2 {
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+ }
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+ }
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bb0: {
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StorageLive(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:6
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_3 = _1; // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:6
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StorageLive(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
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_4 = _2; // scope 0 at $DIR/unchecked_shifts.rs:+1:21: +1:22
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- _0 = core::num::<impl i16>::unchecked_shr(move _3, move _4) -> bb1; // scope 0 at $DIR/unchecked_shifts.rs:+1:5: +1:23
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+ StorageLive(_5); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ StorageLive(_6); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ _6 = (_4,); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ _5 = core::num::<impl i16>::unchecked_shr::conv(move (_6.0: u32)) -> bb1; // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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// mir::Constant
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- // + span: $DIR/unchecked_shifts.rs:17:7: 17:20
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- // + literal: Const { ty: unsafe fn(i16, u32) -> i16 {core::num::<impl i16>::unchecked_shr}, val: Value(<ZST>) }
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+ // + span: $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ // + literal: Const { ty: fn(u32) -> i16 {core::num::<impl i16>::unchecked_shr::conv}, val: Value(<ZST>) }
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}
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bb1: {
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+ StorageDead(_6); // scope 2 at $SRC_DIR/core/src/num/mod.rs:LL:COL
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+ _0 = unchecked_shr::<i16>(_3, move _5) -> [return: bb2, unwind unreachable]; // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
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+ // mir::Constant
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+ // + span: $SRC_DIR/core/src/num/int_macros.rs:LL:COL
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+ // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(i16, i16) -> i16 {unchecked_shr::<i16>}, val: Value(<ZST>) }
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+ }
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+
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+ bb2: {
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+ StorageDead(_5); // scope 2 at $SRC_DIR/core/src/num/int_macros.rs:LL:COL
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StorageDead(_4); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
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StorageDead(_3); // scope 0 at $DIR/unchecked_shifts.rs:+1:22: +1:23
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return; // scope 0 at $DIR/unchecked_shifts.rs:+2:2: +2:2
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}
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}
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