rust/compiler/rustc_codegen_llvm
Trevor Gross 8ea70e9537
Rollup merge of #129536 - beetrees:f16-f128-inline-asm-aarch64, r=Amanieu
Add `f16` and `f128` inline ASM support for `aarch64`

Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in #127043.

Relevant issue: #125398
Tracking issue: #116909

`@rustbot` label +F-f16_and_f128

try-job: aarch64-gnu
try-job: aarch64-apple
2024-08-27 01:46:53 -05:00
..
src Rollup merge of #129536 - beetrees:f16-f128-inline-asm-aarch64, r=Amanieu 2024-08-27 01:46:53 -05:00
Cargo.toml Update some dependency versions that allow better licensing 2024-08-18 13:59:27 -05:00
messages.ftl Always use ar_archive_writer for import libs 2024-08-17 19:10:46 +00:00
README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.