29 lines
1.1 KiB
Rust
29 lines
1.1 KiB
Rust
// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
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use crate::spec::{LinkerFlavor, LldFlavor, Target, TargetOptions, TargetResult};
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pub fn target() -> TargetResult {
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Ok(Target {
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llvm_target: "thumbv6m-none-eabi".to_string(),
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target_endian: "little".to_string(),
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target_pointer_width: "32".to_string(),
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target_c_int_width: "32".to_string(),
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data_layout: "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64".to_string(),
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arch: "arm".to_string(),
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target_os: "none".to_string(),
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target_env: String::new(),
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target_vendor: String::new(),
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linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
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options: TargetOptions {
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// The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
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// with +strict-align.
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features: "+strict-align".to_string(),
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// There are no atomic CAS instructions available in the instruction set of the ARMv6-M
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// architecture
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atomic_cas: false,
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.. super::thumb_base::opts()
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}
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})
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}
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