bb8db13892
The new `rmake`-content asserts the exact assembly sequence for the loop preventing false-negatives if some instructions would change and thus the label offset might need to change.
48 lines
1.4 KiB
Rust
48 lines
1.4 KiB
Rust
//! This test case is a `#![no_core]`-version of the MVCE presented in #129301.
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//!
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//! The function [`delay()`] is removed, as it is not necessary to trigger the
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//! wrong behavior and would require some additional lang items.
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#![feature(no_core, lang_items, intrinsics, rustc_attrs)]
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#![no_core]
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#![no_main]
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#![allow(internal_features)]
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use minicore::ptr;
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#[no_mangle]
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pub fn main() -> ! {
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let port_b = 0x25 as *mut u8; // the I/O-address of PORTB
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// a simple loop with some trivial instructions within. This loop label has
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// to be placed correctly before the `ptr::write_volatile()` (some LLVM ver-
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// sions did place it after the first loop instruction, causing unsoundness)
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loop {
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unsafe { ptr::write_volatile(port_b, 1) };
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unsafe { ptr::write_volatile(port_b, 2) };
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}
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}
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// FIXME: replace with proper minicore once available (#130693)
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mod minicore {
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#[lang = "sized"]
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pub trait Sized {}
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#[lang = "copy"]
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pub trait Copy {}
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impl Copy for u32 {}
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impl Copy for &u32 {}
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impl<T: ?Sized> Copy for *mut T {}
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pub mod ptr {
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#[inline]
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#[rustc_diagnostic_item = "ptr_write_volatile"]
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pub unsafe fn write_volatile<T>(dst: *mut T, src: T) {
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extern "rust-intrinsic" {
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#[rustc_nounwind]
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pub fn volatile_store<T>(dst: *mut T, val: T);
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}
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unsafe { volatile_store(dst, src) };
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}
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}
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}
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