// MIR for `slice_index_range` after PreCodegen

fn slice_index_range(_1: &[u32], _2: std::ops::Range<usize>) -> &[u32] {
    debug slice => _1;                   // in scope 0 at $DIR/slice_index.rs:+0:26: +0:31
    debug index => _2;                   // in scope 0 at $DIR/slice_index.rs:+0:41: +0:46
    let mut _0: &[u32];                  // return place in scope 0 at $DIR/slice_index.rs:+1:5: +1:18
    let _3: &[u32];                      // in scope 0 at $DIR/slice_index.rs:+1:6: +1:18
    scope 1 (inlined #[track_caller] core::slice::index::<impl Index<std::ops::Range<usize>> for [u32]>::index) { // at $DIR/slice_index.rs:21:6: 21:18
        debug self => _1;                // in scope 1 at $SRC_DIR/core/src/slice/index.rs:LL:COL
        debug index => _2;               // in scope 1 at $SRC_DIR/core/src/slice/index.rs:LL:COL
    }

    bb0: {
        StorageLive(_3);                 // scope 0 at $DIR/slice_index.rs:+1:6: +1:18
        _3 = <std::ops::Range<usize> as SliceIndex<[u32]>>::index(move _2, _1) -> bb1; // scope 1 at $SRC_DIR/core/src/slice/index.rs:LL:COL
                                         // mir::Constant
                                         // + span: $SRC_DIR/core/src/slice/index.rs:LL:COL
                                         // + literal: Const { ty: for<'a> fn(std::ops::Range<usize>, &'a [u32]) -> &'a <std::ops::Range<usize> as SliceIndex<[u32]>>::Output {<std::ops::Range<usize> as SliceIndex<[u32]>>::index}, val: Value(<ZST>) }
    }

    bb1: {
        _0 = _3;                         // scope 0 at $DIR/slice_index.rs:+1:5: +1:18
        StorageDead(_3);                 // scope 0 at $DIR/slice_index.rs:+2:1: +2:2
        return;                          // scope 0 at $DIR/slice_index.rs:+2:2: +2:2
    }
}