Commit Graph

22 Commits

Author SHA1 Message Date
Antoni Boucher
a3b6444909 Fix CI 2023-11-18 13:19:32 -05:00
Antoni Boucher
cc2af1fb41 Do not emit .eh_frame section when using -Cpanic=abort 2023-11-08 09:10:33 -05:00
Antoni Boucher
a6984f5961 Fix tests 2023-10-26 08:26:03 -04:00
Antoni Boucher
783789f831 Build the sysroot and run more tests 2023-10-25 11:19:03 -04:00
Antoni Boucher
be3b1e3321 Fix gep on pointers to non-number 2023-09-20 09:10:24 -04:00
Antoni Boucher
4b878ccab4 Fix tests 2023-03-04 19:49:03 -05:00
Antoni Boucher
3180da5529 Fix tests 2023-03-04 19:18:31 -05:00
Antoni Boucher
f83ede03f5 Fix tests 2023-03-04 18:52:25 -05:00
Antoni Boucher
42a89bd875 Fix tests 2023-03-04 15:41:30 -05:00
Antoni Boucher
9d5bc7c929 Fix tests 2023-03-04 15:25:34 -05:00
Antoni Boucher
edee0973b2 Update failures for libgccjit12 2023-02-25 21:03:58 -05:00
Antoni Boucher
fa6ae3c8bb Cleanup 2023-01-26 13:53:36 -05:00
Antoni Boucher
f5ced68a66 Adjust failing tests 2023-01-22 20:16:46 -05:00
Antoni Boucher
246ba9b393 Add missing libgccjit 12 failing tests 2023-01-09 22:19:10 -05:00
Antoni Boucher
173db39f91 Fix simd_select 2022-10-09 14:24:35 -04:00
Antoni Boucher
f73dea7e55 Fix simd_bitmask 2022-10-09 11:42:12 -04:00
Andy Sadler
436710fa9b
simd: enable simd_as intrinsic
The method context.convert_vector, added to libgccjit for simd_cast,
appears to give the correct behavior for simd_as.  Instead of
special-casing simd_as, re-use simd_cast's impl for simd_as.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-10-02 19:04:49 -05:00
Andy Sadler
d7d820fc47
simd: impl extract_element for vector types
This fixes some tests that needed vector element extraction.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-09-09 10:07:36 -05:00
Andy Sadler
1d3ca135d0
simd: implement simd_fmin/fmax
This implements simd_fmin/fmax in a largely-optimal method.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-08-30 19:34:27 -05:00
Antoni Boucher
fc56c54416 Remove extra newline in asm 2022-08-27 19:41:37 -04:00
Andy Sadler
4df874f73d simd: Implement missing reduction intrinsics
Implements the following simd reduction intrinsics:
- simd_reduce_add_ordered
- simd_reduce_mul_ordered
- simd_reduce_min_nanless
- simd_reduce_max_nanless
- simd_reduce_xor
- simd_reduce_any
- simd_reduce_all

Also fixes the ordering of simd_reduce_min and simd_reduce_max,
which were tested to be flipped.

Both simd_reduce_min_nanless and simd_reduce_max_nanless are identical
to their non-nanless variants for the time being.  An attempt was made
at a more optimal codegen solution based on vector_reduce_op.  However,
this approach ran into masking issues for floating-point vector types,
which appears to be broken for the same reason that comparison
operations such as simd_lt are broken for floating-point vector types.
More investigation is required, however, to determine a root cause and
appropriate fix.

This should be enough to pass the generic-reduction-pass.rs ui tests
with the 'master' feature enabled.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-08-27 12:16:37 -05:00
Guillaume Gomez
0ba53c8211 Split rustc tests in two 2022-07-05 19:46:59 +02:00