antoyo
e4ec64a1c4
Merge pull request #459 from tempdragon/master
...
fix(fmt/style): Clippy-generated Code Correction
2024-03-04 08:07:26 -05:00
Antoni Boucher
4baadb7859
Update lang_tester so that panicking in a test results in the test failing
2024-03-01 17:28:57 -05:00
tempdragon
aeffc2fcaa
fix(fmt/style): Clippy-generated Code Correction
...
Modifications to Commit:
Modified: src/allocator.rs
Modified: src/asm.rs
Modified: src/back/lto.rs
Modified: src/consts.rs
Modified: src/debuginfo.rs
Modified: src/intrinsic/mod.rs
Modified: src/lib.rs
Modified: src/mono_item.rs
Modified: src/type_.rs
Modified: tests/lang_tests_common.rs
2024-02-29 10:33:11 +08:00
Antoni Boucher
c2c68e3f4d
Format the code
2024-02-28 17:49:16 -05:00
Antoni Boucher
e7b7c98e1c
Fix tests
2024-02-20 12:02:09 -05:00
Antoni Boucher
f6e16e95df
Merge branch 'master' into sync_from_rust_2024_02_20
2024-02-20 10:24:06 -05:00
Andy Sadler
087456f122
mark tests/ui/simd/issue-89193.rs as failing for libgccjit12
...
Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2024-02-17 18:07:11 -06:00
Andy Sadler
5ac9bee7f1
fix tests/ui/simd/issue-89193.rs and mark as passing
...
Work around an issue where usize and isize can sometimes (but not
always) get canonicalized to their corresponding integer type. This
causes shuffle_vector to panic, since the types of the vectors it got
passed aren't the same.
Also insert a cast on the mask element, since we might get passed a
signed integer of any size, not just i32. For now, we always cast to
i32.
Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2024-02-17 17:24:46 -06:00
Guillaume Gomez
46d6e772c0
Update tests/lang_tests_common.rs
test
2024-02-13 22:11:31 +01:00
Guillaume Gomez
d04ffb0ffc
Update lang_tests_common.rs test
2024-02-13 15:43:42 +01:00
Guillaume Gomez
79241b8a4e
Update tests to use config.toml
instead
2024-02-11 23:15:50 +01:00
Antoni Boucher
0a38748d8a
Renable intrinsics-integer.rs test
2024-02-03 13:26:06 -05:00
Antoni Boucher
ad8e820139
Update for rebased gcc
2024-02-02 11:49:32 -05:00
Ralf Jung
215284a490
remove StructuralEq trait
2024-01-24 07:56:23 +01:00
Antoni Boucher
9f4f90b19a
Merge commit 'e4fe941b11a55c5005630696e9b6d81c65f7bd04' into subtree-update_cg_gcc_2023-10-25
2023-10-26 17:42:02 -04:00
Antoni Boucher
783789f831
Build the sysroot and run more tests
2023-10-25 11:19:03 -04:00
Antoni Boucher
a93d1b73c6
Fix volatile_load
2023-10-24 19:53:59 -04:00
Antoni Boucher
7425c560d3
Add comment
2023-10-21 18:48:03 -04:00
Antoni Boucher
242a482c88
Merge commit '11a0cceab966e5ff1058ddbcab5977e8a1d6d290' into subtree-update_cg_gcc_2023-10-09
2023-10-09 15:53:34 -04:00
Antoni Boucher
e7f7fb87dd
Fix tests
2023-10-09 10:55:25 -04:00
Antoni Boucher
be3b1e3321
Fix gep on pointers to non-number
2023-09-20 09:10:24 -04:00
Antoni Boucher
cd1644a658
Fix const handling in ATT syntax
2023-09-09 12:50:25 -04:00
Antoni Boucher
e3deac5c71
Fix tests
2023-08-15 11:11:57 -04:00
Antoni Boucher
d725cfb6ab
Merge commit '08a6d6e16b5efe217123e780398969946266268f' into sync-cg_gcc-2023-03-04
2023-03-05 12:03:19 -05:00
Amanieu d'Antras
14e0e0fec3
Stabilize asm_sym
2022-10-17 22:38:37 +01:00
Urgau
4d398832a5
Stabilize bench_black_box
2022-09-27 17:38:51 +02:00
Antoni Boucher
fac57d9a06
Merge commit 'e8dca3e87d164d2806098c462c6ce41301341f68' into sync_from_cg_gcc
2022-06-06 22:04:37 -04:00
bjorn3
3888aafe3a
Merge commit '39683d8eb7a32a74bea96ecbf1e87675d3338506' into sync_cg_gcc-2022-03-26
2022-03-26 18:29:37 +01:00
bjorn3
54d2ec1a82
Merge commit '1411a98352ba6bee8ba3b0131c9243e5db1e6a2e' into sync_cg_clif-2021-12-31
2021-12-31 16:26:32 +01:00
Amanieu d'Antras
eec5f919e7
Stabilize asm! and global_asm!
...
They are also removed from the prelude as per the decision in
https://github.com/rust-lang/rust/issues/87228 .
stdarch and compiler-builtins are updated to work with the new, stable
asm! and global_asm! macros.
2021-12-12 11:20:03 +00:00
Commeownist
7c707e4b95
Implement basic inline asm support ( #72 )
...
* Implement basic support for inline assembly
* Disable LTO
We don't support it yet at all
* Handle `inout(reg) var` correctly
Turns out that `+` readwrite output registers cannot be tied with
input variables.
* Add limited support for llvm_asm!
* Handle CHANNEL correctly
* Add support for arbitrary explicit registers
* Handle symbols properly
* Add rudimentary asm tests
* Exclude llvm_asm! tests from tests runs
* Insert `__builtin_unreachable()` after diverging asm blocks
2021-09-05 11:26:01 -04:00
Antoni Boucher
afae271d5d
Initial commit
2021-08-12 21:46:50 -04:00