bjorn3
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76900705e8
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Implement all vendor intrinsics used by regex on AVX2 systems
This allows it to work with --sysroot llvm
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2023-06-05 15:33:54 +00:00 |
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bjorn3
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c3ee030119
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Fix passing and returning vector types
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2023-03-26 10:22:37 +00:00 |
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bjorn3
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18184d8ecd
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Format all tests in example/
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2023-03-18 14:27:50 +00:00 |
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bjorn3
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bb933d26dc
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Fix abi for checked multiplication
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2023-02-18 18:45:27 +01:00 |
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bjorn3
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90a7ee6c70
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Check output of checked_div in std_example
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2023-02-18 16:40:06 +01:00 |
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bjorn3
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777d4732dc
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Fix transmuting from vector type to ScalarPair type
Fixes #1292
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2022-10-29 13:47:10 +00:00 |
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Urgau
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102a577bb3
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Stabilize bench_black_box
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2022-09-27 17:38:51 +02:00 |
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bjorn3
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640c3f730a
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Merge commit 'c19edfd71a1d0ddef86c2c67fdb40718d40a72b4' into sync_cg_clif-2022-07-25
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2022-07-25 16:07:57 +02:00 |
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bjorn3
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32202f20cd
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Merge commit 'f2cdd4a78d89c009342197cf5844a21f8aa813df' into sync_cg_clif-2022-04-22
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2022-04-22 21:11:38 +02:00 |
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bjorn3
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fb92375755
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Merge commit '3a31c6d8272c14388a34622193baf553636fe470' into sync_cg_clif-2021-07-07
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2021-07-07 11:14:20 +02:00 |
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bjorn3
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d6b03451e6
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Merge commit '40dd3e2b7089b5e96714e064b731f6dbf17c61a9' into sync_cg_clif-2021-05-27
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2021-05-27 13:08:14 +02:00 |
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Erin Power
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ee570b1302
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Sync rustc_codegen_cranelift 'ddd4ce25535cf71203ba3700896131ce55fde795'
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2021-04-30 14:49:58 +02:00 |
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bjorn3
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77f74ed070
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Merge commit 'dbee13661efa269cb4cd57bb4c6b99a19732b484' into sync_cg_clif-2020-12-27
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2020-12-27 10:30:38 +01:00 |
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bjorn3
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d404840788
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Merge commit '5988bbd24aa87732bfa1d111ba00bcdaa22c481a' into sync_cg_clif-2020-11-27
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2020-11-27 20:48:53 +01:00 |
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bjorn3
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285c7c66dc
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Merge commit '03f01bbe901d60b71cf2c5ec766aef5e532ab79d' into update_cg_clif-2020-11-01
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2020-11-03 11:00:04 +01:00 |
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bjorn3
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ee2addd010
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Don't test x86_64 simd on archs other than x86_64
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2020-08-20 13:22:07 +02:00 |
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bjorn3
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c1a68b1386
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Emulate the cpuid arch intrinsic
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2020-08-15 19:08:19 +02:00 |
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bjorn3
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49b7fac443
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Enable simd insert and extract tests
Working since rust-lang/stdarch#876
Fixes #666
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2020-08-08 16:32:03 +02:00 |
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bjorn3
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edc0a3470b
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Implement simd_insert
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2020-07-19 14:54:18 +02:00 |
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bjorn3
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e87651c3f2
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Add test for SwitchInt on 128bit integers
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2020-07-16 13:01:20 +02:00 |
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bjorn3
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8d639cd778
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Test signed 128bit discriminants
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2020-07-03 16:44:26 +02:00 |
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bjorn3
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5f54cc7658
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Implement checked_mul
Fixes #6
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2020-06-20 15:15:28 +02:00 |
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bjorn3
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ef4186a85b
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Use Cranelift legalization for icmp.i128
The previous translation was wrong for signed 128bit comparisions
This fixes several libcore tests
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2020-06-20 13:23:31 +02:00 |
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bjorn3
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5c6bf836fe
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Implement #[link_section]
Fixes #1047
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2020-06-20 12:01:24 +02:00 |
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bjorn3
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eab4c9063e
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Sync fn_sig_for_fn_abi with upstream for generator resume args
Fixes #970
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2020-04-18 15:45:42 +02:00 |
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bjorn3
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9ab2af56aa
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Rustup to rustc 1.43.0-nightly (4ad624882 2020-03-03)
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2020-03-04 15:04:28 +01:00 |
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bjorn3
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c8de552c01
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Tls support
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2020-02-26 14:41:05 +01:00 |
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bjorn3
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e9d3569e08
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Run libcore tests
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2019-11-24 15:44:39 +01:00 |
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bjorn3
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b0bcb23eb4
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Fix signed cast to 128bit integer
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2019-11-16 16:44:26 +01:00 |
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bjorn3
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5407b51aa7
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Rustup to rustc 1.40.0-nightly (9e346646e 2019-11-08)
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2019-11-09 11:14:18 +01:00 |
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bjorn3
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1f90b04cd6
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Fix float -> u/i128 cast
The original test casts were optimized away by rustc,
so cg_clif never saw them.
cc #668
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2019-08-21 14:35:48 +02:00 |
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bjorn3
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b2d6705fe2
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Implement u/i128 <-> float casts
Fixes #668
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2019-08-21 14:01:29 +02:00 |
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bjorn3
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3fcd54088c
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Implement saturating_{add,sub} intrinsics
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2019-08-20 10:40:08 +02:00 |
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bjorn3
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f99d31dbfe
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Implement pow{f32,f64} intrinsics
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2019-08-19 17:16:21 +02:00 |
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bjorn3
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edbb5730ea
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Implement copysign{f32,f64} intrinsics
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2019-08-19 16:27:09 +02:00 |
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bjorn3
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2558bf2f6b
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Workaround for missing #[rustc_args_required_const(..)] support
cc #666
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2019-08-16 16:04:50 +02:00 |
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bjorn3
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9505d60a24
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Cast rhs to lhs type for shl and shr
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2019-08-14 15:18:05 +02:00 |
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bjorn3
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f5b0a68fbf
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Fix some warnings
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2019-08-12 16:00:10 +02:00 |
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bjorn3
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314141392a
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Implement log2{f32,f64} intrinsics
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2019-08-12 15:54:24 +02:00 |
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bjorn3
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7602a46bb9
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Implement simd_extract
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2019-08-05 16:28:27 +02:00 |
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bjorn3
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2f0093b8c2
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Test mutex locking
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2019-08-01 11:15:40 +02:00 |
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bjorn3
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b806070a88
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Fix simd_cast
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2019-07-31 09:46:05 +02:00 |
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bjorn3
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69526d464f
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Implement some float simd intrinsics
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2019-07-30 14:37:20 +02:00 |
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bjorn3
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ee4927e069
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Fix _mm_movemask_epi8
The order of iteration was wrong
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2019-07-29 18:59:17 +02:00 |
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bjorn3
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63646b1956
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Implement llvm.x86.avx2.pmovmskb llvm intrinsic
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2019-07-29 12:50:20 +02:00 |
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bjorn3
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9cb787fe70
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Implement and test simd_shuffle*
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2019-07-29 11:23:53 +02:00 |
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bjorn3
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76b89476c3
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[WIP] simd_shuffle*
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2019-07-29 11:03:55 +02:00 |
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bjorn3
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90f2b12d47
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Fix simd comparison
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2019-07-29 11:03:55 +02:00 |
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bjorn3
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7fdd058c60
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Emulate some simd intrinsics
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2019-07-29 11:03:55 +02:00 |
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bjorn3
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436a24a85d
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Implement many more float intrinsics
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2019-07-27 16:52:00 +02:00 |
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