Commit Graph

8825 Commits

Author SHA1 Message Date
returntrip
f2154e9837 To make it easier for Linux distributions, ship the licenses text within
each crate directory.
2020-05-25 23:06:08 +02:00
bors
dd06d2983f Auto merge of #4429 - jeremystucki:or_fun_call, r=flip1995
Update 'or_fun_call' to ignore calls to len

Resolves #1653

changelog: Update `or_fun_call`: Allow calls to `len` for Slice, Array & Vec.
2020-05-25 20:15:34 +00:00
Jeremy Stucki
d9f55322cc
Update ui test 2020-05-25 21:41:28 +02:00
Jeremy Stucki
bcfeb4de15
Fix build 2020-05-25 21:41:20 +02:00
Jeremy Stucki
566377f627
Ignore calls to 'len' 2020-05-25 21:41:20 +02:00
Jeremy Stucki
6bd9cd99a3
Add tests 2020-05-25 21:41:19 +02:00
bors
acd484e51d Auto merge of #5641 - ThibsG:DocCommonTools, r=flip1995
Add common lint tools doc

This PR starts adding some documentation about linting tools.

`Retrieving all methods of a type` is not covered at this time.

fixes partially: #3843

changelog: none
2020-05-25 19:33:52 +00:00
bors
6de17b043d Auto merge of #5635 - montrivo:bugfix/option_option_test_case, r=flip1995
option_option test case #4298

Adds regression test case for #4298.

The bug seems still present although rust Playground said otherwise.

changelog: none
2020-05-25 19:22:08 +00:00
Eduardo Broto
60d38ee1dd reversed_empty_ranges: add suggestion for &slice[N..N] 2020-05-25 20:06:15 +02:00
ThibsG
827041252c Add common lint tools doc 2020-05-25 20:03:55 +02:00
ThibsG
705bfdcc46 Extend useless_conversion lint with TryInto 2020-05-25 20:00:39 +02:00
ThibsG
4f8909fad9 Extend useless_conversion lint with TryFrom 2020-05-25 20:00:39 +02:00
Eduardo Broto
ec0a00e539 Use find_map instead of find() + map() 2020-05-25 20:00:08 +02:00
Eduardo Broto
8642fc97dd multiple_crate_versions: skip dev and build deps 2020-05-25 20:00:08 +02:00
Eduardo Broto
cff5cff2f3 Make the name of the crate available in cargo UI tests 2020-05-25 20:00:08 +02:00
bors
c41916d9bd Auto merge of #5616 - euclio:no-derive-suggestion, r=phansch,flip1995
new_without_default: do not suggest deriving

---

changelog: do not suggest deriving `Default` in `new_without_default`

This commit changes the behavior of the `new_without_default` lint to not suggest deriving `Default`. This suggestion is misleading if the `new` implementation does something different than what a derived `Default` implementation would do, because then the two methods would not be equivalent.

Instead, the `can_derive_default` check is removed, and we always suggest implementing `Default` in terms of `new()`.
2020-05-25 17:19:00 +00:00
bors
7ca335a97d Auto merge of #5639 - nickrtorres:unnecessary-mut-passed-doc-cleanup, r=phansch
Clarify the documentation of the `unnecessary_mut_passed` lint

fixes #5433 by replacing "giving" with "passing"

changelog: Clarifies documentation for `unnecessary_mut_passed`
2020-05-25 17:02:12 +00:00
bors
f162dc3ea0 Auto merge of #5646 - flip1995:rustup, r=matthiaskrgr
Rustup

r? @phansch

changelog: none
2020-05-25 16:42:50 +00:00
Philipp Krones
7a83eafd44
Also fetch origin before merging master into the rustup branch 2020-05-25 17:11:07 +02:00
Nick Torres
a709559705 Clarify the documentation of the unnecessary_mut_passed lint 2020-05-23 16:15:30 -07:00
Bastian Kauschke
e820a03d1c iterate List by value 2020-05-23 12:24:19 +02:00
Dylan MacKenzie
b3a690f5a1 Use OnceCell instead of Once 2020-05-22 13:31:02 -07:00
Tim Nielens
29d043683e option_option test case #4298 2020-05-22 19:21:30 +02:00
Andy Russell
a578bed69a
new_without_default: do not suggest deriving 2020-05-22 11:49:51 -04:00
Lzu Tao
221c482142 Stabilize str_strip feature 2020-05-22 15:29:47 +00:00
bors
ce86f907ef Auto merge of #5632 - flip1995:rustup, r=phansch
Rustup

changelog: none
2020-05-22 13:00:38 +00:00
flip1995
6b3cf63bf5
Fix dogfood fallout 2020-05-22 14:45:51 +02:00
flip1995
c00268d984
Also install llvm-tools on toolchain setup 2020-05-22 14:08:21 +02:00
bors
780572bc8d Auto merge of #5614 - ebroto:test_cargo_lints, r=flip1995
Test cargo lints

changelog: Add infrastructure to test cargo lints

Closes #5603
2020-05-21 14:43:56 +00:00
Eduardo Broto
f9013ff197 Relax fs layout so that multiple pass/fail manifests are possible 2020-05-21 15:34:48 +02:00
Eduardo Broto
1a04686fc0 Avoid triggering match_wildcard_for_single_variants 2020-05-21 14:47:13 +02:00
Eduardo Broto
7ff71199df Address comments from PR review 2020-05-21 14:46:04 +02:00
Eduardo Broto
5d0135e222 Add documentation for testing cargo lints 2020-05-21 14:11:11 +02:00
Eduardo Broto
1eb6adf475 Adapt cargo dev new_lint to create tests for cargo lints 2020-05-21 14:11:11 +02:00
Eduardo Broto
7a0eccbd8a Add test for multiple_crate_versions
Make the output of the lint deterministic by sorting the versions
2020-05-21 14:11:11 +02:00
Eduardo Broto
bc93f7052e Add test for cargo_common_metadata
Fix missing `authors` entry in the provided example
2020-05-21 14:11:11 +02:00
Eduardo Broto
96af3e8360 Add test for wildcard_dependencies 2020-05-21 14:11:11 +02:00
Eduardo Broto
bd9b09e293 Adapt compile-test to run tests for cargo lints 2020-05-21 14:11:11 +02:00
bors
1831385ff0 Auto merge of #5611 - rrbutani:master, r=flip1995
Add to the list of words clippy::doc_markdown ignores

"TypeScript" is the only one of these I actually ran into organically; I can remove the others if they're too much.

changelog: Add to the list of words `clippy::doc_markdown` ignores
2020-05-20 14:15:12 +00:00
bors
20f09e1daa Auto merge of #5622 - elichai:2020-05-match_wild_err_arm, r=flip1995
Downgrade `match_wild_err_arm` to pedantic and update help messages

Hi,
This fixes #3688 and downgrades `match_wild_err_arm` to pedantic.
There are a lot of different reasons in that issue, for me the biggest are:
1. Rust's errors aren't like Java's exceptions because they're type safe and in most cases the type of error can't change by itself.
2. Sometimes matching can be more ergonomic, and before the `track_caller` feature got introduced it was actually easier to track the panic location with explicit `panic!` than with `expect`.

Currently clippy is failing to build because of a breaking change in https://github.com/rust-lang/rust/pull/69171 I tried fixing it but it is too complex for my little knowledge of clippy and rustc so I'll leave that to people who know what they're doing :)

Another thing, if rustc is breaking clippy a lot then maybe it's better to use something like `miri` does, where it's hard codes the latest tested rustc commit and they keep bumping it, that way when you develop locally it should work even if there was a breaking change (https://github.com/rust-lang/miri/blob/master/rustup-toolchain#L23-L29)

changelog: Downgrade `match_wild_err_arm` to pedantic
2020-05-20 14:02:06 +00:00
Elichai Turkel
2db7f1abf8
Update future-not-send stderr output 2020-05-20 16:46:30 +03:00
Bastian Kauschke
091239ee60 introduce newtype'd Predicate<'tcx> 2020-05-20 15:44:34 +02:00
Elichai Turkel
ecd0a67b01
Make match_wild_err_arm pedantic, and update help messages 2020-05-20 16:39:03 +03:00
Bastian Kauschke
2722522fac rename Predicate to PredicateKind, introduce alias 2020-05-20 15:38:03 +02:00
bors
cafa94662c Auto merge of #5582 - vtmargaryan:match_wildcard_for_single_variants, r=flip1995
New lint: `match_wildcard_for_single_variants`

changelog: Added a new lint match_wildcard_for_single_variants to warn on enum matches where a wildcard is used to match a single variant

Closes #5556
2020-05-20 12:51:28 +00:00
bors
34ba597ccb Auto merge of #5621 - flip1995:rustup, r=phansch
Rustup

@oli-obk Do you know, how we can enforce (ui-)tests pass in rust-lang/rust for Clippy? I can open a PR for this, if you tell me what would be necessary for this.

changelog: none
2020-05-20 12:09:24 +00:00
flip1995
f28f1f15da
Fix dogfood fallout 2020-05-20 13:32:53 +02:00
flip1995
da9b138ec7
Update test after const_ptr functions are must_use now 2020-05-20 13:25:20 +02:00
flip1995
b8098fe4cc
Merge remote-tracking branch 'upstream/master' into rustup3 2020-05-20 13:25:05 +02:00
bors
6cb1f5972d Auto merge of #69171 - Amanieu:new-asm, r=nagisa,nikomatsakis
Implement new asm! syntax from RFC 2850

This PR implements the new `asm!` syntax proposed in https://github.com/rust-lang/rfcs/pull/2850.

# Design

A large part of this PR revolves around taking an `asm!` macro invocation and plumbing it through all of the compiler layers down to LLVM codegen. Throughout the various stages, an `InlineAsm` generally consists of 3 components:

- The template string, which is stored as an array of `InlineAsmTemplatePiece`. Each piece represents either a literal or a placeholder for an operand (just like format strings).
```rust
pub enum InlineAsmTemplatePiece {
    String(String),
    Placeholder { operand_idx: usize, modifier: Option<char>, span: Span },
}
```

- The list of operands to the `asm!` (`in`, `[late]out`, `in[late]out`, `sym`, `const`). These are represented differently at each stage of lowering, but follow a common pattern:
  - `in`, `out` and `inout` all have an associated register class (`reg`) or explicit register (`"eax"`).
  - `inout` has 2 forms: one with a single expression that is both read from and written to, and one with two separate expressions for the input and output parts.
  - `out` and `inout` have a `late` flag (`lateout` / `inlateout`) to indicate that the register allocator is allowed to reuse an input register for this output.
  - `out` and the split variant of `inout` allow `_` to be specified for an output, which means that the output is discarded. This is used to allocate scratch registers for assembly code.
  - `sym` is a bit special since it only accepts a path expression, which must point to a `static` or a `fn`.

- The options set at the end of the `asm!` macro. The only one that is particularly of interest to rustc is `NORETURN` which makes `asm!` return `!` instead of `()`.
```rust
bitflags::bitflags! {
    pub struct InlineAsmOptions: u8 {
        const PURE = 1 << 0;
        const NOMEM = 1 << 1;
        const READONLY = 1 << 2;
        const PRESERVES_FLAGS = 1 << 3;
        const NORETURN = 1 << 4;
        const NOSTACK = 1 << 5;
    }
}
```

## AST

`InlineAsm` is represented as an expression in the AST:

```rust
pub struct InlineAsm {
    pub template: Vec<InlineAsmTemplatePiece>,
    pub operands: Vec<(InlineAsmOperand, Span)>,
    pub options: InlineAsmOptions,
}

pub enum InlineAsmRegOrRegClass {
    Reg(Symbol),
    RegClass(Symbol),
}

pub enum InlineAsmOperand {
    In {
        reg: InlineAsmRegOrRegClass,
        expr: P<Expr>,
    },
    Out {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        expr: Option<P<Expr>>,
    },
    InOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        expr: P<Expr>,
    },
    SplitInOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        in_expr: P<Expr>,
        out_expr: Option<P<Expr>>,
    },
    Const {
        expr: P<Expr>,
    },
    Sym {
        expr: P<Expr>,
    },
}
```

The `asm!` macro is implemented in librustc_builtin_macros and outputs an `InlineAsm` AST node. The template string is parsed using libfmt_macros, positional and named operands are resolved to explicit operand indicies. Since target information is not available to macro invocations, validation of the registers and register classes is deferred to AST lowering.

## HIR

`InlineAsm` is represented as an expression in the HIR:

```rust
pub struct InlineAsm<'hir> {
    pub template: &'hir [InlineAsmTemplatePiece],
    pub operands: &'hir [InlineAsmOperand<'hir>],
    pub options: InlineAsmOptions,
}

pub enum InlineAsmRegOrRegClass {
    Reg(InlineAsmReg),
    RegClass(InlineAsmRegClass),
}

pub enum InlineAsmOperand<'hir> {
    In {
        reg: InlineAsmRegOrRegClass,
        expr: Expr<'hir>,
    },
    Out {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        expr: Option<Expr<'hir>>,
    },
    InOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        expr: Expr<'hir>,
    },
    SplitInOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        in_expr: Expr<'hir>,
        out_expr: Option<Expr<'hir>>,
    },
    Const {
        expr: Expr<'hir>,
    },
    Sym {
        expr: Expr<'hir>,
    },
}
```

AST lowering is where `InlineAsmRegOrRegClass` is converted from `Symbol`s to an actual register or register class. If any modifiers are specified for a template string placeholder, these are validated against the set allowed for that operand type. Finally, explicit registers for inputs and outputs are checked for conflicts (same register used for different operands).

## Type checking

Each register class has a whitelist of types that it may be used with. After the types of all operands have been determined, the `intrinsicck` pass will check that these types are in the whitelist. It also checks that split `inout` operands have compatible types and that `const` operands are integers or floats. Suggestions are emitted where needed if a template modifier should be used for an operand based on the type that was passed into it.

## HAIR

`InlineAsm` is represented as an expression in the HAIR:

```rust
crate enum ExprKind<'tcx> {
    // [..]
    InlineAsm {
        template: &'tcx [InlineAsmTemplatePiece],
        operands: Vec<InlineAsmOperand<'tcx>>,
        options: InlineAsmOptions,
    },
}
crate enum InlineAsmOperand<'tcx> {
    In {
        reg: InlineAsmRegOrRegClass,
        expr: ExprRef<'tcx>,
    },
    Out {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        expr: Option<ExprRef<'tcx>>,
    },
    InOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        expr: ExprRef<'tcx>,
    },
    SplitInOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        in_expr: ExprRef<'tcx>,
        out_expr: Option<ExprRef<'tcx>>,
    },
    Const {
        expr: ExprRef<'tcx>,
    },
    SymFn {
        expr: ExprRef<'tcx>,
    },
    SymStatic {
        expr: ExprRef<'tcx>,
    },
}
```

The only significant change compared to HIR is that `Sym` has been lowered to either a `SymFn` whose `expr` is a `Literal` ZST of the `fn`, or a `SymStatic` whose `expr` is a `StaticRef`.

## MIR

`InlineAsm` is represented as a `Terminator` in the MIR:

```rust
pub enum TerminatorKind<'tcx> {
    // [..]

    /// Block ends with an inline assembly block. This is a terminator since
    /// inline assembly is allowed to diverge.
    InlineAsm {
        /// The template for the inline assembly, with placeholders.
        template: &'tcx [InlineAsmTemplatePiece],

        /// The operands for the inline assembly, as `Operand`s or `Place`s.
        operands: Vec<InlineAsmOperand<'tcx>>,

        /// Miscellaneous options for the inline assembly.
        options: InlineAsmOptions,

        /// Destination block after the inline assembly returns, unless it is
        /// diverging (InlineAsmOptions::NORETURN).
        destination: Option<BasicBlock>,
    },
}

pub enum InlineAsmOperand<'tcx> {
    In {
        reg: InlineAsmRegOrRegClass,
        value: Operand<'tcx>,
    },
    Out {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        place: Option<Place<'tcx>>,
    },
    InOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        in_value: Operand<'tcx>,
        out_place: Option<Place<'tcx>>,
    },
    Const {
        value: Operand<'tcx>,
    },
    SymFn {
        value: Box<Constant<'tcx>>,
    },
    SymStatic {
        value: Box<Constant<'tcx>>,
    },
}
```

As part of HAIR lowering, `InOut` and `SplitInOut` operands are lowered to a split form with a separate `in_value` and `out_place`.

Semantically, the `InlineAsm` terminator is similar to the `Call` terminator except that it has multiple output places where a `Call` only has a single return place output.

The constant promotion pass is used to ensure that `const` operands are actually constants (using the same logic as `#[rustc_args_required_const]`).

## Codegen

Operands are lowered one more time before being passed to LLVM codegen:

```rust
pub enum InlineAsmOperandRef<'tcx, B: BackendTypes + ?Sized> {
    In {
        reg: InlineAsmRegOrRegClass,
        value: OperandRef<'tcx, B::Value>,
    },
    Out {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        place: Option<PlaceRef<'tcx, B::Value>>,
    },
    InOut {
        reg: InlineAsmRegOrRegClass,
        late: bool,
        in_value: OperandRef<'tcx, B::Value>,
        out_place: Option<PlaceRef<'tcx, B::Value>>,
    },
    Const {
        string: String,
    },
    SymFn {
        instance: Instance<'tcx>,
    },
    SymStatic {
        def_id: DefId,
    },
}
```

The operands are lowered to LLVM operands and constraint codes as follow:
- `out` and the output part of `inout` operands are added first, as required by LLVM. Late output operands have a `=` prefix added to their constraint code, non-late output operands have a `=&` prefix added to their constraint code.
- `in` operands are added normally.
- `inout` operands are tied to the matching output operand.
- `sym` operands are passed as function pointers or pointers, using the `"s"` constraint.
- `const` operands are formatted to a string and directly inserted in the template string.

The template string is converted to LLVM form:
- `$` characters are escaped as `$$`.
- `const` operands are converted to strings and inserted directly.
- Placeholders are formatted as `${X:M}` where `X` is the operand index and `M` is the modifier character. Modifiers are converted from the Rust form to the LLVM form.

The various options are converted to clobber constraints or LLVM attributes, refer to the [RFC](https://github.com/Amanieu/rfcs/blob/inline-asm/text/0000-inline-asm.md#mapping-to-llvm-ir) for more details.

Note that LLVM is sometimes rather picky about what types it accepts for certain constraint codes so we sometimes need to insert conversions to/from a supported type. See the target-specific ISelLowering.cpp files in LLVM for details.

# Adding support for new architectures

Adding inline assembly support to an architecture is mostly a matter of defining the registers and register classes for that architecture. All the definitions for register classes are located in `src/librustc_target/asm/`.

Additionally you will need to implement lowering of these register classes to LLVM constraint codes in `src/librustc_codegen_llvm/asm.rs`.
2020-05-19 18:32:40 +00:00