Commit Graph

81512 Commits

Author SHA1 Message Date
Andre Bogus
cc2503a4f4 Add individual docs for rotate_{left, right} 2018-08-09 17:10:27 +02:00
Andre Bogus
4471537ea0 make TinyList more readable and optimize remove(_)
also add benchmarks

Before:

```
test tiny_list::test::bench_insert_empty             ... bench:           1 ns/iter (+/- 0)
test tiny_list::test::bench_insert_one               ... bench:          16 ns/iter (+/- 0)
test tiny_list::test::bench_remove_empty             ... bench:           2 ns/iter (+/- 0)
test tiny_list::test::bench_remove_one               ... bench:           6 ns/iter (+/- 0)
test tiny_list::test::bench_remove_unknown           ... bench:           4 ns/iter (+/- 0)
```

After:

```
test tiny_list::test::bench_insert_empty             ... bench:           1 ns/iter (+/- 0)
test tiny_list::test::bench_insert_one               ... bench:          16 ns/iter (+/- 0)
test tiny_list::test::bench_remove_empty             ... bench:           0 ns/iter (+/- 0)
test tiny_list::test::bench_remove_one               ... bench:           3 ns/iter (+/- 0)
test tiny_list::test::bench_remove_unknown           ... bench:           2 ns/iter (+/- 0)
```
2018-08-02 22:58:53 +02:00
bors
03da14ba8c Auto merge of #52949 - Mark-Simulacrum:snap, r=alexcrichton
Switch to bootstrapping from 1.29 beta

r? @alexcrichton
2018-08-02 15:34:21 +00:00
bors
5e92bf280b Auto merge of #52975 - pnkfelix:issue-52967-edition-2018-implies-2-phase-borrows, r=Mark-Simulacrum
NLL migration in the 2018 edition needs two-phase borrows too!

NLL migration in the 2018 edition needs two-phase borrows too!

Fix #52967.
2018-08-02 12:40:35 +00:00
Felix S. Klock II
09a7e64601 When we turn on NLL migration in the 2018 edition, we need two-phase borrows too!
Fix #52967.
2018-08-02 13:51:13 +02:00
bors
76aeeefdc2 Auto merge of #52906 - RalfJung:jemalloc, r=alexcrichton
enable jemalloc assertions when configured to do so

This is essentially a re-submission of the functional part of https://github.com/rust-lang/rust/pull/43648. I was unable to reproduce the issue I had back then, maybe something changed somewhere to no longer trigger the assertion.

Fixes https://github.com/rust-lang/rust/issues/44152
2018-08-02 10:28:42 +00:00
bors
02a369a5c8 Auto merge of #52890 - djrenren:test-visibility, r=petrochenkov
Reexport tests without polluting namespaces

This should fix issue #52557.

Basically now we gensym a new name for the test function and reexport that.
That way the test function's reexport name can't conflict because it was impossible for the test author to write it down.
We then use a `use` statement to expose the original name using the original visibility.
2018-08-02 08:24:14 +00:00
bors
db5476571d Auto merge of #52847 - upsuper:thread-stack-reserve, r=alexcrichton
Don't commit thread stack on Windows

On Windows, there is a system level resource limitation called commit limit, which is roughly the sum of physical memory + paging files[1]. `CreateThread` by default commits the stack size[2], which unnecessarily takes such resource from the shared limit.

This PR changes it to only reserve the stack size rather than commit it. Reserved memory would only take the address space of the current process until it's actually accessed.

This should make the behavior on Windows match other platforms, and is also a pretty standard practice on Windows nowadays.

[1] https://blogs.technet.microsoft.com/markrussinovich/2008/11/17/pushing-the-limits-of-windows-virtual-memory/
[2] https://docs.microsoft.com/zh-cn/windows/desktop/api/processthreadsapi/nf-processthreadsapi-createthread
2018-08-02 04:22:23 +00:00
bors
60c1ee7645 Auto merge of #52787 - riscv-rust:riscv-rust-pr, r=alexcrichton
Enable RISCV

- Enable LLVM backend.
- Implement call abi.
- Add built-in target riscv32imac-unknown-none.
- Enable CI.
2018-08-02 02:24:15 +00:00
bors
1d9405fb6c Auto merge of #52206 - RalfJung:zst-slices, r=alexcrichton
slices: fix ZST slice iterators making up pointers; debug_assert alignment in from_raw_parts

This fixes the problem that we are fabricating pointers out of thin air. I also managed to share more code between the mutable and shared iterators, while reducing the amount of macros.

I am not sure how useful it really is to add a `debug_assert!` in libcore. Everybody gets a release version of that anyway, right? Is there at least a CI job that runs the test suite with a debug version?

Fixes #42789
2018-08-02 00:14:21 +00:00
Ralf Jung
9fcf2c9726 use the same length computation everywhere 2018-08-02 00:33:04 +02:00
Ralf Jung
e1471cf41f Introduce another way to compute the length, to fix position codegen regression 2018-08-02 00:33:04 +02:00
Ralf Jung
b0a82d9314 simplify len macro: No longer require the type
Also use ident, not expr, to avoid accidental side-effects
2018-08-02 00:33:04 +02:00
Ralf Jung
3e3ff4b652 macro-inline len() and is_empty() to fix performance regressions
This also changes the IR for nth(), but the new IR actually looks nicer that the old
(and it is one instruction shorter).
2018-08-02 00:33:03 +02:00
Ralf Jung
1b3c6bac8b make the code for nth closer to what it used to be 2018-08-02 00:33:03 +02:00
Ralf Jung
60b06369ee test nth better 2018-08-02 00:33:03 +02:00
Ralf Jung
cbdba2b4c2 use wrapping_offset; fix logic error in nth 2018-08-02 00:33:03 +02:00
Ralf Jung
c7d90d1a50 comments 2018-08-02 00:33:03 +02:00
Ralf Jung
86369c3ad4 slice iterators: ZST iterators no longer just "make up" addresses 2018-08-02 00:29:12 +02:00
bors
97085f9fb0 Auto merge of #52958 - pietroalbini:rollup, r=pietroalbini
Rollup of 15 pull requests

Successful merges:

 - #52793 (Add test for NLL: unexpected "free region `` does not outlive" error )
 - #52799 (Use BitVector for global sets of AttrId)
 - #52809 (Add test for unexpected region for local data ReStatic)
 - #52834 ([NLL] Allow conflicting borrows of promoted length zero arrays)
 - #52835 (Fix Alias intra doc ICE)
 - #52854 (fix memrchr in miri)
 - #52899 (tests/ui: Add missing mips{64} ignores)
 - #52908 (Use SetLenOnDrop in Vec::truncate())
 - #52915 (Don't count MIR locals as borrowed after StorageDead when finding locals live across a yield terminator)
 - #52926 (rustc: Trim down the `rust_2018_idioms` lint group)
 - #52930 (rustc_resolve: record single-segment extern crate import resolutions.)
 - #52939 (Make io::Read::read_to_end consider io::Take::limit)
 - #52942 (Another SmallVec.extend optimization)
 - #52947 (1.27 actually added the `armv5te-unknown-linux-musleabi` target)
 - #52954 (async can begin expressions)

Failed merges:

r? @ghost
2018-08-01 19:54:06 +00:00
Pietro Albini
3e7897f773
Rollup merge of #52954 - cramertj:async-parse, r=petrochenkov
async can begin expressions

Fix https://github.com/rust-lang/rust/issues/52951

r? @petrochenkov
2018-08-01 21:46:40 +02:00
Pietro Albini
b2392fad35
Rollup merge of #52947 - Susurrus:patch-1, r=alexcrichton
1.27 actually added the `armv5te-unknown-linux-musleabi` target

The PR title says `armv5te-unknown-linux-musl`, but it looks like the final code merge renamed the target to `armv5te-unknown-linux-musleabi`. `rustup` reports this as correct as well.

The [Rust Platform Support](https://forge.rust-lang.org/platform-support.html) page needs this added as well, but I'm not certain what codebase that is generated from.
2018-08-01 21:46:39 +02:00
Pietro Albini
6e7e3859c6
Rollup merge of #52942 - llogiq:smallvec-opt, r=Mark-Simulacrum
Another SmallVec.extend optimization

This improves SmallVec.extend even more over #52859 while making the code easier to read.

Before

```
test small_vec::tests::fill_small_vec_1_10_with_cap  ... bench:          31 ns/iter (+/- 5)
test small_vec::tests::fill_small_vec_1_10_wo_cap    ... bench:          70 ns/iter (+/- 4)
test small_vec::tests::fill_small_vec_1_50_with_cap  ... bench:          36 ns/iter (+/- 3)
test small_vec::tests::fill_small_vec_1_50_wo_cap    ... bench:         256 ns/iter (+/- 17)
test small_vec::tests::fill_small_vec_32_10_with_cap ... bench:          31 ns/iter (+/- 5)
test small_vec::tests::fill_small_vec_32_10_wo_cap   ... bench:          26 ns/iter (+/- 1)
test small_vec::tests::fill_small_vec_32_50_with_cap ... bench:          49 ns/iter (+/- 4)
test small_vec::tests::fill_small_vec_32_50_wo_cap   ... bench:         219 ns/iter (+/- 11)
test small_vec::tests::fill_small_vec_8_10_with_cap  ... bench:          32 ns/iter (+/- 2)
test small_vec::tests::fill_small_vec_8_10_wo_cap    ... bench:          61 ns/iter (+/- 12)
test small_vec::tests::fill_small_vec_8_50_with_cap  ... bench:          37 ns/iter (+/- 3)
test small_vec::tests::fill_small_vec_8_50_wo_cap    ... bench:         210 ns/iter (+/- 10)
```

After:

```
test small_vec::tests::fill_small_vec_1_10_wo_cap    ... bench:          31 ns/iter (+/- 3)
test small_vec::tests::fill_small_vec_1_50_with_cap  ... bench:          39 ns/iter (+/- 4)
test small_vec::tests::fill_small_vec_1_50_wo_cap    ... bench:          35 ns/iter (+/- 4)
test small_vec::tests::fill_small_vec_32_10_with_cap ... bench:          37 ns/iter (+/- 3)
test small_vec::tests::fill_small_vec_32_10_wo_cap   ... bench:          32 ns/iter (+/- 2)
test small_vec::tests::fill_small_vec_32_50_with_cap ... bench:          52 ns/iter (+/- 4)
test small_vec::tests::fill_small_vec_32_50_wo_cap   ... bench:          46 ns/iter (+/- 0)
test small_vec::tests::fill_small_vec_8_10_with_cap  ... bench:          35 ns/iter (+/- 4)
test small_vec::tests::fill_small_vec_8_10_wo_cap    ... bench:          31 ns/iter (+/- 0)
test small_vec::tests::fill_small_vec_8_50_with_cap  ... bench:          40 ns/iter (+/- 15)
test small_vec::tests::fill_small_vec_8_50_wo_cap    ... bench:          36 ns/iter (+/- 2)
```
2018-08-01 21:46:37 +02:00
Pietro Albini
eeb7b6ae09
Rollup merge of #52939 - ljedrz:fix_51746, r=kennytm
Make io::Read::read_to_end consider io::Take::limit

Add a custom implementation of `io::Read::read_to_end` for `io::Take` that doesn't reserve the default 32 bytes but rather `Take::limit` if `Take::limit < 32`.

It's a conservative adjustment that preserves the default behavior for `Take::limit >= 32`.

Fixes #51746.
2018-08-01 21:46:36 +02:00
Pietro Albini
2893bd0e0c
Rollup merge of #52930 - eddyb:issue-52489, r=cramertj
rustc_resolve: record single-segment extern crate import resolutions.

Fixes #52489 by recording special-cased single-segment imports for later (e.g. stability) checks.

cc @alexcrichton @Mark-Simulacrum @petrochenkov

Does this need to be backported?
2018-08-01 21:46:35 +02:00
Pietro Albini
110b71a828
Rollup merge of #52926 - alexcrichton:trim-idioms-lints, r=oli-obk
rustc: Trim down the `rust_2018_idioms` lint group

These migration lints aren't all up to par in terms of a good migration
experience. Some, like `unreachable_pub`, hit bugs like #52665 and unprepared
macros to be handled enough of the time. Others like linting against
`#[macro_use]` are swimming upstream in an ecosystem that's not quite ready (and
slightly buggy pending a few current PRs).

The general idea is that we will continue to recommend the `rust_2018_idioms`
lint group as part of the transition guide (as an optional step) but we'll be
much more selective about which lints make it into this group. Only those with a
strong track record of not causing too much churn will make the cut.

cc #52679
2018-08-01 21:46:33 +02:00
Pietro Albini
b40b899690
Rollup merge of #52915 - Zoxc:refine-gen-borrow-analysis, r=eddyb
Don't count MIR locals as borrowed after StorageDead when finding locals live across a yield terminator

This should fix https://github.com/rust-lang/rust/issues/52792.

r? @eddyb
2018-08-01 21:46:32 +02:00
Pietro Albini
1997c706bd
Rollup merge of #52908 - lnicola:vec-truncate-opt, r=alexcrichton
Use SetLenOnDrop in Vec::truncate()

This avoids a redundant length check in some cases when calling
`Vec::truncate` or `Vec::clear`.

Fixes #51802

Note that the generated code still seems suboptimal. I tested with the following functions:

```rust
#[no_mangle]
pub extern fn foo(x: &mut Vec<u8>) {
    x.clear();
}

#[no_mangle]
pub extern fn bar(x: &mut Vec<u8>) {
    x.truncate(5);
}

#[no_mangle]
pub extern fn baz(x: &mut Vec<u8>, n: usize) {
    x.truncate(n);
}

#[no_mangle]
pub extern fn foo_string(x: &mut Vec<String>) {
    x.clear();
}

#[no_mangle]
pub extern fn bar_string(x: &mut Vec<String>) {
    x.truncate(5);
}

#[no_mangle]
pub extern fn baz_string(x: &mut Vec<String>, n: usize) {
    x.truncate(n);
}
```

<details>
  <summary>Old output</summary>

```asm
00000000000460a0 <foo>:
   460a0:       48 83 7f 10 00          cmpq   $0x0,0x10(%rdi)
   460a5:       74 08                   je     460af <foo+0xf>
   460a7:       48 c7 47 10 00 00 00    movq   $0x0,0x10(%rdi)
   460ae:       00
   460af:       c3                      retq

00000000000460b0 <bar>:
   460b0:       48 83 7f 10 06          cmpq   $0x6,0x10(%rdi)
   460b5:       72 08                   jb     460bf <bar+0xf>
   460b7:       48 c7 47 10 05 00 00    movq   $0x5,0x10(%rdi)
   460be:       00
   460bf:       c3                      retq

00000000000460c0 <baz>:
   460c0:       48 39 77 10             cmp    %rsi,0x10(%rdi)
   460c4:       76 04                   jbe    460ca <baz+0xa>
   460c6:       48 89 77 10             mov    %rsi,0x10(%rdi)
   460ca:       c3                      retq
   460cb:       0f 1f 44 00 00          nopl   0x0(%rax,%rax,1)

00000000000460d0 <foo_string>:
   460d0:       41 57                   push   %r15
   460d2:       41 56                   push   %r14
   460d4:       53                      push   %rbx
   460d5:       48 8b 47 10             mov    0x10(%rdi),%rax
   460d9:       48 85 c0                test   %rax,%rax
   460dc:       74 4a                   je     46128 <foo_string+0x58>
   460de:       49 89 fe                mov    %rdi,%r14
   460e1:       48 8b 0f                mov    (%rdi),%rcx
   460e4:       48 8d 14 40             lea    (%rax,%rax,2),%rdx
   460e8:       48 8d 58 ff             lea    -0x1(%rax),%rbx
   460ec:       4c 8d 3c d1             lea    (%rcx,%rdx,8),%r15
   460f0:       49 83 c7 f0             add    $0xfffffffffffffff0,%r15
   460f4:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   460fb:       00 00 00
   460fe:       66 90                   xchg   %ax,%ax
   46100:       49 89 5e 10             mov    %rbx,0x10(%r14)
   46104:       49 8b 37                mov    (%r15),%rsi
   46107:       48 85 f6                test   %rsi,%rsi
   4610a:       74 0e                   je     4611a <foo_string+0x4a>
   4610c:       49 8b 7f f8             mov    -0x8(%r15),%rdi
   46110:       ba 01 00 00 00          mov    $0x1,%edx
   46115:       e8 a6 e9 ff ff          callq  44ac0 <__rust_dealloc@plt>
   4611a:       48 83 c3 ff             add    $0xffffffffffffffff,%rbx
   4611e:       49 83 c7 e8             add    $0xffffffffffffffe8,%r15
   46122:       48 83 fb ff             cmp    $0xffffffffffffffff,%rbx
   46126:       75 d8                   jne    46100 <foo_string+0x30>
   46128:       5b                      pop    %rbx
   46129:       41 5e                   pop    %r14
   4612b:       41 5f                   pop    %r15
   4612d:       c3                      retq
   4612e:       66 90                   xchg   %ax,%ax

0000000000046130 <bar_string>:
   46130:       41 57                   push   %r15
   46132:       41 56                   push   %r14
   46134:       53                      push   %rbx
   46135:       4c 8b 7f 10             mov    0x10(%rdi),%r15
   46139:       49 83 ff 06             cmp    $0x6,%r15
   4613d:       72 49                   jb     46188 <bar_string+0x58>
   4613f:       49 89 fe                mov    %rdi,%r14
   46142:       48 8b 07                mov    (%rdi),%rax
   46145:       4b 8d 0c 7f             lea    (%r15,%r15,2),%rcx
   46149:       48 8d 1c c8             lea    (%rax,%rcx,8),%rbx
   4614d:       48 83 c3 f0             add    $0xfffffffffffffff0,%rbx
   46151:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   46158:       00 00 00
   4615b:       0f 1f 44 00 00          nopl   0x0(%rax,%rax,1)
   46160:       49 83 c7 ff             add    $0xffffffffffffffff,%r15
   46164:       4d 89 7e 10             mov    %r15,0x10(%r14)
   46168:       48 8b 33                mov    (%rbx),%rsi
   4616b:       48 85 f6                test   %rsi,%rsi
   4616e:       74 0e                   je     4617e <bar_string+0x4e>
   46170:       48 8b 7b f8             mov    -0x8(%rbx),%rdi
   46174:       ba 01 00 00 00          mov    $0x1,%edx
   46179:       e8 42 e9 ff ff          callq  44ac0 <__rust_dealloc@plt>
   4617e:       48 83 c3 e8             add    $0xffffffffffffffe8,%rbx
   46182:       49 83 ff 05             cmp    $0x5,%r15
   46186:       77 d8                   ja     46160 <bar_string+0x30>
   46188:       5b                      pop    %rbx
   46189:       41 5e                   pop    %r14
   4618b:       41 5f                   pop    %r15
   4618d:       c3                      retq
   4618e:       66 90                   xchg   %ax,%ax

0000000000046190 <baz_string>:
   46190:       41 57                   push   %r15
   46192:       41 56                   push   %r14
   46194:       41 54                   push   %r12
   46196:       53                      push   %rbx
   46197:       50                      push   %rax
   46198:       4c 8b 67 10             mov    0x10(%rdi),%r12
   4619c:       49 39 f4                cmp    %rsi,%r12
   4619f:       76 46                   jbe    461e7 <baz_string+0x57>
   461a1:       49 89 f6                mov    %rsi,%r14
   461a4:       49 89 ff                mov    %rdi,%r15
   461a7:       48 8b 07                mov    (%rdi),%rax
   461aa:       4b 8d 0c 64             lea    (%r12,%r12,2),%rcx
   461ae:       48 8d 1c c8             lea    (%rax,%rcx,8),%rbx
   461b2:       48 83 c3 f0             add    $0xfffffffffffffff0,%rbx
   461b6:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   461bd:       00 00 00
   461c0:       49 83 c4 ff             add    $0xffffffffffffffff,%r12
   461c4:       4d 89 67 10             mov    %r12,0x10(%r15)
   461c8:       48 8b 33                mov    (%rbx),%rsi
   461cb:       48 85 f6                test   %rsi,%rsi
   461ce:       74 0e                   je     461de <baz_string+0x4e>
   461d0:       48 8b 7b f8             mov    -0x8(%rbx),%rdi
   461d4:       ba 01 00 00 00          mov    $0x1,%edx
   461d9:       e8 e2 e8 ff ff          callq  44ac0 <__rust_dealloc@plt>
   461de:       48 83 c3 e8             add    $0xffffffffffffffe8,%rbx
   461e2:       4d 39 f4                cmp    %r14,%r12
   461e5:       77 d9                   ja     461c0 <baz_string+0x30>
   461e7:       48 83 c4 08             add    $0x8,%rsp
   461eb:       5b                      pop    %rbx
   461ec:       41 5c                   pop    %r12
   461ee:       41 5e                   pop    %r14
   461f0:       41 5f                   pop    %r15
   461f2:       c3                      retq
   461f3:       90                      nop
   461f4:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   461fb:       00 00 00
   461fe:       66 90                   xchg   %ax,%ax
```
</details>

<details>
  <summary>New output</summary>

```asm
0000000000084d10 <foo>:
   84d10:       48 c7 47 10 00 00 00    movq   $0x0,0x10(%rdi)
   84d17:       00
   84d18:       c3                      retq
   84d19:       0f 1f 80 00 00 00 00    nopl   0x0(%rax)

0000000000084d20 <bar>:
   84d20:       48 8b 47 10             mov    0x10(%rdi),%rax
   84d24:       48 83 f8 05             cmp    $0x5,%rax
   84d28:       b9 05 00 00 00          mov    $0x5,%ecx
   84d2d:       48 0f 42 c8             cmovb  %rax,%rcx
   84d31:       48 89 4f 10             mov    %rcx,0x10(%rdi)
   84d35:       c3                      retq
   84d36:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   84d3d:       00 00 00

0000000000084d40 <baz>:
   84d40:       48 8b 47 10             mov    0x10(%rdi),%rax
   84d44:       48 39 f0                cmp    %rsi,%rax
   84d47:       48 0f 47 c6             cmova  %rsi,%rax
   84d4b:       48 89 47 10             mov    %rax,0x10(%rdi)
   84d4f:       c3                      retq

0000000000084d50 <foo_string>:
   84d50:       41 57                   push   %r15
   84d52:       41 56                   push   %r14
   84d54:       53                      push   %rbx
   84d55:       49 89 fe                mov    %rdi,%r14
   84d58:       4c 8b 7f 10             mov    0x10(%rdi),%r15
   84d5c:       4d 85 ff                test   %r15,%r15
   84d5f:       74 2f                   je     84d90 <foo_string+0x40>
   84d61:       49 8b 06                mov    (%r14),%rax
   84d64:       4b 8d 0c 7f             lea    (%r15,%r15,2),%rcx
   84d68:       48 8d 1c c8             lea    (%rax,%rcx,8),%rbx
   84d6c:       48 83 c3 f0             add    $0xfffffffffffffff0,%rbx
   84d70:       48 8b 33                mov    (%rbx),%rsi
   84d73:       48 85 f6                test   %rsi,%rsi
   84d76:       74 0e                   je     84d86 <foo_string+0x36>
   84d78:       48 8b 7b f8             mov    -0x8(%rbx),%rdi
   84d7c:       ba 01 00 00 00          mov    $0x1,%edx
   84d81:       e8 1a b1 ff ff          callq  7fea0 <__rust_dealloc@plt>
   84d86:       48 83 c3 e8             add    $0xffffffffffffffe8,%rbx
   84d8a:       49 83 c7 ff             add    $0xffffffffffffffff,%r15
   84d8e:       75 e0                   jne    84d70 <foo_string+0x20>
   84d90:       49 c7 46 10 00 00 00    movq   $0x0,0x10(%r14)
   84d97:       00
   84d98:       5b                      pop    %rbx
   84d99:       41 5e                   pop    %r14
   84d9b:       41 5f                   pop    %r15
   84d9d:       c3                      retq
   84d9e:       66 90                   xchg   %ax,%ax

0000000000084da0 <bar_string>:
   84da0:       41 57                   push   %r15
   84da2:       41 56                   push   %r14
   84da4:       53                      push   %rbx
   84da5:       49 89 fe                mov    %rdi,%r14
   84da8:       4c 8b 7f 10             mov    0x10(%rdi),%r15
   84dac:       49 83 ff 06             cmp    $0x6,%r15
   84db0:       72 44                   jb     84df6 <bar_string+0x56>
   84db2:       49 8b 06                mov    (%r14),%rax
   84db5:       4b 8d 0c 7f             lea    (%r15,%r15,2),%rcx
   84db9:       48 8d 1c c8             lea    (%rax,%rcx,8),%rbx
   84dbd:       48 83 c3 f0             add    $0xfffffffffffffff0,%rbx
   84dc1:       49 83 c7 fb             add    $0xfffffffffffffffb,%r15
   84dc5:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   84dcc:       00 00 00
   84dcf:       90                      nop
   84dd0:       48 8b 33                mov    (%rbx),%rsi
   84dd3:       48 85 f6                test   %rsi,%rsi
   84dd6:       74 0e                   je     84de6 <bar_string+0x46>
   84dd8:       48 8b 7b f8             mov    -0x8(%rbx),%rdi
   84ddc:       ba 01 00 00 00          mov    $0x1,%edx
   84de1:       e8 ba b0 ff ff          callq  7fea0 <__rust_dealloc@plt>
   84de6:       48 83 c3 e8             add    $0xffffffffffffffe8,%rbx
   84dea:       49 83 c7 ff             add    $0xffffffffffffffff,%r15
   84dee:       75 e0                   jne    84dd0 <bar_string+0x30>
   84df0:       41 bf 05 00 00 00       mov    $0x5,%r15d
   84df6:       4d 89 7e 10             mov    %r15,0x10(%r14)
   84dfa:       5b                      pop    %rbx
   84dfb:       41 5e                   pop    %r14
   84dfd:       41 5f                   pop    %r15
   84dff:       c3                      retq

0000000000084e00 <baz_string>:
   84e00:       41 57                   push   %r15
   84e02:       41 56                   push   %r14
   84e04:       41 54                   push   %r12
   84e06:       53                      push   %rbx
   84e07:       50                      push   %rax
   84e08:       49 89 ff                mov    %rdi,%r15
   84e0b:       48 8b 47 10             mov    0x10(%rdi),%rax
   84e0f:       49 89 c4                mov    %rax,%r12
   84e12:       49 29 f4                sub    %rsi,%r12
   84e15:       76 3c                   jbe    84e53 <baz_string+0x53>
   84e17:       49 89 f6                mov    %rsi,%r14
   84e1a:       49 8b 0f                mov    (%r15),%rcx
   84e1d:       48 8d 04 40             lea    (%rax,%rax,2),%rax
   84e21:       48 8d 1c c1             lea    (%rcx,%rax,8),%rbx
   84e25:       48 83 c3 f0             add    $0xfffffffffffffff0,%rbx
   84e29:       0f 1f 80 00 00 00 00    nopl   0x0(%rax)
   84e30:       48 8b 33                mov    (%rbx),%rsi
   84e33:       48 85 f6                test   %rsi,%rsi
   84e36:       74 0e                   je     84e46 <baz_string+0x46>
   84e38:       48 8b 7b f8             mov    -0x8(%rbx),%rdi
   84e3c:       ba 01 00 00 00          mov    $0x1,%edx
   84e41:       e8 5a b0 ff ff          callq  7fea0 <__rust_dealloc@plt>
   84e46:       48 83 c3 e8             add    $0xffffffffffffffe8,%rbx
   84e4a:       49 83 c4 ff             add    $0xffffffffffffffff,%r12
   84e4e:       75 e0                   jne    84e30 <baz_string+0x30>
   84e50:       4c 89 f0                mov    %r14,%rax
   84e53:       49 89 47 10             mov    %rax,0x10(%r15)
   84e57:       48 83 c4 08             add    $0x8,%rsp
   84e5b:       5b                      pop    %rbx
   84e5c:       41 5c                   pop    %r12
   84e5e:       41 5e                   pop    %r14
   84e60:       41 5f                   pop    %r15
   84e62:       c3                      retq
   84e63:       90                      nop
   84e64:       66 2e 0f 1f 84 00 00    nopw   %cs:0x0(%rax,%rax,1)
   84e6b:       00 00 00
   84e6e:       66 90                   xchg   %ax,%ax
```
</details>

For calling `truncate` with non-zero lengths on non-`Drop` types, it seems that a redundant load and comparison gets replaced with an awkward sequence with a conditional move. In the unknown length case, the new code is no longer awkward.

Maybe someone moderately proficient at assembly could tell if this looks like a win or not.

---

This came up when discussing replacing `unsafe { vec.set_len(0) }` with `vec.clear()` in a project where the author was worried about potential performance degradation. It might be worth replacing some unsafe code, even it it's trivial to see that it's actually safe.
2018-08-01 21:46:31 +02:00
Pietro Albini
3ae03e95b3
Rollup merge of #52899 - draganmladjenovic:ui_tests64, r=alexcrichton
tests/ui: Add missing mips{64} ignores
2018-08-01 21:46:30 +02:00
Pietro Albini
e3928ccb2f
Rollup merge of #52854 - RalfJung:memrchr, r=Kimundi
fix memrchr in miri

The previous PR https://github.com/rust-lang/rust/pull/52744 was not enough because it assumed that the split between the `mid` and `end` parts returned by `align_to` was aligned. But really the only guarantee we have is that the `mid` part is aligned, so make use of that.
2018-08-01 21:46:28 +02:00
Pietro Albini
f52ef3b839
Rollup merge of #52835 - GuillaumeGomez:ice-rustdoc-links, r=eddyb
Fix Alias intra doc ICE

Fixes #52611.

cc @QuietMisdreavus

r? @varkor
2018-08-01 21:46:27 +02:00
Pietro Albini
d5fcd27eb9
Rollup merge of #52834 - matthewjasper:allow-zst-conflicts, r=pnkfelix
[NLL] Allow conflicting borrows of promoted length zero arrays

This is currently overkill as there's no way to create two conflicting borrows of any promoted.
It is possible that the following code might not fail due to const eval in the future (@oli-obk?). In which case either the array marked needs to not be promoted, or to be checked for conflicts

```rust
static mut A: () = {
    let mut y = None;
    let z;
    let mut done_y = false;
    loop {
        let x = &mut [1];  // < this array
        if done_y {
            z = x;
            break;
        }
        y = Some(x);
        done_y = true;
    }
    some_const_fn(y, z); // some_const_fn expects that y to not alias z.
};
```

r? @pnkfelix  @nikomatsakis

closes #52671
cc #51823
2018-08-01 21:46:26 +02:00
Pietro Albini
4d1ddfe983
Rollup merge of #52809 - davidtwco:issue-49579, r=pnkfelix
Add test for unexpected region for local data ReStatic

Fixes #49579.

r? @pnkfelix @nikomatsakis
2018-08-01 21:46:25 +02:00
Pietro Albini
42243f82f4
Rollup merge of #52799 - Mark-Simulacrum:attr-id-bitvecs, r=michaelwoerister
Use BitVector for global sets of AttrId
2018-08-01 21:46:23 +02:00
Pietro Albini
334da29e98
Rollup merge of #52793 - davidtwco:issue-49824, r=pnkfelix
Add test for NLL: unexpected "free region `` does not outlive" error

Fixes #49824.

r? @pnkfelix @nikomatsakis
2018-08-01 21:46:22 +02:00
John Renner
77f9aca2a3 Use the correct allow 2018-08-01 12:33:10 -07:00
John Renner
af7ae2f278 Allow test imports to go unused 2018-08-01 11:28:08 -07:00
Mark Rousskov
683a3db01f Switch to bootstrapping from 1.29 beta 2018-08-01 11:59:08 -06:00
bors
c4156768aa Auto merge of #51609 - dscorbett:is_numeric, r=alexcrichton
Treat gc=No characters as numeric

[`char::is_numeric`](https://doc.rust-lang.org/std/primitive.char.html#method.is_numeric) and [`char::is_alphanumeric`](https://doc.rust-lang.org/std/primitive.char.html#method.is_alphanumeric) are documented to be defined “in terms of the Unicode General Categories 'Nd', 'Nl', 'No'”, but unicode.py does not group 'No' with the other 'N' categories. These functions therefore currently return `false` for characters like ⟨¾⟩ and ⟨①⟩.
2018-08-01 17:44:25 +00:00
Taylor Cramer
f685142f86 async can begin expressions 2018-08-01 09:50:15 -07:00
David Wood
8bbf0422d4
Added test for #49824. 2018-08-01 17:30:01 +02:00
Bryant Mairs
c2d57db4ee
1.27 actually added the armv5te-unknown-linux-musleabi target
The PR title says `armv5te-unknown-linux-musl`, but it looks like the final code merge renamed the target to `armv5te-unknown-linux-musleabi`. `rustup` reports this as correct as well.

The [Rust Platform Support](https://forge.rust-lang.org/platform-support.html) page needs this added as well, but I'm not certain what codebase that is generated from.
2018-08-01 08:24:18 -07:00
Alex Crichton
27b3cb552d rustc: Trim down the rust_2018_idioms lint group
These migration lints aren't all up to par in terms of a good migration
experience. Some, like `unreachable_pub`, hit bugs like #52665 and unprepared
macros to be handled enough of the time. Others like linting against
`#[macro_use]` are swimming upstream in an ecosystem that's not quite ready (and
slightly buggy pending a few current PRs).

The general idea is that we will continue to recommend the `rust_2018_idioms`
lint group as part of the transition guide (as an optional step) but we'll be
much more selective about which lints make it into this group. Only those with a
strong track record of not causing too much churn will make the cut.

cc #52679
2018-08-01 07:29:24 -07:00
David Craven
d974dc9a78
[RISCV] Disable c extension and atomic_cas. 2018-08-01 15:34:57 +02:00
David Craven
7a5e8bdc02
[RISCV] Enable CI. 2018-08-01 15:34:57 +02:00
David Craven
302ddef1ac
[RISCV] Add built-in target riscv32imac-unknown-none-elf. 2018-08-01 15:34:56 +02:00
David Craven
a6bd5ae57e
[RISCV] Implement call abi. 2018-08-01 15:32:22 +02:00
David Craven
2d5f62fb48
[RISCV] Enable LLVM backend. 2018-08-01 15:32:22 +02:00
Mark Rousskov
9bc4fbb10a Split out growth functionality into BitVector type 2018-08-01 06:50:40 -06:00
Mark Rousskov
1d64b241cd Switch syntax attribute tracking to BitVector 2018-08-01 06:48:42 -06:00