549 Commits

Author SHA1 Message Date
Antoni Boucher
3791646c02 Run stdarch tests in the CI 2022-11-25 11:38:49 -05:00
Antoni Boucher
69341c44cc Fix the argument order for some AVX-512 intrinsics 2022-11-24 18:32:17 -05:00
Antoni Boucher
76991ba26f Fix simd_bitmask 2022-11-24 17:26:58 -05:00
Antoni Boucher
15fcca80a4 Escape { and } in inline asm 2022-11-24 13:21:04 -05:00
Dylan DPC
20ff36217a Rollup merge of #104001 - Ayush1325:custom-entry, r=bjorn3
Improve generating Custom entry function

This commit is aimed at making compiler-generated entry functions (Basically just C `main` right now) more generic so other targets can do similar things for custom entry. This was initially implemented as part of https://github.com/rust-lang/rust/pull/100316.

Currently, this moves the entry function name and Call convention to the target spec.

Signed-off-by: Ayush Singh <ayushsingh1325@gmail.com>
2022-11-19 11:54:43 +05:30
bors
ee50714c91 Auto merge of #103138 - nnethercote:merge-BBs, r=bjorn3
Merge basic blocks where possible when generating LLVM IR.

r? `@ghost`
2022-11-17 01:56:24 +00:00
Matthias Krüger
5d862b86df Rollup merge of #103750 - calebzulawski:master, r=workingjubilee
Fix some misleading target feature aliases

This is the first half of a fix for #100752.  It looks like these aliases were added in #78361 and slipped under the radar, as these features are not AVX512.  These features _do_ add AVX512 instructions when used _in combination_ with AVX512F, but without AVX512F, these features still provide 128-bit and 256-bit vector instructions.  A user might be mislead into thinking these features imply AVX512F (which is true of the actual AVX512 features).  This PR allows using the names as defined by LLVM, which matches Intel documentation.

A future PR should change the `std::arch` intrinsics to use these names, and finally remove these aliases from rustc.

r? ```@workingjubilee```

cc ```@Amanieu```
2022-11-16 15:39:44 +01:00
Nicholas Nethercote
d01b63a09a Use &mut Bx more.
For the next commit, `FunctionCx::codegen_*_terminator` need to take a
`&mut Bx` instead of consuming a `Bx`. This triggers a cascade of
similar changes across multiple functions. The resulting code is more
concise and replaces many `&mut bx` expressions with `bx`.
2022-11-16 15:46:39 +11:00
bors
d2d2b28f5a Auto merge of #102570 - cjgillot:deagg-debuginfo, r=oli-obk
Perform simple scalar replacement of aggregates (SROA) MIR opt

This is a re-open of https://github.com/rust-lang/rust/pull/85796

I copied the debuginfo implementation (first commit) from `@eddyb's` own SROA PR.

This pass replaces plain field accesses by simple locals when possible.
To be eligible, the replaced locals:
- must not be enums or unions;
- must not be used whole;
- must not have their address taken.

The storage and deinit statements are duplicated on each created local.

cc `@tmiasko` who reviewed the former version of this PR.
2022-11-15 23:52:22 +00:00
Camille GILLOT
af8682b8b4 Introduce composite debuginfo. 2022-11-15 17:53:50 +00:00
bors
eb0bc4759b Auto merge of #104054 - RalfJung:byte-provenance, r=oli-obk
interpret: support for per-byte provenance

Also factors the provenance map into its own module.

The third commit does the same for the init mask. I can move it in a separate PR if you prefer.

Fixes https://github.com/rust-lang/miri/issues/2181

r? `@oli-obk`
2022-11-15 17:37:15 +00:00
Ayush Singh
695c76c45a Use custom entry name in gcc
This is a continuation of 9f0a8620bd7d325e6d42417b08daff3e55cb88f6 for
gcc.

Signed-off-by: Ayush Singh <ayushsingh1325@gmail.com>
2022-11-15 22:15:55 +05:30
Ralf Jung
358419cc25 add is_sized method on Abi and Layout, and use it 2022-11-13 12:23:53 +01:00
Caleb Zulawski
2596ab4d75 Allow actual AVX512-related feature names in the case of some misleading aliases 2022-11-12 18:46:21 -05:00
Ralf Jung
e876f43599 fix cranelift and gcc 2022-11-06 14:17:10 +01:00
Ayush Singh
87237cb699 Add type_array to BaseTypeMethods
Moved type_array function to rustc_codegen_ssa::BaseTypeMethods trait.
This allows using normal alloca function to create arrays as suggested in
https://github.com/rust-lang/rust/pull/104022.

Signed-off-by: Ayush Singh <ayushsingh1325@gmail.com>
2022-11-06 14:18:36 +05:30
Amanieu d'Antras
5a1c8e8e5c Rewrite implementation of #[alloc_error_handler]
The new implementation doesn't use weak lang items and instead changes
`#[alloc_error_handler]` to an attribute macro just like
`#[global_allocator]`.

The attribute will generate the `__rg_oom` function which is called by
the compiler-generated `__rust_alloc_error_handler`. If no `__rg_oom`
function is defined in any crate then the compiler shim will call
`__rdl_oom` in the alloc crate which will simply panic.

This also fixes link errors with `-C link-dead-code` with
`default_alloc_error_handler`: `__rg_oom` was previously defined in the
alloc crate and would attempt to reference the `oom` lang item, even if
it didn't exist. This worked as long as `__rg_oom` was excluded from
linking since it was not called.

This is a prerequisite for the stabilization of
`default_alloc_error_handler` (#102318).
2022-10-31 16:32:57 +00:00
Guillaume Gomez
bf3ef4ce1a Revert changes in argument parsing for setting asm syntax 2022-10-26 17:04:58 +02:00
Daniel Paoliello
e30385bc06 Support raw-dylib functions being used inside inlined functions 2022-10-24 16:17:38 -07:00
Nilstrieb
d3b02e3186 Migrate all diagnostics 2022-10-23 10:09:44 +02:00
Guillaume Gomez
f150ab3277 Improve code generating inline ASM 2022-10-18 23:11:46 +02:00
Guillaume Gomez
5484c131a5 Don't override -masm option if set in the command arguments 2022-10-18 22:45:22 +02:00
Guillaume Gomez
1b60286103 Implement constraits modifiers 2022-10-18 17:44:33 +02:00
Guillaume Gomez
94a4a4c350 Convert llvm-arg --x86-asm-syntax into GCC arg -masm 2022-10-18 16:31:50 +02:00
Guillaume Gomez
b3198c72db Add missing register class conversion for inline asm 2022-10-18 16:29:33 +02:00
Antoni Boucher
173db39f91 Fix simd_select 2022-10-09 14:24:35 -04:00
Antoni Boucher
e5ce7a9846 Fix simd_select_bitmask 2022-10-09 14:24:35 -04:00
Antoni Boucher
f73dea7e55 Fix simd_bitmask 2022-10-09 11:42:12 -04:00
Antoni Boucher
1fa8b26426 Fix vector_select 2022-10-09 11:25:40 -04:00
Antoni Boucher
74dac5d970 Fix vfmadd 2022-10-08 15:05:23 -04:00
Antoni Boucher
c573621812 Fix some vfmaddsub intrinsics 2022-10-08 14:45:17 -04:00
Antoni Boucher
23a1a86835 More debug options 2022-10-08 14:37:19 -04:00
Andy Sadler
436710fa9b
simd: enable simd_as intrinsic
The method context.convert_vector, added to libgccjit for simd_cast,
appears to give the correct behavior for simd_as.  Instead of
special-casing simd_as, re-use simd_cast's impl for simd_as.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-10-02 19:04:49 -05:00
bjorn3
413edf6771 Remove type argument of array_alloca and rename to byte_array_alloca 2022-10-02 13:42:14 +00:00
bjorn3
af0b18b454 Remove dynamic_alloca from BuilderMethods 2022-10-02 13:42:02 +00:00
Antoni Boucher
a0654b398b Implement llvm.prefetch 2022-10-01 15:18:51 -04:00
bjorn3
3f43ee2407 Merge apply_attrs_callsite into call and invoke
Some codegen backends are not able to apply callsite attrs after the fact.
2022-10-01 17:01:31 +00:00
bjorn3
69a065ef81 Remove unused target_cpu and tune_cpu methods from ExtraBackendMethods 2022-10-01 16:45:33 +00:00
bjorn3
29edc888bd Remove several unused methods from MiscMethods 2022-10-01 16:45:07 +00:00
bjorn3
2db7a873de Remove unused Context assoc type from WriteBackendMethods 2022-10-01 16:34:45 +00:00
Antoni Boucher
908304e257 Rewrite inbounds_gep with a loop 2022-10-01 12:31:39 -04:00
Antoni Boucher
6b7e16f87e Add more debugging options 2022-10-01 12:31:39 -04:00
Antoni Boucher
ed570f6678 Fix gep 2022-10-01 12:31:39 -04:00
Antoni Boucher
12105bc0d7 Fix pointer comparison 2022-09-30 18:23:37 -04:00
Ellis Hoag
5ae3bf2ed3 print <signal> when ranlib failed without an exit code 2022-09-28 19:02:38 -07:00
Andy Sadler
688f742658
simd: implement float math intrinsics
Implements the intrinsics required to pass float-math-pass and
libm_std_can_float ui tests.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-09-27 21:58:55 -05:00
Ellis Hoag
277b997adc lint and remove unused diagnostic 2022-09-26 19:57:40 -07:00
Ellis Hoag
d1741f6d62 remove comment 2022-09-24 15:03:14 -07:00
Ellis Hoag
0ae1e27b17 fix lifetime error 2022-09-24 11:36:16 -07:00
Ellis Hoag
43b3206571 rebase and update trait names 2022-09-24 11:06:05 -07:00