MIPS r6 is quite different with the previous version.
It use some new target triples:
mipsisa32r6-unknown-linux-gnu
mipsisa32r6el-unknown-linux-gnu
mipsisa64r6-unknown-linux-gnuabi64
mipsisa64r6el-unknown-linux-gnuabi64
This patch has been tested with Debian Port for mips64r6el,
and the support of these triples also is included in llvm:
https://reviews.llvm.org/rGe58c45a695f39004710b6ce940d489fee800dbd3
There's lots of comments in the code, but the main gist of this commit
is that the acquisition of the global malloc lock on the
`wasm32-unknown-unknown` target when threads are enabled will not spin
on contention rather than block.
JSBackend is implied when building the emscripten backend, and not available for the standard llvm backend. This commit also puts the example config in sync with the defaults in src/bootstrap/native.rs
This was one of the unresolved questions of https://github.com/rust-lang/rfcs/pull/2480.
As the RFC says this is maybe not useful in the sense that we are unlikely
to ever have a second version, but making the crate a true subset
makes one less issue to think about if we stabilize it and later
want to merge standard library crates and have Cargo feature flags
to enable or disable parts of the `std` crate.
See also discussion in https://github.com/rust-lang/rust/pull/58175
In bluss/indexmap#88, we found that there was no easy way to implement
`Debug` for our `IterMut` and `Drain` iterators. Those are built on
`slice::IterMut` and `vec::Drain`, which implement `Debug` themselves,
but have no other way to access their data. With a new `as_slice()`
method, we can read the data and customize its presentation.
This code no longer ICEs, and @yodaldevoid found that it was fixed by
commit fe5710a. While that added a similar test, we can explicitly test
this reproducer too.
Closes#50582.
