79 Commits

Author SHA1 Message Date
Luca Barbato
668d8ff262 Add support for Vector Sum Across Partial 1/2 Saturated on PowerPC 2017-09-05 20:22:34 +00:00
Luca Barbato
cccf3e7a5c Add support for Vector Multiply Sum Saturated on PowerPC 2017-08-31 23:31:29 +00:00
Luca Barbato
078c3ddbe3 Add support for Vector Multiply Sum on PowerPC 2017-08-31 23:27:23 +00:00
Luca Barbato
d308b0bf56 Add support for Vector Multiply Add Saturated on PowerPC 2017-08-31 23:20:35 +00:00
Luca Barbato
5d91eda8b3 Add support for Vector Unpack High and Low on PowerPC 2017-08-16 05:04:42 +00:00
Luca Barbato
88fc6dc369 Add support for Vector Pack Pixel on PowerPC
The llvm intrinsic uses signed integers.
2017-08-16 05:04:41 +00:00
Luca Barbato
1773233d74 Add support for Vector Pack Saturated Unsigned on PowerPC 2017-08-16 05:04:41 +00:00
Luca Barbato
c2cdcefead Add support for Vector Pack Saturated on PowerPC 2017-08-16 05:04:41 +00:00
Luca Barbato
8b78ea5b84 Add support for Vector Average on PowerPC 2017-08-07 07:44:27 +00:00
Luca Barbato
19c4bdb4e1 Add support for Vector Multiply Odd on PowerPC 2017-08-07 07:41:15 +00:00
Luca Barbato
9c6ab920ab Add support for Vector Multiply Even on PowerPC 2017-08-07 07:35:32 +00:00
Luca Barbato
bb47972d4c Add support for Vector Add Carryout on PowerPC 2017-08-06 06:35:42 +00:00
Luca Barbato
381cbe4994 Add support for Vector Add Saturated on PowerPC 2017-08-06 06:31:10 +00:00
Luca Barbato
844e9adf25 Add support for Vector Subtract Carryout on PowerPC 2017-08-04 00:19:58 +00:00
Luca Barbato
b07a059643 Add support for Vector Subtract Saturated on PowerPC 2017-08-04 00:16:22 +00:00
Luca Barbato
cbce0aa341 Add support for Vector Minimum on PowerPC 2017-07-27 21:30:31 +00:00
Luca Barbato
a718c813ed Add support for Vector Maximum on PowerPC 2017-07-27 15:59:12 +00:00
Luca Barbato
a1995d3973 Add Vector Compare Greater-Than 2017-07-26 17:19:32 +00:00
Luca Barbato
e2b5a6b3bc Add Vector Compare Equal 2017-07-26 13:13:52 +00:00
Luca Barbato
4f6c03e243 Add Vector Compare Bounds Floating-Point 2017-07-26 09:58:17 +00:00
Luca Barbato
ccdfd7f7e6 Add mradds to the powerpc intrinsics 2017-07-25 16:49:38 +00:00
Luca Barbato
9ed8cf87a6 Add support for PowerPC Altivec/VSX intrinsics 2017-07-24 09:08:20 +00:00
Alex Crichton
be7ebdd512 Bump version and stage0 compiler 2017-06-19 22:25:05 -07:00
Henri Sivonen
0fb8414f14 Change llvm.neon.* to llvm.arm.neon.* in the mapping for platform intrinsics
This avoids linker errors when using platform intrinsics on 32-bit ARM with
NEON.

Fixes rust-lang-nursery/simd#10.
2017-06-07 11:23:10 +03:00
Alex Crichton
ab54f4b226 rustc: Remove #![unstable] annotation
These are now no longer necessary with `-Z force-unstable-if-unmarked`
2017-05-11 16:03:05 -07:00
Michael Wu
cc4efd1370 Add support for Hexagon v60 HVX intrinsics 2017-05-07 15:07:36 -04:00
bors
61b93bd811 Auto merge of #38561 - nagisa:rdrandseed, r=alexcrichton
Add intrinsics & target features for rd{rand,seed}

One question is whether or not we want to map feature name `rdrnd` to `rdrand` instead.

EDIT: as for use case, I would like to port my rdrand crate from inline assembly to these intrinsics.
2017-02-14 01:26:10 +00:00
bors
7ac9d337dc Auto merge of #38679 - alexcrichton:always-deny-warnings, r=nrc
Remove not(stage0) from deny(warnings)

Historically this was done to accommodate bugs in lints, but there hasn't been a
bug in a lint since this feature was added which the warnings affected. Let's
completely purge warnings from all our stages by denying warnings in all stages.
This will also assist in tracking down `stage0` code to be removed whenever
we're updating the bootstrap compiler.
2017-01-08 08:22:06 +00:00
Alex Crichton
9b0b5b45db Remove not(stage0) from deny(warnings)
Historically this was done to accommodate bugs in lints, but there hasn't been a
bug in a lint since this feature was added which the warnings affected. Let's
completely purge warnings from all our stages by denying warnings in all stages.
This will also assist in tracking down `stage0` code to be removed whenever
we're updating the bootstrap compiler.
2016-12-29 21:07:20 -08:00
Jorge Aparicio
18d49288d5 PTX support
- `--emit=asm --target=nvptx64-nvidia-cuda` can be used to turn a crate
  into a PTX module (a `.s` file).

- intrinsics like `__syncthreads` and `blockIdx.x` are exposed as
  `"platform-intrinsics"`.

- "cabi" has been implemented for the nvptx and nvptx64 architectures.
  i.e. `extern "C"` works.

- a new ABI, `"ptx-kernel"`. That can be used to generate "global"
  functions. Example: `extern "ptx-kernel" fn kernel() { .. }`. All
  other functions are "device" functions.
2016-12-26 21:06:23 -05:00
Simonas Kazlauskas
b2cf6df875 Add intrinsics & target features for rd{rand,seed} 2016-12-22 23:53:30 +02:00
gnzlbg
10cbc37cdd Add intrinsics for x86 bit manipulation instruction sets: BMI 1.0, BMI 2.0, and TBM. 2016-06-22 16:34:10 +02:00
Eduard Burtescu
0abd3139db rustc_platform_intrinsics: remove unused rustc dependency. 2016-03-29 19:36:01 +03:00
Eduard Burtescu
352b44d1fa Remove unnecessary dependencies on rustc_llvm. 2016-03-29 19:36:01 +03:00
Eduard Burtescu
5efdde0de1 rustc: move cfg, infer, traits and ty from middle to top-level. 2016-03-27 01:05:54 +02:00
Alex Crichton
87ede2da54 rustc: Improve compile time of platform intrinsics
This commit improves the compile time of `rustc_platform_intrinsics` from 23s to
3.6s if compiling with `-O` and from 77s to 17s if compiling with `-O -g`. The
compiled rlib size also drops from 3.1M to 1.2M.

The wins here were gained by removing the destructors associated with `Type` by
removing the internal `Box` and `Vec` indirections. These destructors meant that
a lot of landing pads and extra code were generated to manage the runtime
representations. Instead everything can basically be statically computed and
shoved into rodata, so all we need is a giant string compare to lookup what's
what.

Closes #28273
2016-03-15 17:32:34 -07:00
Ruud van Asseldonk
a394d50490 Regenerate x86 platform intrinsics
The exact command used was:

    $ cd src/etc/platform-intrinsics/x86
    $ python2 ../generator.py --format compiler-defs -i info.json   \
      sse.json sse2.json sse3.json ssse3.json sse41.json sse42.json \
      avx.json avx2.json fma.json                                   \
      > ../../../librustc_platform_intrinsics/x86.rs
2016-03-13 15:09:46 +01:00
Ruud van Asseldonk
c306853eda Regenerate x86 platform intrinsics
The exact command used was:

    $ cd src/etc/platform-intrinsics/x86
    $ python2 ../generator.py --format compiler-defs -i info.json   \
      sse.json sse2.json sse3.json ssse3.json sse41.json sse42.json \
      avx.json avx2.json fma.json                                   \
      > ../../../librustc_platform_intrinsics/x86.rs
2016-03-09 01:18:46 +01:00
Ruud van Asseldonk
a409076df4 Regenerate x86 platform intrinsics
The exact command used was:

    $ cd src/etc/platform-intrinsics/x86
    $ python2 ../generator.py --format compiler-defs -i info.json   \
      sse.json sse2.json sse3.json ssse3.json sse41.json sse42.json \
      avx.json avx2.json fma.json                                   \
      > ../../../librustc_platform_intrinsics/x86.rs
2016-03-05 16:37:11 +01:00
Jeffrey Seyfried
37ba66a66e Rename middle::ty::ctxt to TyCtxt 2016-03-03 07:37:56 +00:00
Alex Crichton
2581b14147 bootstrap: Add a bunch of Cargo.toml files
These describe the structure of all our crate dependencies.
2016-02-11 11:12:32 -08:00
Alex Crichton
2273b52023 mk: Move from -D warnings to #![deny(warnings)]
This commit removes the `-D warnings` flag being passed through the makefiles to
all crates to instead be a crate attribute. We want these attributes always
applied for all our standard builds, and this is more amenable to Cargo-based
builds as well.

Note that all `deny(warnings)` attributes are gated with a `cfg(stage0)`
attribute currently to match the same semantics we have today
2016-01-24 20:35:55 -08:00
Alex Crichton
cd1848a1a6 Register new snapshots
Lots of cruft to remove!
2015-12-21 09:26:21 -08:00
Vadim Petrochenkov
be8ace8cac Remove all uses of #[staged_api] 2015-11-25 21:55:26 +03:00
Andrew Paseltiner
269b59fe69 Remove executable permission from .rs files 2015-11-09 09:28:51 -05:00
Andrea Canciani
9aa1289a67 Add a comment to explain the #[inline(never)] annotation
and regenerate the platform intrinsics source files.
2015-09-12 17:05:29 +02:00
Björn Steinbrink
9104a902c0 Avoid triggering a pathological case in the LLVM inliner
When the inliner has to decided if it wants to inline a function A into an
internal function B, it first checks whether it would be more profitable
to inline B into its callees instead. This means that it has to analyze
B, which involves checking the assumption cache. Building the assumption
cache requires scanning the whole function, and because inlining
currently clears the assumption cache, this scan happens again and
again, getting even slower as the function grows from inlining.

As inlining the huge find functions isn't really useful anyway, we can
mark them as noinline, which skips the cost analysis and reduces compile
times by as much as 70%.

cc #28273
2015-09-11 16:43:05 +02:00
Huon Wilson
67aa4c775a Add some fancier AArch64 load/store instructions. 2015-09-04 09:14:13 -07:00
Huon Wilson
c19e7b629b Add various pointer & void-using x86 intrinsics. 2015-09-04 09:14:13 -07:00
Huon Wilson
2b45a9ab54 Support bitcasts in platform intrinsic generator. 2015-09-04 09:14:13 -07:00