Commit Graph

14 Commits

Author SHA1 Message Date
Nicholas Nethercote
8c5d84d102 Add blank lines after module-level //! comments.
Most modules have such a blank line, but some don't. Inserting the blank
line makes it clearer that the `//!` comments are describing the entire
module, rather than the `use` declaration(s) that immediately follows.
2024-06-20 09:23:20 +10:00
Guillaume Gomez
faebf73983 Merge commit 'b385428e3ddf330805241e7758e773f933357c4b' into subtree-update_cg_gcc_2024-03-05 2024-03-05 19:58:36 +01:00
Ralf Jung
215284a490 remove StructuralEq trait 2024-01-24 07:56:23 +01:00
Antoni Boucher
9f4f90b19a Merge commit 'e4fe941b11a55c5005630696e9b6d81c65f7bd04' into subtree-update_cg_gcc_2023-10-25 2023-10-26 17:42:02 -04:00
Antoni Boucher
242a482c88 Merge commit '11a0cceab966e5ff1058ddbcab5977e8a1d6d290' into subtree-update_cg_gcc_2023-10-09 2023-10-09 15:53:34 -04:00
Antoni Boucher
d725cfb6ab Merge commit '08a6d6e16b5efe217123e780398969946266268f' into sync-cg_gcc-2023-03-04 2023-03-05 12:03:19 -05:00
Amanieu d'Antras
14e0e0fec3 Stabilize asm_sym 2022-10-17 22:38:37 +01:00
Urgau
4d398832a5 Stabilize bench_black_box 2022-09-27 17:38:51 +02:00
Antoni Boucher
fac57d9a06 Merge commit 'e8dca3e87d164d2806098c462c6ce41301341f68' into sync_from_cg_gcc 2022-06-06 22:04:37 -04:00
bjorn3
3888aafe3a Merge commit '39683d8eb7a32a74bea96ecbf1e87675d3338506' into sync_cg_gcc-2022-03-26 2022-03-26 18:29:37 +01:00
bjorn3
54d2ec1a82 Merge commit '1411a98352ba6bee8ba3b0131c9243e5db1e6a2e' into sync_cg_clif-2021-12-31 2021-12-31 16:26:32 +01:00
Amanieu d'Antras
eec5f919e7 Stabilize asm! and global_asm!
They are also removed from the prelude as per the decision in
https://github.com/rust-lang/rust/issues/87228.

stdarch and compiler-builtins are updated to work with the new, stable
asm! and global_asm! macros.
2021-12-12 11:20:03 +00:00
Commeownist
7c707e4b95
Implement basic inline asm support (#72)
* Implement basic support for inline assembly

* Disable LTO

We don't support it yet at all

* Handle `inout(reg) var` correctly

Turns out that `+` readwrite output registers cannot be tied with
input variables.

* Add limited support for llvm_asm!

* Handle CHANNEL correctly

* Add support for arbitrary explicit registers

* Handle symbols properly

* Add rudimentary asm tests

* Exclude llvm_asm! tests from tests runs

* Insert `__builtin_unreachable()` after diverging asm blocks
2021-09-05 11:26:01 -04:00
Antoni Boucher
afae271d5d Initial commit 2021-08-12 21:46:50 -04:00