Commit Graph

14 Commits

Author SHA1 Message Date
bors
4354192429 Auto merge of #114201 - Centri3:explicit-repr-rust, r=WaffleLapkin
Allow explicit `#[repr(Rust)]`

This is identical to no `repr()` at all. For `Rust, packed` and `Rust, align(x)`, it should be the same as no `Rust` at all (as, afaik, `#[repr(align(16))]` uses the Rust ABI.)

The main use case for this is being able to explicitly say "I want to use the Rust ABI" in very very rare circumstances where the first obvious choice would be the C ABI yet is undesirable, which is already possible with functions as `extern "Rust"`. This would be useful for silencing https://github.com/rust-lang/rust-clippy/pull/11253. It's also more consistent with `extern`.

The lack of this also tripped me up a bit when I was new to Rust, as I expected this to be possible.
2023-08-25 00:02:54 +00:00
Luca Barbato
c0394c8ac0 Add the relocation_model to the cfg
This way is possible to write inline assembly code aware of it.
2023-08-18 19:57:28 +02:00
Seth Pellegrino
897c7bb23b feat: riscv-interrupt-{m,s} calling conventions
Similar to prior support added for the mips430, avr, and x86 targets
this change implements the rough equivalent of clang's
[`__attribute__((interrupt))`][clang-attr] for riscv targets, enabling
e.g.

```rust
static mut CNT: usize = 0;

pub extern "riscv-interrupt-m" fn isr_m() {
    unsafe {
        CNT += 1;
    }
}
```

to produce highly effective assembly like:

```asm
pub extern "riscv-interrupt-m" fn isr_m() {
420003a0:       1141                    addi    sp,sp,-16
    unsafe {
        CNT += 1;
420003a2:       c62a                    sw      a0,12(sp)
420003a4:       c42e                    sw      a1,8(sp)
420003a6:       3fc80537                lui     a0,0x3fc80
420003aa:       63c52583                lw      a1,1596(a0) # 3fc8063c <_ZN12esp_riscv_rt3CNT17hcec3e3a214887d53E.0>
420003ae:       0585                    addi    a1,a1,1
420003b0:       62b52e23                sw      a1,1596(a0)
    }
}
420003b4:       4532                    lw      a0,12(sp)
420003b6:       45a2                    lw      a1,8(sp)
420003b8:       0141                    addi    sp,sp,16
420003ba:       30200073                mret
```

(disassembly via `riscv64-unknown-elf-objdump -C -S --disassemble ./esp32c3-hal/target/riscv32imc-unknown-none-elf/release/examples/gpio_interrupt`)

This outcome is superior to hand-coded interrupt routines which, lacking
visibility into any non-assembly body of the interrupt handler, have to
be very conservative and save the [entire CPU state to the stack
frame][full-frame-save]. By instead asking LLVM to only save the
registers that it uses, we defer the decision to the tool with the best
context: it can more accurately account for the cost of spills if it
knows that every additional register used is already at the cost of an
implicit spill.

At the LLVM level, this is apparently [implemented by] marking every
register as "[callee-save]," matching the semantics of an interrupt
handler nicely (it has to leave the CPU state just as it found it after
its `{m|s}ret`).

This approach is not suitable for every interrupt handler, as it makes
no attempt to e.g. save the state in a user-accessible stack frame. For
a full discussion of those challenges and tradeoffs, please refer to
[the interrupt calling conventions RFC][rfc].

Inside rustc, this implementation differs from prior art because LLVM
does not expose the "all-saved" function flavor as a calling convention
directly, instead preferring to use an attribute that allows for
differentiating between "machine-mode" and "superivsor-mode" interrupts.

Finally, some effort has been made to guide those who may not yet be
aware of the differences between machine-mode and supervisor-mode
interrupts as to why no `riscv-interrupt` calling convention is exposed
through rustc, and similarly for why `riscv-interrupt-u` makes no
appearance (as it would complicate future LLVM upgrades).

[clang-attr]: https://clang.llvm.org/docs/AttributeReference.html#interrupt-risc-v
[full-frame-save]: 9281af2ecf/src/lib.rs (L440-L469)
[implemented by]: b7fb2a3fec/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp (L61-L67)
[callee-save]: 973f1fe7a8/llvm/lib/Target/RISCV/RISCVCallingConv.td (L30-L37)
[rfc]: https://github.com/rust-lang/rfcs/pull/3246
2023-08-08 18:09:56 -07:00
Nikita Popov
01cdc505d9 Fix stack-protector.rs on LLVM 17
Prevent fill from being (correctly) optimized away by passing the
address of the alloca to black_box.
2023-08-07 20:35:55 +02:00
Benedikt Radtke
3f3262e592 stabilize abi_thiscall 2023-08-07 14:11:03 +02:00
Jubilee Young
20ebbf467d Replace ignore-everything with only-arch
Combining revisions with only-arch allows specifying
that a test only applies to a handful of targets.
This allows removing a large amount of repetition
in the test suite for tests that do not benefit.
The revisions are suboptimal for this for some tests,
so they aren't preferred in those cases.
2023-07-29 15:49:07 -07:00
Catherine Flores
f42d361a22 Allow explicit #[repr(Rust)] 2023-07-29 06:58:29 +00:00
David Wood
eddfce53c1
abi: avoid ice for non-ffi-safe fn ptrs
Remove an `unwrap` that assumed FFI-safe types in foreign fn-ptr types.

Signed-off-by: David Wood <david.wood@huawei.com>
2023-07-03 13:40:20 +01:00
David Wood
e3f90bca50
lint/ctypes: ext. abi fn-ptr in internal abi fn
Instead of skipping functions with internal ABIs, check that the
signature doesn't contain any fn-ptr types with external ABIs that
aren't FFI-safe.

Signed-off-by: David Wood <david.wood@huawei.com>
2023-07-03 13:40:20 +01:00
WANG Rui
4375d3b203 tests: Add tests for LoongArch64 2023-04-30 00:06:26 +08:00
Pietro Albini
64af509377
remove invalid ignore-pretty 2023-04-03 09:24:11 +02:00
Florian Bartels
3ce2cd059f
Add QNX Neutrino support to libstd
Co-authored-by: gh-tr <troach@qnx.com>
2023-02-28 15:59:47 +01:00
Albert Larsan
40ba0e84d5
Change src/test to tests in source files, fix tidy and tests 2023-01-11 09:32:13 +00:00
Albert Larsan
cf2dff2b1e
Move /src/test to /tests 2023-01-11 09:32:08 +00:00