Commit Graph

20 Commits

Author SHA1 Message Date
Antoni Boucher
3180da5529 Fix tests 2023-03-04 19:18:31 -05:00
Antoni Boucher
f83ede03f5 Fix tests 2023-03-04 18:52:25 -05:00
Antoni Boucher
9d5bc7c929 Fix tests 2023-03-04 15:25:34 -05:00
Antoni Boucher
830a821b9b Update failures 2023-02-25 20:36:24 -05:00
Antoni Boucher
fa6ae3c8bb Cleanup 2023-01-26 13:53:36 -05:00
Antoni Boucher
f5ced68a66 Adjust failing tests 2023-01-22 20:16:46 -05:00
Antoni Boucher
ea75295180 Fix tests 2023-01-09 19:41:13 -05:00
Antoni Boucher
5f8cdd2d36 Fix tests 2023-01-09 18:27:16 -05:00
Antoni Boucher
e87b01447f Add missing failing tests 2023-01-09 18:08:50 -05:00
Antoni Boucher
76991ba26f Fix simd_bitmask 2022-11-24 17:26:58 -05:00
Antoni Boucher
173db39f91 Fix simd_select 2022-10-09 14:24:35 -04:00
Antoni Boucher
f73dea7e55 Fix simd_bitmask 2022-10-09 11:42:12 -04:00
Andy Sadler
436710fa9b
simd: enable simd_as intrinsic
The method context.convert_vector, added to libgccjit for simd_cast,
appears to give the correct behavior for simd_as.  Instead of
special-casing simd_as, re-use simd_cast's impl for simd_as.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-10-02 19:04:49 -05:00
Andy Sadler
688f742658
simd: implement float math intrinsics
Implements the intrinsics required to pass float-math-pass and
libm_std_can_float ui tests.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-09-27 21:58:55 -05:00
Andy Sadler
d7d820fc47
simd: impl extract_element for vector types
This fixes some tests that needed vector element extraction.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-09-09 10:07:36 -05:00
Andy Sadler
1d3ca135d0
simd: implement simd_fmin/fmax
This implements simd_fmin/fmax in a largely-optimal method.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-08-30 19:34:27 -05:00
Antoni Boucher
fc56c54416 Remove extra newline in asm 2022-08-27 19:41:37 -04:00
Andy Sadler
4df874f73d simd: Implement missing reduction intrinsics
Implements the following simd reduction intrinsics:
- simd_reduce_add_ordered
- simd_reduce_mul_ordered
- simd_reduce_min_nanless
- simd_reduce_max_nanless
- simd_reduce_xor
- simd_reduce_any
- simd_reduce_all

Also fixes the ordering of simd_reduce_min and simd_reduce_max,
which were tested to be flipped.

Both simd_reduce_min_nanless and simd_reduce_max_nanless are identical
to their non-nanless variants for the time being.  An attempt was made
at a more optimal codegen solution based on vector_reduce_op.  However,
this approach ran into masking issues for floating-point vector types,
which appears to be broken for the same reason that comparison
operations such as simd_lt are broken for floating-point vector types.
More investigation is required, however, to determine a root cause and
appropriate fix.

This should be enough to pass the generic-reduction-pass.rs ui tests
with the 'master' feature enabled.

Signed-off-by: Andy Sadler <andrewsadler122@gmail.com>
2022-08-27 12:16:37 -05:00
Antoni Boucher
eed6603c0a Fix tests 2022-08-27 11:10:34 -04:00
Guillaume Gomez
0ba53c8211 Split rustc tests in two 2022-07-05 19:46:59 +02:00