93 Commits

Author SHA1 Message Date
Nicholas Nethercote
99e036bd21 Remove extern crate rustc_middle from numerous crates. 2024-04-29 14:50:45 +10:00
clubby789
4de3a3af4a Bump indexmap
`swap` has been deprecated in favour of `swap_remove` - the behaviour
is the same though.
2024-02-13 21:03:34 +00:00
Chris Denton
83a850f2a1
Add lahfsahf and prfchw target feature 2024-02-12 10:31:12 -03:00
George-lewis
36a69e9d39 Add check for ui_testing via promoting parameters from ParseSess to Session 2024-01-13 12:11:13 -05:00
Nicholas Nethercote
ed76b0b882 Rename consuming chaining methods on DiagnosticBuilder.
In #119606 I added them and used a `_mv` suffix, but that wasn't great.

A `with_` prefix has three different existing uses.
- Constructors, e.g. `Vec::with_capacity`.
- Wrappers that provide an environment to execute some code, e.g.
  `with_session_globals`.
- Consuming chaining methods, e.g. `Span::with_{lo,hi,ctxt}`.

The third case is exactly what we want, so this commit changes
`DiagnosticBuilder::foo_mv` to `DiagnosticBuilder::with_foo`.

Thanks to @compiler-errors for the suggestion.
2024-01-10 07:40:00 +11:00
Nicholas Nethercote
b1b9278851 Make DiagnosticBuilder::emit consuming.
This works for most of its call sites. This is nice, because `emit` very
much makes sense as a consuming operation -- indeed,
`DiagnosticBuilderState` exists to ensure no diagnostic is emitted
twice, but it uses runtime checks.

For the small number of call sites where a consuming emit doesn't work,
the commit adds `DiagnosticBuilder::emit_without_consuming`. (This will
be removed in subsequent commits.)

Likewise, `emit_unless` becomes consuming. And `delay_as_bug` becomes
consuming, while `delay_as_bug_without_consuming` is added (which will
also be removed in subsequent commits.)

All this requires significant changes to `DiagnosticBuilder`'s chaining
methods. Currently `DiagnosticBuilder` method chaining uses a
non-consuming `&mut self -> &mut Self` style, which allows chaining to
be used when the chain ends in `emit()`, like so:
```
    struct_err(msg).span(span).emit();
```
But it doesn't work when producing a `DiagnosticBuilder` value,
requiring this:
```
    let mut err = self.struct_err(msg);
    err.span(span);
    err
```
This style of chaining won't work with consuming `emit` though. For
that, we need to use to a `self -> Self` style. That also would allow
`DiagnosticBuilder` production to be chained, e.g.:
```
    self.struct_err(msg).span(span)
```
However, removing the `&mut self -> &mut Self` style would require that
individual modifications of a `DiagnosticBuilder` go from this:
```
    err.span(span);
```
to this:
```
    err = err.span(span);
```
There are *many* such places. I have a high tolerance for tedious
refactorings, but even I gave up after a long time trying to convert
them all.

Instead, this commit has it both ways: the existing `&mut self -> Self`
chaining methods are kept, and new `self -> Self` chaining methods are
added, all of which have a `_mv` suffix (short for "move"). Changes to
the existing `forward!` macro lets this happen with very little
additional boilerplate code. I chose to add the suffix to the new
chaining methods rather than the existing ones, because the number of
changes required is much smaller that way.

This doubled chainging is a bit clumsy, but I think it is worthwhile
because it allows a *lot* of good things to subsequently happen. In this
commit, there are many `mut` qualifiers removed in places where
diagnostics are emitted without being modified. In subsequent commits:
- chaining can be used more, making the code more concise;
- more use of chaining also permits the removal of redundant diagnostic
  APIs like `struct_err_with_code`, which can be replaced easily with
  `struct_err` + `code_mv`;
- `emit_without_diagnostic` can be removed, which simplifies a lot of
  machinery, removing the need for `DiagnosticBuilderState`.
2024-01-08 15:24:49 +11:00
Michael Woerister
5449638d7d Make iteration order of supported_target_features query stable 2024-01-04 13:48:57 +01:00
Nicholas Nethercote
99472c7049 Remove Session methods that duplicate DiagCtxt methods.
Also add some `dcx` methods to types that wrap `TyCtxt`, for easier
access.
2023-12-24 08:05:28 +11:00
Urgau
428395e064 Move rustc_codegen_ssa target features to rustc_target 2023-12-14 14:40:55 +01:00
Krasimir Georgiev
b378059e6b update target feature following LLVM API change
LLVM commit e817966718
renamed the `unaligned-scalar-mem` target feature to `fast-unaligned-access`.
2023-12-08 13:06:07 +00:00
Ralf Jung
6dd2ea0f35 features must be additive 2023-11-13 09:41:45 +01:00
Ralf Jung
5b5006916b target_feature: make it more clear what that 'Option' means 2023-11-12 12:46:05 +01:00
Ralf Jung
b85c6835d0 warn when using an unstable feature with -Ctarget-feature 2023-11-06 09:44:00 +01:00
bors
91bbdd927a Auto merge of #116485 - coastalwhite:stabilize-riscv-target-features, r=Amanieu
Stabilize Ratified RISC-V Target Features

Stabilization PR for the ratified RISC-V target features. This stabilizes some of the target features tracked by #44839. This is also a part of #114544 and eventually needed for the RISC-V part of rust-lang/rfcs#3268.

There is a similar PR for the the stdarch crate which can be found at rust-lang/stdarch#1476.

This was briefly discussed on Zulip
(https://rust-lang.zulipchat.com/#narrow/stream/250483-t-compiler.2Frisc-v/topic/Stabilization.20of.20RISC-V.20Target.20Features/near/394793704).

Specifically, this PR stabilizes the:
* Atomic Instructions (A) on v2.0
* Compressed Instructions (C) on v2.0
* ~Double-Precision Floating-Point (D) on v2.2~
* ~Embedded Base (E) (Given as `RV32E` / `RV64E`) on v2.0~
* ~Single-Precision Floating-Point (F) on v2.2~
* Integer Multiplication and Division (M) on v2.0
* ~Vector Operations (V) on v1.0~
* Bit Manipulations (B) on v1.0 listed as `zba`, `zbc`, `zbs`
* Scalar Cryptography (Zk) v1.0.1 listed as `zk`, `zkn`, `zknd`, `zkne`, `zknh`, `zkr`, `zks`, `zksed`, `zksh`, `zkt`, `zbkb`, `zbkc` `zkbx`
* ~Double-Precision Floating-Point in Integer Register (Zdinx) on v1.0~
* ~Half-Precision Floating-Point (Zfh) on v1.0~
* ~Minimal Half-Precision Floating-Point (Zfhmin) on v1.0~
* ~Single-Precision Floating-Point in Integer Register (Zfinx) on v1.0~
* ~Half-Precision Floating-Point in Integer Register (Zhinx) on v1.0~
* ~Minimal Half-Precision Floating-Point in Integer Register (Zhinxmin) on v1.0~

r? `@Amanieu`
2023-10-30 03:57:10 +00:00
WANG Rui
cb618162b1 compiler: Add target features for LoongArch 2023-10-24 09:36:47 +08:00
Gijs Burghoorn
6988d2294d Stabilize Ratified RISC-V Target Features
As shortly discussed on Zulip
(https://rust-lang.zulipchat.com/#narrow/stream/250483-t-compiler.2Frisc-v/topic/Stabilization.20of.20RISC-V.20Target.20Features/near/394793704),
this commit stabilizes the ratified RISC-V instruction bases and
extensions.

Specifically, this commit stabilizes the:
* Atomic Instructions (A) on v2.0
* Compressed Instructions (C) on v2.0
* Integer Multiplication and Division (M) on v2.0
* Bit Manipulations (B) on v1.0 listed as `zba`, `zbc`, `zbs`
* Scalar Cryptography (Zk) v1.0.1 listed as `zk`, `zkn`, `zknd`, `zkne`, `zknh`, `zkr`, `zks`, `zksed`, `zksh`, `zkt`, `zbkb`, `zbkc` `zkbx`
2023-10-11 11:37:58 +02:00
Dirreke
184a9afffb add details for csky-unknown-linux-gnuabiv2 and add docs 2023-08-14 23:02:37 +08:00
Dirreke
8c51e28bd5 add rustc_codegen_ssa support for csky and correct some code 2023-08-14 23:02:36 +08:00
Taiki Endo
dddd2190b9 Remove arm crypto target feature 2023-08-05 15:23:31 +09:00
Matthias Krüger
3ce90b1649 inline format!() args up to and including rustc_codegen_llvm 2023-07-30 14:22:50 +02:00
chenx97
d3727148a0 support for mips32r6 as a target_arch value 2023-07-18 18:58:18 +08:00
chenx97
c6e03cd951 support for mips64r6 as a target_arch value 2023-07-18 18:58:18 +08:00
Mark Rousskov
cc907f80b9 Re-format let-else per rustfmt update 2023-07-12 21:49:27 -04:00
Matthias Krüger
4696a92183
Rollup merge of #111322 - mirkootter:master, r=davidtwco
Support for native WASM exceptions

### Motivation
Currently, rustc does not support native WASM exceptions. It does support JavaScript based exceptions for the wasm32-emscripten-target, but this requires back&forth with javascript for many calls, which is very slow.

Native wasm support for exceptions is quite common: Clang+LLVM implemented them years ago, and all major browsers support them by now. They enable zero-cost exceptions, at least with regard to runtime-performance-cost. They may increase startup-time and code size, though.

### Important: This PR does not change default behaviour
Exceptions usually add a lot of code in form of unwinding blocks, increasing the binary size. Most users probably do not want that, especially which regard to web development.

Therefore, wasm exceptions play a similar role as WASM-threads: rustc should support them, like clang does, but users who want to use it have to use some command-line magic like rustflags to opt in.

### What does this PR do?
As stated above, the default behaviour is not changed. It is already possible to opt-in into wasm exceptions using the command line. Unfortunately, the LLVM IR is invalid and the LLVM backend crashes.
```
rustc <sourcefile>
  --target wasm32-unknown-unknown
  -C panic=unwind
  -C llvm-args=-wasm-enable-eh
  -C target-feature=+exception-handling
```
As it turns out, LLVM is quite picky when it comes to IR for exception handling. If the IR does not look exactly like it should, some LLVM-assertions fail and the code generation crashes.

This PR adds the necessary modifications to the code generator to make it work. It also adds `exception-handling` as a wasm target feature.

### What this PR does not / what is missing
This PR is not a full fledges solution. It is the first step. A few parts are still missing; however, it is already useable (see next section).

Currently missing:
* The std library has to be adapted. Currently, only [no_std] crates work
* Usually, nested exceptions abort the program (i.e. a panic during the cleanup of another panic). This is currently not done yet.
  - Currently, code inside cleanup handlers does not unwind
  - To fix this requires a little more work: The code generator currently maintains a single terminate block per function for this. Unfortunately, WASM requires funclet based exception handling. Therefore, we need to create a terminate block per funclet. This is probably not a big problem, but I want to keep this PR simple.

### How to use the compiler given this PR?
This PR does not add any command line flags or features. It uses those which are already there. To compile with exceptions enabled, you need
* to set the panic strategy to unwind, i.e. `-C panic=unwind`
* to enable the exception-handling target feature, i.e. `-C target-feature=+exception-handling`
* to tell LLVM about the exception handling, i.e. `-C llvm-args=-wasm-enable-eh`

Since the standard library has not been adapted, you can only use it in [no_std] crates as of now. The intrinsic `core::intrinsics::r#try` works. To throw exceptions, you need the ```@llvm.wasm.throw``` intrinsic.

I created a sample application which works for me: https://github.com/mirkootter/rust-wasm-demos
This example can be run at https://webassembly.sh
2023-06-29 16:36:30 +02:00
Jan-Mirko Otter
82336c1311 wasm target feature: exception handling 2023-06-07 17:46:34 +02:00
Andrew Walbran
7269972f73 Add trustzone and virtualization target features for aarch32.
These are LLVM target features which allow the `smc` and `hvc`
instructions respectively to be used in inline assembly.
2023-06-02 13:50:18 +01:00
Dylan DPC
677da1c4e5
Rollup merge of #110884 - korran:unaligned-scalar-mem, r=wesleywiser
Support RISC-V unaligned-scalar-mem target feature

This adds `unaligned-scalar-mem` as an allowed RISC-V target feature. Some RISC-V cores support unaligned access to memory without trapping. On such cores, the compiler could significantly improve code-size and performance when using functions like core::ptr::read_unaligned<u32> by emitting a single load or store instruction with an unaligned address, rather than a long sequence of byte load/store/bitmanip instructions.

Enabling the `unaligned-scalar-mem` target feature allows LLVM to do this optimization.

Fixes #110883
2023-05-18 10:52:33 +05:30
bors
ce5919fcef Auto merge of #107707 - calebzulawski:remove-features, r=Amanieu
Remove misleading target feature aliases

Fixes #100752.  This is a follow up to #103750. These aliases could not be completely removed until rust-lang/stdarch#1355 landed.

cc `@Amanieu`
2023-05-15 18:47:52 +00:00
John Kåre Alsaker
fff20a703d Move expansion of query macros in rustc_middle to rustc_middle::query 2023-05-15 08:49:13 +02:00
Nicholas Nethercote
6b62f37402 Restrict From<S> for {D,Subd}iagnosticMessage.
Currently a `{D,Subd}iagnosticMessage` can be created from any type that
impls `Into<String>`. That includes `&str`, `String`, and `Cow<'static,
str>`, which are reasonable. It also includes `&String`, which is pretty
weird, and results in many places making unnecessary allocations for
patterns like this:
```
self.fatal(&format!(...))
```
This creates a string with `format!`, takes a reference, passes the
reference to `fatal`, which does an `into()`, which clones the
reference, doing a second allocation. Two allocations for a single
string, bleh.

This commit changes the `From` impls so that you can only create a
`{D,Subd}iagnosticMessage` from `&str`, `String`, or `Cow<'static,
str>`. This requires changing all the places that currently create one
from a `&String`. Most of these are of the `&format!(...)` form
described above; each one removes an unnecessary static `&`, plus an
allocation when executed. There are also a few places where the existing
use of `&String` was more reasonable; these now just use `clone()` at
the call site.

As well as making the code nicer and more efficient, this is a step
towards possibly using `Cow<'static, str>` in
`{D,Subd}iagnosticMessage::{Str,Eager}`. That would require changing
the `From<&'a str>` impls to `From<&'static str>`, which is doable, but
I'm not yet sure if it's worthwhile.
2023-05-03 08:44:39 +10:00
Kor Nielsen
08f7e32a6e Support RISC-V unaligned-scalar-mem target feature
This adds `unaligned-scalar-mem` as an allowed RISC-V target feature.
Some RISC-V cores support unaligned access to memory without trapping.
On such cores, the compiler could significantly improve code-size and
performance when using functions like core::ptr::read_unaligned<u32>
by emitting a single load or store instruction with an unaligned
address, rather than a long sequence of byte load/store/bitmanip
instructions.

Enabling the `unaligned-scalar-mem` target feature allows LLVM to do
this optimization.

Fixes #110883
2023-04-27 00:22:41 -07:00
clubby789
0138513635 Fix static string lints 2023-04-25 18:59:55 +01:00
Zachary Yedidia
48be303272 Add riscv relax target feature 2023-04-02 07:30:42 -07:00
bors
e350fe4e60 Auto merge of #109001 - matthiaskrgr:rollup-a3agnwp, r=matthiaskrgr
Rollup of 8 pull requests

Successful merges:

 - #105798 (Relax ordering rules for `asm!` operands)
 - #105962 (Stabilize path_as_mut_os_str)
 - #106085 (use problem matchers for tidy CI)
 - #107711 (Stabilize movbe target feature)
 - #108017 (Add `--no-undefined-version` link flag and fix associated breakage)
 - #108891 (Remove an extraneous include)
 - #108902 (no more do while :<)
 - #108912 (Document tool lints)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
2023-03-11 07:28:44 +00:00
Matthias Krüger
93316d7f28
Rollup merge of #107711 - calebzulawski:movbe, r=pnkfelix
Stabilize movbe target feature

Almost all "old" x86 target features are stable.  As far as I can tell, these are the last two unstable features in the `x86-64-v2` or `x86-64-v3` microarchitecture levels, so I'm not sure if it was an oversight or if they're still unstable for a reason (see #106323 for `f16c`).

Note that this only stabilizes the target features, and not the intrinsics.

cc ```@Amanieu```

r? ```@rust-lang/lang```
2023-03-10 21:15:44 +01:00
Léo Lanteri Thauvin
ad2bcb5c0e Forbid #[target_feature] on safe default implementations 2023-03-10 13:50:51 +01:00
bors
9b60e6c68f Auto merge of #108312 - michaelwoerister:hash-set-not-hash-stable, r=eholk
Do not implement HashStable for HashSet (MCP 533)

This PR removes all occurrences of `HashSet` in query results, replacing it either with `FxIndexSet` or with `UnordSet`, and then removes the `HashStable` implementation of `HashSet`. This is part of implementing [MCP 533](https://github.com/rust-lang/compiler-team/issues/533), that is, removing the `HashStable` implementations of all collection types with unstable iteration order.

The changes are mostly mechanical. The only place where additional sorting is happening is in Miri's override implementation of the `exported_symbols` query.
2023-03-08 06:07:11 +00:00
Caleb Zulawski
d3cbedd49e Stabilize movbe target feature 2023-03-02 17:14:47 -05:00
Vadim Petrochenkov
c83553da31 rustc_middle: Remove trait DefIdTree
This trait was a way to generalize over both `TyCtxt` and `Resolver`, but now `Resolver` has access to `TyCtxt`, so this trait is no longer necessary.
2023-03-02 23:46:44 +04:00
Michael Woerister
ee8bc5b0b2 Use FxIndexSet instead of FxHashSet for asm_target_features query. 2023-03-01 10:19:26 +01:00
bors
fd1f1fa0d1 Auto merge of #106774 - Nugine:master, r=Amanieu
Stabilize cmpxchg16b_target_feature

Tracking issue for target features
+ #44839

stdarch issue
+ https://github.com/rust-lang/stdarch/issues/827

stdarch PR
+ https://github.com/rust-lang/stdarch/pull/1358

reference PR
+ https://github.com/rust-lang/reference/pull/1331

It's my first time contributing to rust-lang/rust. Please tell me if I missed something.
2023-02-28 04:12:34 +00:00
Matthias Krüger
1fac415997
Rollup merge of #108086 - alexcrichton:wasm-relaxed-simd-feature, r=eholk
wasm: Register the `relaxed-simd` target feature

This WebAssembly proposal is likely to reach stage 4 soon so this starts the support in Rust for the proposal by adding a target feature that can be enabled via attributes for the stdarch project to bind the intrinsics.
2023-02-17 00:19:36 +01:00
Alex Crichton
d90f7df674 wasm: Register the relaxed-simd target feature
This WebAssembly proposal is likely to reach stage 4 soon so this starts
the support in Rust for the proposal by adding a target feature that can
be enabled via attributes for the stdarch project to bind the
intrinsics.
2023-02-15 08:13:32 -08:00
Camille GILLOT
68fb752035 Do not fetch HIR to check target features. 2023-02-14 20:27:38 +00:00
Caleb Zulawski
47fc13268c Remove misleading target feature aliases 2023-02-05 17:04:39 -05:00
Nugine
a4f2d14875
Stabilize cmpxchg16b_target_feature 2023-02-01 10:54:43 +08:00
Kathryn Long
a29425c6d4
Stabilize f16c_target_feature 2022-12-30 23:56:18 -05:00
Jeremy Stucki
3dde32ca97
rustc: Remove needless lifetimes 2022-12-20 22:10:40 +01:00
Michael Goulet
a8a45100a0 Move some codegen-y methods from rustc_hir_analysis::collect -> rustc_codegen_ssa 2022-12-13 05:01:36 +00:00
Qiu Chaofan
85c99855c4 Allow power10-vector feature in PowerPC 2022-11-22 14:45:56 +08:00