Handle disabled features

This commit is contained in:
Antoni Boucher 2023-09-14 19:01:31 -04:00
parent 5bb0d630ab
commit f692124c5d

View File

@ -104,22 +104,33 @@ fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, LockedTarge
} }
}; };
let disable_cpu_feature = |feature: &str| {
if disabled_features.contains(feature) {
context.add_command_line_option(&format!("-mno-{}", feature));
}
};
// TODO(antoyo): only set on x86 platforms. // TODO(antoyo): only set on x86 platforms.
context.add_command_line_option("-masm=intel"); context.add_command_line_option("-masm=intel");
// TODO: instead of setting the features manually, set the correct -march flag. // TODO: instead of setting the features manually, set the correct -march flag.
/*let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm", let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
"vaes", "vpclmulqdq", "xsavec", "vaes", "vpclmulqdq", "xsavec",
]; ];
for feature in &features {
add_cpu_feature_flag(feature);
}*/
for feature in &features {
disable_cpu_feature(feature);
//add_cpu_feature_flag(feature);
}
if !disabled_features.contains("avx") {
// NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
// SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead. // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
// FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar. // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
context.add_command_line_option("-mavx"); context.add_command_line_option("-mavx");
}
for arg in &tcx.sess.opts.cg.llvm_args { for arg in &tcx.sess.opts.cg.llvm_args {
context.add_command_line_option(arg); context.add_command_line_option(arg);