Handle disabled features
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27
src/base.rs
27
src/base.rs
@ -104,22 +104,33 @@ fn module_codegen(tcx: TyCtxt<'_>, (cgu_name, target_info): (Symbol, LockedTarge
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}
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};
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let disable_cpu_feature = |feature: &str| {
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if disabled_features.contains(feature) {
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context.add_command_line_option(&format!("-mno-{}", feature));
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}
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};
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// TODO(antoyo): only set on x86 platforms.
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context.add_command_line_option("-masm=intel");
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// TODO: instead of setting the features manually, set the correct -march flag.
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/*let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
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let features = ["64", "avxvnni", "bmi", "sse2", "avx2", "sha", "fma", "fma4", "gfni", "f16c", "aes", "bmi2", "pclmul", "rtm",
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"vaes", "vpclmulqdq", "xsavec",
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];
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for feature in &features {
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add_cpu_feature_flag(feature);
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}*/
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// NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
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// SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
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// FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
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context.add_command_line_option("-mavx");
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for feature in &features {
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disable_cpu_feature(feature);
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//add_cpu_feature_flag(feature);
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}
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if !disabled_features.contains("avx") {
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// NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
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// SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
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// FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.
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context.add_command_line_option("-mavx");
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}
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for arg in &tcx.sess.opts.cg.llvm_args {
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context.add_command_line_option(arg);
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