Merge pull request #103 from rust-lang/feature/select
Implement trait Select<Mask> and fn select
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commit
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@ -81,6 +81,7 @@
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pub(crate) fn simd_bitmask<T, U>(x: T) -> U;
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// select
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pub(crate) fn simd_select<T, U>(m: T, a: U, b: U) -> U;
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pub(crate) fn simd_select_bitmask<T, U>(m: T, a: U, b: U) -> U;
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}
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@ -14,6 +14,9 @@
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#[macro_use]
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mod reduction;
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mod select;
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pub use select::Select;
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mod comparisons;
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mod fmt;
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mod intrinsics;
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52
crates/core_simd/src/select.rs
Normal file
52
crates/core_simd/src/select.rs
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@ -0,0 +1,52 @@
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mod sealed {
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pub trait Sealed {}
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}
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use sealed::Sealed;
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/// Supporting trait for vector `select` function
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pub trait Select<Mask>: Sealed {}
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macro_rules! impl_select {
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{
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$mask:ident ($bits_ty:ident): $($type:ident),*
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} => {
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$(
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impl<const LANES: usize> Sealed for crate::$type<LANES> where Self: crate::LanesAtMost32 {}
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impl<const LANES: usize> Select<crate::$mask<LANES>> for crate::$type<LANES>
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where
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crate::$mask<LANES>: crate::Mask,
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crate::$bits_ty<LANES>: crate::LanesAtMost32,
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Self: crate::LanesAtMost32,
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{}
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)*
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impl<const LANES: usize> crate::$mask<LANES>
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where
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Self: crate::Mask,
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crate::$bits_ty<LANES>: crate::LanesAtMost32,
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{
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/// Choose lanes from two vectors.
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///
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/// For each lane in the mask, choose the corresponding lane from `true_values` if
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/// that lane mask is true, and `false_values` if that lane mask is false.
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///
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/// ```
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/// # use core_simd::{Mask32, SimdI32};
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/// let a = SimdI32::from_array([0, 1, 2, 3]);
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/// let b = SimdI32::from_array([4, 5, 6, 7]);
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/// let mask = Mask32::from_array([true, false, false, true]);
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/// let c = mask.select(a, b);
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/// assert_eq!(c.to_array(), [0, 5, 6, 3]);
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/// ```
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pub fn select<S: Select<Self>>(self, true_values: S, false_values: S) -> S {
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unsafe { crate::intrinsics::simd_select(self.to_int(), true_values, false_values) }
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}
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}
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}
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}
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impl_select! { Mask8 (SimdI8): SimdU8, SimdI8 }
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impl_select! { Mask16 (SimdI16): SimdU16, SimdI16 }
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impl_select! { Mask32 (SimdI32): SimdU32, SimdI32, SimdF32}
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impl_select! { Mask64 (SimdI64): SimdU64, SimdI64, SimdF64}
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impl_select! { MaskSize (SimdIsize): SimdUsize, SimdIsize }
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